arch/parisc/include/asm/smp.h

   1 #ifndef __ASM_SMP_H
   2 #define __ASM_SMP_H
   3
   4
   5 #if defined(CONFIG_SMP)
   6
   7 /* Page Zero Location PDC will look for the address to branch to when we poke
   8 ** slave CPUs still in "Icache loop".
   9 */
  10 #define PDC_OS_BOOT_RENDEZVOUS     0x10
  11 #define PDC_OS_BOOT_RENDEZVOUS_HI  0x28
  12
  13 #ifndef ASSEMBLY
  14 #include <linux/bitops.h>
  15 #include <linux/threads.h>      /* for NR_CPUS */
  16 #include <linux/cpumask.h>
  17 typedef unsigned long address_t;
  18
  19
  20 /*
  21  *      Private routines/data
  22  *
  23  *      physical and logical are equivalent until we support CPU hotplug.
  24  */
  25 #define cpu_number_map(cpu)     (cpu)
  26 #define cpu_logical_map(cpu)    (cpu)
  27
  28 extern void smp_send_reschedule(int cpu);
  29 extern void smp_send_all_nop(void);
  30
  31 extern void arch_send_call_function_single_ipi(int cpu);
  32 extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
  33
  34 #endif /* !ASSEMBLY */
  35
  36 /*
  37  *      This magic constant controls our willingness to transfer
  38  *      a process across CPUs. Such a transfer incurs cache and tlb
  39  *      misses. The current value is inherited from i386. Still needs
  40  *      to be tuned for parisc.
  41  */
  42
  43 #define PROC_CHANGE_PENALTY     15              /* Schedule penalty */
  44
  45 #define raw_smp_processor_id()  (current_thread_info()->cpu)
  46
  47 #else /* CONFIG_SMP */
  48
  49 static inline void smp_send_all_nop(void) { return; }
  50
  51 #endif
  52
  53 #define NO_PROC_ID              0xFF            /* No processor magic marker */
  54 #define ANY_PROC_ID             0xFF            /* Any processor magic marker */
  55 static inline int __cpu_disable (void) {
  56   return 0;
  57 }
  58 static inline void __cpu_die (unsigned int cpu) {
  59   while(1)
  60     ;
  61 }
  62 extern int __cpu_up (unsigned int cpu);
  63
  64 #endif /*  __ASM_SMP_H */