Save sram context after changing MPU, DSP or core clocks
[linux-ginger.git] / drivers / cbus / retu.h
blobc9e044c1494543003227396a2d273e3f32c2266c
1 /**
2 * drivers/cbus/retu.h
4 * Copyright (C) 2004, 2005 Nokia Corporation
6 * Written by Juha Yrjölä <juha.yrjola@nokia.com> and
7 * David Weinehall <david.weinehall@nokia.com>
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file "COPYING" in the main directory of this
11 * archive for more details.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifndef __DRIVERS_CBUS_RETU_H
24 #define __DRIVERS_CBUS_RETU_H
26 #include <linux/types.h>
28 /* Registers */
29 #define RETU_REG_ASICR 0x00 /* ASIC ID & revision */
30 #define RETU_REG_IDR 0x01 /* Interrupt ID */
31 #define RETU_REG_IMR 0x02 /* Interrupt mask */
32 #define RETU_REG_RTCDSR 0x03 /* RTC seconds register */
33 #define RETU_REG_RTCHMR 0x04 /* RTC hours and minutes register */
34 #define RETU_REG_RTCHMAR 0x05 /* RTC hours and minutes alarm and time set register */
35 #define RETU_REG_RTCCALR 0x06 /* RTC calibration register */
36 #define RETU_REG_ADCR 0x08 /* ADC result */
37 #define RETU_REG_ADCSCR 0x09 /* ADC sample ctrl */
38 #define RETU_REG_CC1 0x0d /* Common control register 1 */
39 #define RETU_REG_CC2 0x0e /* Common control register 2 */
40 #define RETU_REG_CTRL_CLR 0x0f /* Regulator clear register */
41 #define RETU_REG_CTRL_SET 0x10 /* Regulator set register */
42 #define RETU_REG_STATUS 0x16 /* Status register */
43 #define RETU_REG_WATCHDOG 0x17 /* Watchdog register */
44 #define RETU_REG_AUDTXR 0x18 /* Audio Codec Tx register */
45 #define RETU_REG_MAX 0x1f
47 /* Interrupt sources */
48 #define RETU_INT_PWR 0
49 #define RETU_INT_CHAR 1
50 #define RETU_INT_RTCS 2
51 #define RETU_INT_RTCM 3
52 #define RETU_INT_RTCD 4
53 #define RETU_INT_RTCA 5
54 #define RETU_INT_HOOK 6
55 #define RETU_INT_HEAD 7
56 #define RETU_INT_ADCS 8
58 #define MAX_RETU_IRQ_HANDLERS 16
60 int retu_read_reg(int reg);
61 void retu_write_reg(int reg, u16 val);
62 void retu_set_clear_reg_bits(int reg, u16 set, u16 clear);
63 int retu_read_adc(int channel);
64 int retu_request_irq(int id, void *irq_handler, unsigned long arg, char *name);
65 void retu_free_irq(int id);
66 void retu_enable_irq(int id);
67 void retu_disable_irq(int id);
68 void retu_ack_irq(int id);
70 #ifdef CONFIG_CBUS_RETU_USER
71 int retu_user_init(void);
72 void retu_user_cleanup(void);
73 #endif
75 extern spinlock_t retu_lock;
77 #endif /* __DRIVERS_CBUS_RETU_H */