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Save sram context after changing MPU, DSP or core clocks
[linux-ginger.git] / drivers / net / netx-eth.c
blob9f4235466d596fdfbfcbf19bdfe4603c27fd48c8
1 /*
2 * drivers/net/netx-eth.c
3 *
4 * Copyright (c) 2005 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2
8 * as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/delay.h>
24
25 #include <linux/netdevice.h>
26 #include <linux/platform_device.h>
27 #include <linux/etherdevice.h>
28 #include <linux/skbuff.h>
29 #include <linux/mii.h>
30
31 #include <asm/io.h>
32 #include <mach/hardware.h>
33 #include <mach/netx-regs.h>
34 #include <mach/pfifo.h>
35 #include <mach/xc.h>
36 #include <mach/eth.h>
37
38 /* XC Fifo Offsets */
39 #define EMPTY_PTR_FIFO(xcno) (0 + ((xcno) << 3)) /* Index of the empty pointer FIFO */
40 #define IND_FIFO_PORT_HI(xcno) (1 + ((xcno) << 3)) /* Index of the FIFO where received */
41 /* Data packages are indicated by XC */
42 #define IND_FIFO_PORT_LO(xcno) (2 + ((xcno) << 3)) /* Index of the FIFO where received */
43 /* Data packages are indicated by XC */
44 #define REQ_FIFO_PORT_HI(xcno) (3 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
45 /* have to be indicated by ARM which */
46 /* shall be sent */
47 #define REQ_FIFO_PORT_LO(xcno) (4 + ((xcno) << 3)) /* Index of the FIFO where Data packages */
48 /* have to be indicated by ARM which shall */
49 /* be sent */
50 #define CON_FIFO_PORT_HI(xcno) (5 + ((xcno) << 3)) /* Index of the FIFO where sent Data packages */
51 /* are confirmed */
52 #define CON_FIFO_PORT_LO(xcno) (6 + ((xcno) << 3)) /* Index of the FIFO where sent Data */
53 /* packages are confirmed */
54 #define PFIFO_MASK(xcno) (0x7f << (xcno*8))
55
56 #define FIFO_PTR_FRAMELEN_SHIFT 0
57 #define FIFO_PTR_FRAMELEN_MASK (0x7ff << 0)
58 #define FIFO_PTR_FRAMELEN(len) (((len) << 0) & FIFO_PTR_FRAMELEN_MASK)
59 #define FIFO_PTR_TIMETRIG (1<<11)
60 #define FIFO_PTR_MULTI_REQ
61 #define FIFO_PTR_ORIGIN (1<<14)
62 #define FIFO_PTR_VLAN (1<<15)
63 #define FIFO_PTR_FRAMENO_SHIFT 16
64 #define FIFO_PTR_FRAMENO_MASK (0x3f << 16)
65 #define FIFO_PTR_FRAMENO(no) (((no) << 16) & FIFO_PTR_FRAMENO_MASK)
66 #define FIFO_PTR_SEGMENT_SHIFT 22
67 #define FIFO_PTR_SEGMENT_MASK (0xf << 22)
68 #define FIFO_PTR_SEGMENT(seg) (((seg) & 0xf) << 22)
69 #define FIFO_PTR_ERROR_SHIFT 28
70 #define FIFO_PTR_ERROR_MASK (0xf << 28)
71
72 #define ISR_LINK_STATUS_CHANGE (1<<4)
73 #define ISR_IND_LO (1<<3)
74 #define ISR_CON_LO (1<<2)
75 #define ISR_IND_HI (1<<1)
76 #define ISR_CON_HI (1<<0)
77
78 #define ETH_MAC_LOCAL_CONFIG 0x1560
79 #define ETH_MAC_4321 0x1564
80 #define ETH_MAC_65 0x1568
81
82 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT 16
83 #define MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK (0xf<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT)
84 #define MAC_TRAFFIC_CLASS_ARRANGEMENT(x) (((x)<<MAC_TRAFFIC_CLASS_ARRANGEMENT_SHIFT) & MAC_TRAFFIC_CLASS_ARRANGEMENT_MASK)
85 #define LOCAL_CONFIG_LINK_STATUS_IRQ_EN (1<<24)
86 #define LOCAL_CONFIG_CON_LO_IRQ_EN (1<<23)
87 #define LOCAL_CONFIG_CON_HI_IRQ_EN (1<<22)
88 #define LOCAL_CONFIG_IND_LO_IRQ_EN (1<<21)
89 #define LOCAL_CONFIG_IND_HI_IRQ_EN (1<<20)
90
91 #define CARDNAME "netx-eth"
92
93 /* LSB must be zero */
94 #define INTERNAL_PHY_ADR 0x1c
95
96 struct netx_eth_priv {
97 void __iomem *sram_base, *xpec_base, *xmac_base;
98 int id;
99 struct mii_if_info mii;
100 u32 msg_enable;
101 struct xc *xc;
102 spinlock_t lock;
103 };
104
105 static void netx_eth_set_multicast_list(struct net_device *ndev)
106 {
107 /* implement me */
108 }
109
110 static int
111 netx_eth_hard_start_xmit(struct sk_buff *skb, struct net_device *ndev)
112 {
113 struct netx_eth_priv *priv = netdev_priv(ndev);
114 unsigned char *buf = skb->data;
115 unsigned int len = skb->len;
116
117 spin_lock_irq(&priv->lock);
118 memcpy_toio(priv->sram_base + 1560, (void *)buf, len);
119 if (len < 60) {
120 memset_io(priv->sram_base + 1560 + len, 0, 60 - len);
121 len = 60;
122 }
123
124 pfifo_push(REQ_FIFO_PORT_LO(priv->id),
125 FIFO_PTR_SEGMENT(priv->id) |
126 FIFO_PTR_FRAMENO(1) |
127 FIFO_PTR_FRAMELEN(len));
128
129 ndev->trans_start = jiffies;
130 ndev->stats.tx_packets++;
131 ndev->stats.tx_bytes += skb->len;
132
133 netif_stop_queue(ndev);
134 spin_unlock_irq(&priv->lock);
135 dev_kfree_skb(skb);
136
137 return NETDEV_TX_OK;
138 }
139
140 static void netx_eth_receive(struct net_device *ndev)
141 {
142 struct netx_eth_priv *priv = netdev_priv(ndev);
143 unsigned int val, frameno, seg, len;
144 unsigned char *data;
145 struct sk_buff *skb;
146
147 val = pfifo_pop(IND_FIFO_PORT_LO(priv->id));
148
149 frameno = (val & FIFO_PTR_FRAMENO_MASK) >> FIFO_PTR_FRAMENO_SHIFT;
150 seg = (val & FIFO_PTR_SEGMENT_MASK) >> FIFO_PTR_SEGMENT_SHIFT;
151 len = (val & FIFO_PTR_FRAMELEN_MASK) >> FIFO_PTR_FRAMELEN_SHIFT;
152
153 skb = dev_alloc_skb(len);
154 if (unlikely(skb == NULL)) {
155 printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
156 ndev->name);
157 ndev->stats.rx_dropped++;
158 return;
159 }
160
161 data = skb_put(skb, len);
162
163 memcpy_fromio(data, priv->sram_base + frameno * 1560, len);
164
165 pfifo_push(EMPTY_PTR_FIFO(priv->id),
166 FIFO_PTR_SEGMENT(seg) | FIFO_PTR_FRAMENO(frameno));
167
168 skb->protocol = eth_type_trans(skb, ndev);
169 netif_rx(skb);
170 ndev->stats.rx_packets++;
171 ndev->stats.rx_bytes += len;
172 }
173
174 static irqreturn_t
175 netx_eth_interrupt(int irq, void *dev_id)
176 {
177 struct net_device *ndev = dev_id;
178 struct netx_eth_priv *priv = netdev_priv(ndev);
179 int status;
180 unsigned long flags;
181
182 spin_lock_irqsave(&priv->lock, flags);
183
184 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
185 while (status) {
186 int fill_level;
187 writel(status, NETX_PFIFO_XPEC_ISR(priv->id));
188
189 if ((status & ISR_CON_HI) || (status & ISR_IND_HI))
190 printk("%s: unexpected status: 0x%08x\n",
191 __func__, status);
192
193 fill_level =
194 readl(NETX_PFIFO_FILL_LEVEL(IND_FIFO_PORT_LO(priv->id)));
195 while (fill_level--)
196 netx_eth_receive(ndev);
197
198 if (status & ISR_CON_LO)
199 netif_wake_queue(ndev);
200
201 if (status & ISR_LINK_STATUS_CHANGE)
202 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
203
204 status = readl(NETX_PFIFO_XPEC_ISR(priv->id));
205 }
206 spin_unlock_irqrestore(&priv->lock, flags);
207 return IRQ_HANDLED;
208 }
209
210 static int netx_eth_open(struct net_device *ndev)
211 {
212 struct netx_eth_priv *priv = netdev_priv(ndev);
213
214 if (request_irq
215 (ndev->irq, &netx_eth_interrupt, IRQF_SHARED, ndev->name, ndev))
216 return -EAGAIN;
217
218 writel(ndev->dev_addr[0] |
219 ndev->dev_addr[1]<<8 |
220 ndev->dev_addr[2]<<16 |
221 ndev->dev_addr[3]<<24,
222 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
223 writel(ndev->dev_addr[4] |
224 ndev->dev_addr[5]<<8,
225 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
226
227 writel(LOCAL_CONFIG_LINK_STATUS_IRQ_EN |
228 LOCAL_CONFIG_CON_LO_IRQ_EN |
229 LOCAL_CONFIG_CON_HI_IRQ_EN |
230 LOCAL_CONFIG_IND_LO_IRQ_EN |
231 LOCAL_CONFIG_IND_HI_IRQ_EN,
232 priv->xpec_base + NETX_XPEC_RAM_START_OFS +
233 ETH_MAC_LOCAL_CONFIG);
234
235 mii_check_media(&priv->mii, netif_msg_link(priv), 1);
236 netif_start_queue(ndev);
237
238 return 0;
239 }
240
241 static int netx_eth_close(struct net_device *ndev)
242 {
243 struct netx_eth_priv *priv = netdev_priv(ndev);
244
245 netif_stop_queue(ndev);
246
247 writel(0,
248 priv->xpec_base + NETX_XPEC_RAM_START_OFS + ETH_MAC_LOCAL_CONFIG);
249
250 free_irq(ndev->irq, ndev);
251
252 return 0;
253 }
254
255 static void netx_eth_timeout(struct net_device *ndev)
256 {
257 struct netx_eth_priv *priv = netdev_priv(ndev);
258 int i;
259
260 printk(KERN_ERR "%s: transmit timed out, resetting\n", ndev->name);
261
262 spin_lock_irq(&priv->lock);
263
264 xc_reset(priv->xc);
265 xc_start(priv->xc);
266
267 for (i=2; i<=18; i++)
268 pfifo_push(EMPTY_PTR_FIFO(priv->id),
269 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
270
271 spin_unlock_irq(&priv->lock);
272
273 netif_wake_queue(ndev);
274 }
275
276 static int
277 netx_eth_phy_read(struct net_device *ndev, int phy_id, int reg)
278 {
279 unsigned int val;
280
281 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
282 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES;
283
284 writel(val, NETX_MIIMU);
285 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
286
287 return readl(NETX_MIIMU) >> 16;
288
289 }
290
291 static void
292 netx_eth_phy_write(struct net_device *ndev, int phy_id, int reg, int value)
293 {
294 unsigned int val;
295
296 val = MIIMU_SNRDY | MIIMU_PREAMBLE | MIIMU_PHYADDR(phy_id) |
297 MIIMU_REGADDR(reg) | MIIMU_PHY_NRES | MIIMU_OPMODE_WRITE |
298 MIIMU_DATA(value);
299
300 writel(val, NETX_MIIMU);
301 while (readl(NETX_MIIMU) & MIIMU_SNRDY);
302 }
303
304 static const struct net_device_ops netx_eth_netdev_ops = {
305 .ndo_open = netx_eth_open,
306 .ndo_stop = netx_eth_close,
307 .ndo_start_xmit = netx_eth_hard_start_xmit,
308 .ndo_tx_timeout = netx_eth_timeout,
309 .ndo_set_multicast_list = netx_eth_set_multicast_list,
310 .ndo_change_mtu = eth_change_mtu,
311 .ndo_validate_addr = eth_validate_addr,
312 .ndo_set_mac_address = eth_mac_addr,
313 };
314
315 static int netx_eth_enable(struct net_device *ndev)
316 {
317 struct netx_eth_priv *priv = netdev_priv(ndev);
318 unsigned int mac4321, mac65;
319 int running, i;
320
321 ether_setup(ndev);
322
323 ndev->netdev_ops = &netx_eth_netdev_ops;
324 ndev->watchdog_timeo = msecs_to_jiffies(5000);
325
326 priv->msg_enable = NETIF_MSG_LINK;
327 priv->mii.phy_id_mask = 0x1f;
328 priv->mii.reg_num_mask = 0x1f;
329 priv->mii.force_media = 0;
330 priv->mii.full_duplex = 0;
331 priv->mii.dev = ndev;
332 priv->mii.mdio_read = netx_eth_phy_read;
333 priv->mii.mdio_write = netx_eth_phy_write;
334 priv->mii.phy_id = INTERNAL_PHY_ADR + priv->id;
335
336 running = xc_running(priv->xc);
337 xc_stop(priv->xc);
338
339 /* if the xc engine is already running, assume the bootloader has
340 * loaded the firmware for us
341 */
342 if (running) {
343 /* get Node Address from hardware */
344 mac4321 = readl(priv->xpec_base +
345 NETX_XPEC_RAM_START_OFS + ETH_MAC_4321);
346 mac65 = readl(priv->xpec_base +
347 NETX_XPEC_RAM_START_OFS + ETH_MAC_65);
348
349 ndev->dev_addr[0] = mac4321 & 0xff;
350 ndev->dev_addr[1] = (mac4321 >> 8) & 0xff;
351 ndev->dev_addr[2] = (mac4321 >> 16) & 0xff;
352 ndev->dev_addr[3] = (mac4321 >> 24) & 0xff;
353 ndev->dev_addr[4] = mac65 & 0xff;
354 ndev->dev_addr[5] = (mac65 >> 8) & 0xff;
355 } else {
356 if (xc_request_firmware(priv->xc)) {
357 printk(CARDNAME ": requesting firmware failed\n");
358 return -ENODEV;
359 }
360 }
361
362 xc_reset(priv->xc);
363 xc_start(priv->xc);
364
365 if (!is_valid_ether_addr(ndev->dev_addr))
366 printk("%s: Invalid ethernet MAC address. Please "
367 "set using ifconfig\n", ndev->name);
368
369 for (i=2; i<=18; i++)
370 pfifo_push(EMPTY_PTR_FIFO(priv->id),
371 FIFO_PTR_FRAMENO(i) | FIFO_PTR_SEGMENT(priv->id));
372
373 return register_netdev(ndev);
374
375 }
376
377 static int netx_eth_drv_probe(struct platform_device *pdev)
378 {
379 struct netx_eth_priv *priv;
380 struct net_device *ndev;
381 struct netxeth_platform_data *pdata;
382 int ret;
383
384 ndev = alloc_etherdev(sizeof (struct netx_eth_priv));
385 if (!ndev) {
386 printk("%s: could not allocate device.\n", CARDNAME);
387 ret = -ENOMEM;
388 goto exit;
389 }
390 SET_NETDEV_DEV(ndev, &pdev->dev);
391
392 platform_set_drvdata(pdev, ndev);
393
394 priv = netdev_priv(ndev);
395
396 pdata = (struct netxeth_platform_data *)pdev->dev.platform_data;
397 priv->xc = request_xc(pdata->xcno, &pdev->dev);
398 if (!priv->xc) {
399 dev_err(&pdev->dev, "unable to request xc engine\n");
400 ret = -ENODEV;
401 goto exit_free_netdev;
402 }
403
404 ndev->irq = priv->xc->irq;
405 priv->id = pdev->id;
406 priv->xpec_base = priv->xc->xpec_base;
407 priv->xmac_base = priv->xc->xmac_base;
408 priv->sram_base = priv->xc->sram_base;
409
410 spin_lock_init(&priv->lock);
411
412 ret = pfifo_request(PFIFO_MASK(priv->id));
413 if (ret) {
414 printk("unable to request PFIFO\n");
415 goto exit_free_xc;
416 }
417
418 ret = netx_eth_enable(ndev);
419 if (ret)
420 goto exit_free_pfifo;
421
422 return 0;
423 exit_free_pfifo:
424 pfifo_free(PFIFO_MASK(priv->id));
425 exit_free_xc:
426 free_xc(priv->xc);
427 exit_free_netdev:
428 platform_set_drvdata(pdev, NULL);
429 free_netdev(ndev);
430 exit:
431 return ret;
432 }
433
434 static int netx_eth_drv_remove(struct platform_device *pdev)
435 {
436 struct net_device *ndev = dev_get_drvdata(&pdev->dev);
437 struct netx_eth_priv *priv = netdev_priv(ndev);
438
439 platform_set_drvdata(pdev, NULL);
440
441 unregister_netdev(ndev);
442 xc_stop(priv->xc);
443 free_xc(priv->xc);
444 free_netdev(ndev);
445 pfifo_free(PFIFO_MASK(priv->id));
446
447 return 0;
448 }
449
450 static int netx_eth_drv_suspend(struct platform_device *pdev, pm_message_t state)
451 {
452 dev_err(&pdev->dev, "suspend not implemented\n");
453 return 0;
454 }
455
456 static int netx_eth_drv_resume(struct platform_device *pdev)
457 {
458 dev_err(&pdev->dev, "resume not implemented\n");
459 return 0;
460 }
461
462 static struct platform_driver netx_eth_driver = {
463 .probe = netx_eth_drv_probe,
464 .remove = netx_eth_drv_remove,
465 .suspend = netx_eth_drv_suspend,
466 .resume = netx_eth_drv_resume,
467 .driver = {
468 .name = CARDNAME,
469 .owner = THIS_MODULE,
470 },
471 };
472
473 static int __init netx_eth_init(void)
474 {
475 unsigned int phy_control, val;
476
477 printk("NetX Ethernet driver\n");
478
479 phy_control = PHY_CONTROL_PHY_ADDRESS(INTERNAL_PHY_ADR>>1) |
480 PHY_CONTROL_PHY1_MODE(PHY_MODE_ALL) |
481 PHY_CONTROL_PHY1_AUTOMDIX |
482 PHY_CONTROL_PHY1_EN |
483 PHY_CONTROL_PHY0_MODE(PHY_MODE_ALL) |
484 PHY_CONTROL_PHY0_AUTOMDIX |
485 PHY_CONTROL_PHY0_EN |
486 PHY_CONTROL_CLK_XLATIN;
487
488 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
489 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
490
491 writel(phy_control | PHY_CONTROL_RESET, NETX_SYSTEM_PHY_CONTROL);
492 udelay(100);
493
494 val = readl(NETX_SYSTEM_IOC_ACCESS_KEY);
495 writel(val, NETX_SYSTEM_IOC_ACCESS_KEY);
496
497 writel(phy_control, NETX_SYSTEM_PHY_CONTROL);
498
499 return platform_driver_register(&netx_eth_driver);
500 }
501
502 static void __exit netx_eth_cleanup(void)
503 {
504 platform_driver_unregister(&netx_eth_driver);
505 }
506
507 module_init(netx_eth_init);
508 module_exit(netx_eth_cleanup);
509
510 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
511 MODULE_LICENSE("GPL");
512 MODULE_ALIAS("platform:" CARDNAME);
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