Save sram context after changing MPU, DSP or core clocks
[linux-ginger.git] / drivers / net / wireless / wl12xx / wl1251_io.c
blobf1c232e0887fb65b2e1c51af82e3e9c9a89eac78
1 /*
2 * This file is part of wl12xx
4 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
24 #include "wl1251.h"
25 #include "wl1251_reg.h"
26 #include "wl1251_io.h"
28 /* FIXME: this is static data nowadays and the table can be removed */
29 static enum wl12xx_acx_int_reg wl1251_io_reg_table[ACX_REG_TABLE_LEN] = {
30 [ACX_REG_INTERRUPT_TRIG] = (REGISTERS_BASE + 0x0474),
31 [ACX_REG_INTERRUPT_TRIG_H] = (REGISTERS_BASE + 0x0478),
32 [ACX_REG_INTERRUPT_MASK] = (REGISTERS_BASE + 0x0494),
33 [ACX_REG_HINT_MASK_SET] = (REGISTERS_BASE + 0x0498),
34 [ACX_REG_HINT_MASK_CLR] = (REGISTERS_BASE + 0x049C),
35 [ACX_REG_INTERRUPT_NO_CLEAR] = (REGISTERS_BASE + 0x04B0),
36 [ACX_REG_INTERRUPT_CLEAR] = (REGISTERS_BASE + 0x04A4),
37 [ACX_REG_INTERRUPT_ACK] = (REGISTERS_BASE + 0x04A8),
38 [ACX_REG_SLV_SOFT_RESET] = (REGISTERS_BASE + 0x0000),
39 [ACX_REG_EE_START] = (REGISTERS_BASE + 0x080C),
40 [ACX_REG_ECPU_CONTROL] = (REGISTERS_BASE + 0x0804)
43 static int wl1251_translate_reg_addr(struct wl1251 *wl, int addr)
45 /* If the address is lower than REGISTERS_BASE, it means that this is
46 * a chip-specific register address, so look it up in the registers
47 * table */
48 if (addr < REGISTERS_BASE) {
49 /* Make sure we don't go over the table */
50 if (addr >= ACX_REG_TABLE_LEN) {
51 wl1251_error("address out of range (%d)", addr);
52 return -EINVAL;
54 addr = wl1251_io_reg_table[addr];
57 return addr - wl->physical_reg_addr + wl->virtual_reg_addr;
60 static int wl1251_translate_mem_addr(struct wl1251 *wl, int addr)
62 return addr - wl->physical_mem_addr + wl->virtual_mem_addr;
65 void wl1251_mem_read(struct wl1251 *wl, int addr, void *buf, size_t len)
67 int physical;
69 physical = wl1251_translate_mem_addr(wl, addr);
71 wl->if_ops->read(wl, physical, buf, len);
74 void wl1251_mem_write(struct wl1251 *wl, int addr, void *buf, size_t len)
76 int physical;
78 physical = wl1251_translate_mem_addr(wl, addr);
80 wl->if_ops->write(wl, physical, buf, len);
83 u32 wl1251_mem_read32(struct wl1251 *wl, int addr)
85 return wl1251_read32(wl, wl1251_translate_mem_addr(wl, addr));
88 void wl1251_mem_write32(struct wl1251 *wl, int addr, u32 val)
90 wl1251_write32(wl, wl1251_translate_mem_addr(wl, addr), val);
93 u32 wl1251_reg_read32(struct wl1251 *wl, int addr)
95 return wl1251_read32(wl, wl1251_translate_reg_addr(wl, addr));
98 void wl1251_reg_write32(struct wl1251 *wl, int addr, u32 val)
100 wl1251_write32(wl, wl1251_translate_reg_addr(wl, addr), val);
103 /* Set the partitions to access the chip addresses.
105 * There are two VIRTUAL partitions (the memory partition and the
106 * registers partition), which are mapped to two different areas of the
107 * PHYSICAL (hardware) memory. This function also makes other checks to
108 * ensure that the partitions are not overlapping. In the diagram below, the
109 * memory partition comes before the register partition, but the opposite is
110 * also supported.
112 * PHYSICAL address
113 * space
115 * | |
116 * ...+----+--> mem_start
117 * VIRTUAL address ... | |
118 * space ... | | [PART_0]
119 * ... | |
120 * 0x00000000 <--+----+... ...+----+--> mem_start + mem_size
121 * | | ... | |
122 * |MEM | ... | |
123 * | | ... | |
124 * part_size <--+----+... | | {unused area)
125 * | | ... | |
126 * |REG | ... | |
127 * part_size | | ... | |
128 * + <--+----+... ...+----+--> reg_start
129 * reg_size ... | |
130 * ... | | [PART_1]
131 * ... | |
132 * ...+----+--> reg_start + reg_size
133 * | |
136 void wl1251_set_partition(struct wl1251 *wl,
137 u32 mem_start, u32 mem_size,
138 u32 reg_start, u32 reg_size)
140 struct wl1251_partition partition[2];
142 wl1251_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
143 mem_start, mem_size);
144 wl1251_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
145 reg_start, reg_size);
147 /* Make sure that the two partitions together don't exceed the
148 * address range */
149 if ((mem_size + reg_size) > HW_ACCESS_MEMORY_MAX_RANGE) {
150 wl1251_debug(DEBUG_SPI, "Total size exceeds maximum virtual"
151 " address range. Truncating partition[0].");
152 mem_size = HW_ACCESS_MEMORY_MAX_RANGE - reg_size;
153 wl1251_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
154 mem_start, mem_size);
155 wl1251_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
156 reg_start, reg_size);
159 if ((mem_start < reg_start) &&
160 ((mem_start + mem_size) > reg_start)) {
161 /* Guarantee that the memory partition doesn't overlap the
162 * registers partition */
163 wl1251_debug(DEBUG_SPI, "End of partition[0] is "
164 "overlapping partition[1]. Adjusted.");
165 mem_size = reg_start - mem_start;
166 wl1251_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
167 mem_start, mem_size);
168 wl1251_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
169 reg_start, reg_size);
170 } else if ((reg_start < mem_start) &&
171 ((reg_start + reg_size) > mem_start)) {
172 /* Guarantee that the register partition doesn't overlap the
173 * memory partition */
174 wl1251_debug(DEBUG_SPI, "End of partition[1] is"
175 " overlapping partition[0]. Adjusted.");
176 reg_size = mem_start - reg_start;
177 wl1251_debug(DEBUG_SPI, "mem_start %08X mem_size %08X",
178 mem_start, mem_size);
179 wl1251_debug(DEBUG_SPI, "reg_start %08X reg_size %08X",
180 reg_start, reg_size);
183 partition[0].start = mem_start;
184 partition[0].size = mem_size;
185 partition[1].start = reg_start;
186 partition[1].size = reg_size;
188 wl->physical_mem_addr = mem_start;
189 wl->physical_reg_addr = reg_start;
191 wl->virtual_mem_addr = 0;
192 wl->virtual_reg_addr = mem_size;
194 wl->if_ops->write(wl, HW_ACCESS_PART0_SIZE_ADDR, partition,
195 sizeof(partition));