drivers/staging/vt6655/baseband.c

   1 /*
   2  * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
   3  * All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or
   8  * (at your option) any later version.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, write to the Free Software Foundation, Inc.,
  17  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  *
  20  * File: baseband.c
  21  *
  22  * Purpose: Implement functions to access baseband
  23  *
  24  * Author: Kyle Hsu
  25  *
  26  * Date: Aug.22, 2002
  27  *
  28  * Functions:
  29  *      BBuGetFrameTime        - Calculate data frame transmitting time
  30  *      BBvCaculateParameter   - Caculate PhyLength, PhyService and Phy Signal parameter for baseband Tx
  31  *      BBbReadEmbeded         - Embeded read baseband register via MAC
  32  *      BBbWriteEmbeded        - Embeded write baseband register via MAC
  33  *      BBbIsRegBitsOn         - Test if baseband register bits on
  34  *      BBbIsRegBitsOff        - Test if baseband register bits off
  35  *      BBbVT3253Init          - VIA VT3253 baseband chip init code
  36  *      BBvReadAllRegs         - Read All Baseband Registers
  37  *      BBvLoopbackOn          - Turn on BaseBand Loopback mode
  38  *      BBvLoopbackOff         - Turn off BaseBand Loopback mode
  39  *
  40  * Revision History:
  41  *      06-10-2003 Bryan YC Fan:  Re-write codes to support VT3253 spec.
  42  *      08-07-2003 Bryan YC Fan:  Add MAXIM2827/2825 and RFMD2959 support.
  43  *      08-26-2003 Kyle Hsu    :  Modify BBuGetFrameTime() and BBvCaculateParameter().
  44  *                                cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
  45  *                                Add the comments.
  46  *      09-01-2003 Bryan YC Fan:  RF & BB tables updated.
  47  *                                Modified BBvLoopbackOn & BBvLoopbackOff().
  48  *
  49  *
  50  */
  51
  52 #include "tmacro.h"
  53 #include "tether.h"
  54 #include "mac.h"
  55 #include "baseband.h"
  56 #include "srom.h"
  57 #include "rf.h"
  58
  59 /*---------------------  Static Definitions -------------------------*/
  60 //static int          msglevel                =MSG_LEVEL_DEBUG;
  61 static int          msglevel                =MSG_LEVEL_INFO;
  62
  63 //#define       PLICE_DEBUG
  64
  65 /*---------------------  Static Classes  ----------------------------*/
  66
  67 /*---------------------  Static Variables  --------------------------*/
  68
  69 /*---------------------  Static Functions  --------------------------*/
  70
  71 /*---------------------  Export Variables  --------------------------*/
  72
  73 /*---------------------  Static Definitions -------------------------*/
  74
  75 /*---------------------  Static Classes  ----------------------------*/
  76
  77 /*---------------------  Static Variables  --------------------------*/
  78
  79
  80
  81 #define CB_VT3253_INIT_FOR_RFMD 446
  82 BYTE byVT3253InitTab_RFMD[CB_VT3253_INIT_FOR_RFMD][2] = {
  83     {0x00, 0x30},
  84     {0x01, 0x00},
  85     {0x02, 0x00},
  86     {0x03, 0x00},
  87     {0x04, 0x00},
  88     {0x05, 0x00},
  89     {0x06, 0x00},
  90     {0x07, 0x00},
  91     {0x08, 0x70},
  92     {0x09, 0x45},
  93     {0x0a, 0x2a},
  94     {0x0b, 0x76},
  95     {0x0c, 0x00},
  96     {0x0d, 0x01},
  97     {0x0e, 0x80},
  98     {0x0f, 0x00},
  99     {0x10, 0x00},
 100     {0x11, 0x00},
 101     {0x12, 0x00},
 102     {0x13, 0x00},
 103     {0x14, 0x00},
 104     {0x15, 0x00},
 105     {0x16, 0x00},
 106     {0x17, 0x00},
 107     {0x18, 0x00},
 108     {0x19, 0x00},
 109     {0x1a, 0x00},
 110     {0x1b, 0x9d},
 111     {0x1c, 0x05},
 112     {0x1d, 0x00},
 113     {0x1e, 0x00},
 114     {0x1f, 0x00},
 115     {0x20, 0x00},
 116     {0x21, 0x00},
 117     {0x22, 0x00},
 118     {0x23, 0x00},
 119     {0x24, 0x00},
 120     {0x25, 0x4a},
 121     {0x26, 0x00},
 122     {0x27, 0x00},
 123     {0x28, 0x00},
 124     {0x29, 0x00},
 125     {0x2a, 0x00},
 126     {0x2b, 0x00},
 127     {0x2c, 0x00},
 128     {0x2d, 0xa8},
 129     {0x2e, 0x1a},
 130     {0x2f, 0x0c},
 131     {0x30, 0x26},
 132     {0x31, 0x5b},
 133     {0x32, 0x00},
 134     {0x33, 0x00},
 135     {0x34, 0x00},
 136     {0x35, 0x00},
 137     {0x36, 0xaa},
 138     {0x37, 0xaa},
 139     {0x38, 0xff},
 140     {0x39, 0xff},
 141     {0x3a, 0x00},
 142     {0x3b, 0x00},
 143     {0x3c, 0x00},
 144     {0x3d, 0x0d},
 145     {0x3e, 0x51},
 146     {0x3f, 0x04},
 147     {0x40, 0x00},
 148     {0x41, 0x08},
 149     {0x42, 0x00},
 150     {0x43, 0x08},
 151     {0x44, 0x06},
 152     {0x45, 0x14},
 153     {0x46, 0x05},
 154     {0x47, 0x08},
 155     {0x48, 0x00},
 156     {0x49, 0x00},
 157     {0x4a, 0x00},
 158     {0x4b, 0x00},
 159     {0x4c, 0x09},
 160     {0x4d, 0x80},
 161     {0x4e, 0x00},
 162     {0x4f, 0xc5},
 163     {0x50, 0x14},
 164     {0x51, 0x19},
 165     {0x52, 0x00},
 166     {0x53, 0x00},
 167     {0x54, 0x00},
 168     {0x55, 0x00},
 169     {0x56, 0x00},
 170     {0x57, 0x00},
 171     {0x58, 0x00},
 172     {0x59, 0xb0},
 173     {0x5a, 0x00},
 174     {0x5b, 0x00},
 175     {0x5c, 0x00},
 176     {0x5d, 0x00},
 177     {0x5e, 0x00},
 178     {0x5f, 0x00},
 179     {0x60, 0x44},
 180     {0x61, 0x04},
 181     {0x62, 0x00},
 182     {0x63, 0x00},
 183     {0x64, 0x00},
 184     {0x65, 0x00},
 185     {0x66, 0x04},
 186     {0x67, 0xb7},
 187     {0x68, 0x00},
 188     {0x69, 0x00},
 189     {0x6a, 0x00},
 190     {0x6b, 0x00},
 191     {0x6c, 0x00},
 192     {0x6d, 0x03},
 193     {0x6e, 0x01},
 194     {0x6f, 0x00},
 195     {0x70, 0x00},
 196     {0x71, 0x00},
 197     {0x72, 0x00},
 198     {0x73, 0x00},
 199     {0x74, 0x00},
 200     {0x75, 0x00},
 201     {0x76, 0x00},
 202     {0x77, 0x00},
 203     {0x78, 0x00},
 204     {0x79, 0x00},
 205     {0x7a, 0x00},
 206     {0x7b, 0x00},
 207     {0x7c, 0x00},
 208     {0x7d, 0x00},
 209     {0x7e, 0x00},
 210     {0x7f, 0x00},
 211     {0x80, 0x0b},
 212     {0x81, 0x00},
 213     {0x82, 0x3c},
 214     {0x83, 0x00},
 215     {0x84, 0x00},
 216     {0x85, 0x00},
 217     {0x86, 0x00},
 218     {0x87, 0x00},
 219     {0x88, 0x08},
 220     {0x89, 0x00},
 221     {0x8a, 0x08},
 222     {0x8b, 0xa6},
 223     {0x8c, 0x84},
 224     {0x8d, 0x47},
 225     {0x8e, 0xbb},
 226     {0x8f, 0x02},
 227     {0x90, 0x21},
 228     {0x91, 0x0c},
 229     {0x92, 0x04},
 230     {0x93, 0x22},
 231     {0x94, 0x00},
 232     {0x95, 0x00},
 233     {0x96, 0x00},
 234     {0x97, 0xeb},
 235     {0x98, 0x00},
 236     {0x99, 0x00},
 237     {0x9a, 0x00},
 238     {0x9b, 0x00},
 239     {0x9c, 0x00},
 240     {0x9d, 0x00},
 241     {0x9e, 0x00},
 242     {0x9f, 0x00},
 243     {0xa0, 0x00},
 244     {0xa1, 0x00},
 245     {0xa2, 0x00},
 246     {0xa3, 0x00},
 247     {0xa4, 0x00},
 248     {0xa5, 0x00},
 249     {0xa6, 0x10},
 250     {0xa7, 0x04},
 251     {0xa8, 0x10},
 252     {0xa9, 0x00},
 253     {0xaa, 0x8f},
 254     {0xab, 0x00},
 255     {0xac, 0x00},
 256     {0xad, 0x00},
 257     {0xae, 0x00},
 258     {0xaf, 0x80},
 259     {0xb0, 0x38},
 260     {0xb1, 0x00},
 261     {0xb2, 0x00},
 262     {0xb3, 0x00},
 263     {0xb4, 0xee},
 264     {0xb5, 0xff},
 265     {0xb6, 0x10},
 266     {0xb7, 0x00},
 267     {0xb8, 0x00},
 268     {0xb9, 0x00},
 269     {0xba, 0x00},
 270     {0xbb, 0x03},
 271     {0xbc, 0x00},
 272     {0xbd, 0x00},
 273     {0xbe, 0x00},
 274     {0xbf, 0x00},
 275     {0xc0, 0x10},
 276     {0xc1, 0x10},
 277     {0xc2, 0x18},
 278     {0xc3, 0x20},
 279     {0xc4, 0x10},
 280     {0xc5, 0x00},
 281     {0xc6, 0x22},
 282     {0xc7, 0x14},
 283     {0xc8, 0x0f},
 284     {0xc9, 0x08},
 285     {0xca, 0xa4},
 286     {0xcb, 0xa7},
 287     {0xcc, 0x3c},
 288     {0xcd, 0x10},
 289     {0xce, 0x20},
 290     {0xcf, 0x00},
 291     {0xd0, 0x00},
 292     {0xd1, 0x10},
 293     {0xd2, 0x00},
 294     {0xd3, 0x00},
 295     {0xd4, 0x10},
 296     {0xd5, 0x33},
 297     {0xd6, 0x70},
 298     {0xd7, 0x01},
 299     {0xd8, 0x00},
 300     {0xd9, 0x00},
 301     {0xda, 0x00},
 302     {0xdb, 0x00},
 303     {0xdc, 0x00},
 304     {0xdd, 0x00},
 305     {0xde, 0x00},
 306     {0xdf, 0x00},
 307     {0xe0, 0x00},
 308     {0xe1, 0x00},
 309     {0xe2, 0xcc},
 310     {0xe3, 0x04},
 311     {0xe4, 0x08},
 312     {0xe5, 0x10},
 313     {0xe6, 0x00},
 314     {0xe7, 0x0e},
 315     {0xe8, 0x88},
 316     {0xe9, 0xd4},
 317     {0xea, 0x05},
 318     {0xeb, 0xf0},
 319     {0xec, 0x79},
 320     {0xed, 0x0f},
 321     {0xee, 0x04},
 322     {0xef, 0x04},
 323     {0xf0, 0x00},
 324     {0xf1, 0x00},
 325     {0xf2, 0x00},
 326     {0xf3, 0x00},
 327     {0xf4, 0x00},
 328     {0xf5, 0x00},
 329     {0xf6, 0x00},
 330     {0xf7, 0x00},
 331     {0xf8, 0x00},
 332     {0xf9, 0x00},
 333     {0xF0, 0x00},
 334     {0xF1, 0xF8},
 335     {0xF0, 0x80},
 336     {0xF0, 0x00},
 337     {0xF1, 0xF4},
 338     {0xF0, 0x81},
 339     {0xF0, 0x01},
 340     {0xF1, 0xF0},
 341     {0xF0, 0x82},
 342     {0xF0, 0x02},
 343     {0xF1, 0xEC},
 344     {0xF0, 0x83},
 345     {0xF0, 0x03},
 346     {0xF1, 0xE8},
 347     {0xF0, 0x84},
 348     {0xF0, 0x04},
 349     {0xF1, 0xE4},
 350     {0xF0, 0x85},
 351     {0xF0, 0x05},
 352     {0xF1, 0xE0},
 353     {0xF0, 0x86},
 354     {0xF0, 0x06},
 355     {0xF1, 0xDC},
 356     {0xF0, 0x87},
 357     {0xF0, 0x07},
 358     {0xF1, 0xD8},
 359     {0xF0, 0x88},
 360     {0xF0, 0x08},
 361     {0xF1, 0xD4},
 362     {0xF0, 0x89},
 363     {0xF0, 0x09},
 364     {0xF1, 0xD0},
 365     {0xF0, 0x8A},
 366     {0xF0, 0x0A},
 367     {0xF1, 0xCC},
 368     {0xF0, 0x8B},
 369     {0xF0, 0x0B},
 370     {0xF1, 0xC8},
 371     {0xF0, 0x8C},
 372     {0xF0, 0x0C},
 373     {0xF1, 0xC4},
 374     {0xF0, 0x8D},
 375     {0xF0, 0x0D},
 376     {0xF1, 0xC0},
 377     {0xF0, 0x8E},
 378     {0xF0, 0x0E},
 379     {0xF1, 0xBC},
 380     {0xF0, 0x8F},
 381     {0xF0, 0x0F},
 382     {0xF1, 0xB8},
 383     {0xF0, 0x90},
 384     {0xF0, 0x10},
 385     {0xF1, 0xB4},
 386     {0xF0, 0x91},
 387     {0xF0, 0x11},
 388     {0xF1, 0xB0},
 389     {0xF0, 0x92},
 390     {0xF0, 0x12},
 391     {0xF1, 0xAC},
 392     {0xF0, 0x93},
 393     {0xF0, 0x13},
 394     {0xF1, 0xA8},
 395     {0xF0, 0x94},
 396     {0xF0, 0x14},
 397     {0xF1, 0xA4},
 398     {0xF0, 0x95},
 399     {0xF0, 0x15},
 400     {0xF1, 0xA0},
 401     {0xF0, 0x96},
 402     {0xF0, 0x16},
 403     {0xF1, 0x9C},
 404     {0xF0, 0x97},
 405     {0xF0, 0x17},
 406     {0xF1, 0x98},
 407     {0xF0, 0x98},
 408     {0xF0, 0x18},
 409     {0xF1, 0x94},
 410     {0xF0, 0x99},
 411     {0xF0, 0x19},
 412     {0xF1, 0x90},
 413     {0xF0, 0x9A},
 414     {0xF0, 0x1A},
 415     {0xF1, 0x8C},
 416     {0xF0, 0x9B},
 417     {0xF0, 0x1B},
 418     {0xF1, 0x88},
 419     {0xF0, 0x9C},
 420     {0xF0, 0x1C},
 421     {0xF1, 0x84},
 422     {0xF0, 0x9D},
 423     {0xF0, 0x1D},
 424     {0xF1, 0x80},
 425     {0xF0, 0x9E},
 426     {0xF0, 0x1E},
 427     {0xF1, 0x7C},
 428     {0xF0, 0x9F},
 429     {0xF0, 0x1F},
 430     {0xF1, 0x78},
 431     {0xF0, 0xA0},
 432     {0xF0, 0x20},
 433     {0xF1, 0x74},
 434     {0xF0, 0xA1},
 435     {0xF0, 0x21},
 436     {0xF1, 0x70},
 437     {0xF0, 0xA2},
 438     {0xF0, 0x22},
 439     {0xF1, 0x6C},
 440     {0xF0, 0xA3},
 441     {0xF0, 0x23},
 442     {0xF1, 0x68},
 443     {0xF0, 0xA4},
 444     {0xF0, 0x24},
 445     {0xF1, 0x64},
 446     {0xF0, 0xA5},
 447     {0xF0, 0x25},
 448     {0xF1, 0x60},
 449     {0xF0, 0xA6},
 450     {0xF0, 0x26},
 451     {0xF1, 0x5C},
 452     {0xF0, 0xA7},
 453     {0xF0, 0x27},
 454     {0xF1, 0x58},
 455     {0xF0, 0xA8},
 456     {0xF0, 0x28},
 457     {0xF1, 0x54},
 458     {0xF0, 0xA9},
 459     {0xF0, 0x29},
 460     {0xF1, 0x50},
 461     {0xF0, 0xAA},
 462     {0xF0, 0x2A},
 463     {0xF1, 0x4C},
 464     {0xF0, 0xAB},
 465     {0xF0, 0x2B},
 466     {0xF1, 0x48},
 467     {0xF0, 0xAC},
 468     {0xF0, 0x2C},
 469     {0xF1, 0x44},
 470     {0xF0, 0xAD},
 471     {0xF0, 0x2D},
 472     {0xF1, 0x40},
 473     {0xF0, 0xAE},
 474     {0xF0, 0x2E},
 475     {0xF1, 0x3C},
 476     {0xF0, 0xAF},
 477     {0xF0, 0x2F},
 478     {0xF1, 0x38},
 479     {0xF0, 0xB0},
 480     {0xF0, 0x30},
 481     {0xF1, 0x34},
 482     {0xF0, 0xB1},
 483     {0xF0, 0x31},
 484     {0xF1, 0x30},
 485     {0xF0, 0xB2},
 486     {0xF0, 0x32},
 487     {0xF1, 0x2C},
 488     {0xF0, 0xB3},
 489     {0xF0, 0x33},
 490     {0xF1, 0x28},
 491     {0xF0, 0xB4},
 492     {0xF0, 0x34},
 493     {0xF1, 0x24},
 494     {0xF0, 0xB5},
 495     {0xF0, 0x35},
 496     {0xF1, 0x20},
 497     {0xF0, 0xB6},
 498     {0xF0, 0x36},
 499     {0xF1, 0x1C},
 500     {0xF0, 0xB7},
 501     {0xF0, 0x37},
 502     {0xF1, 0x18},
 503     {0xF0, 0xB8},
 504     {0xF0, 0x38},
 505     {0xF1, 0x14},
 506     {0xF0, 0xB9},
 507     {0xF0, 0x39},
 508     {0xF1, 0x10},
 509     {0xF0, 0xBA},
 510     {0xF0, 0x3A},
 511     {0xF1, 0x0C},
 512     {0xF0, 0xBB},
 513     {0xF0, 0x3B},
 514     {0xF1, 0x08},
 515     {0xF0, 0x00},
 516     {0xF0, 0x3C},
 517     {0xF1, 0x04},
 518     {0xF0, 0xBD},
 519     {0xF0, 0x3D},
 520     {0xF1, 0x00},
 521     {0xF0, 0xBE},
 522     {0xF0, 0x3E},
 523     {0xF1, 0x00},
 524     {0xF0, 0xBF},
 525     {0xF0, 0x3F},
 526     {0xF1, 0x00},
 527     {0xF0, 0xC0},
 528     {0xF0, 0x00},
 529 };
 530
 531 #define CB_VT3253B0_INIT_FOR_RFMD 256
 532 BYTE byVT3253B0_RFMD[CB_VT3253B0_INIT_FOR_RFMD][2] = {
 533     {0x00, 0x31},
 534     {0x01, 0x00},
 535     {0x02, 0x00},
 536     {0x03, 0x00},
 537     {0x04, 0x00},
 538     {0x05, 0x81},
 539     {0x06, 0x00},
 540     {0x07, 0x00},
 541     {0x08, 0x38},
 542     {0x09, 0x45},
 543     {0x0a, 0x2a},
 544     {0x0b, 0x76},
 545     {0x0c, 0x00},
 546     {0x0d, 0x00},
 547     {0x0e, 0x80},
 548     {0x0f, 0x00},
 549     {0x10, 0x00},
 550     {0x11, 0x00},
 551     {0x12, 0x00},
 552     {0x13, 0x00},
 553     {0x14, 0x00},
 554     {0x15, 0x00},
 555     {0x16, 0x00},
 556     {0x17, 0x00},
 557     {0x18, 0x00},
 558     {0x19, 0x00},
 559     {0x1a, 0x00},
 560     {0x1b, 0x8e},
 561     {0x1c, 0x06},
 562     {0x1d, 0x00},
 563     {0x1e, 0x00},
 564     {0x1f, 0x00},
 565     {0x20, 0x00},
 566     {0x21, 0x00},
 567     {0x22, 0x00},
 568     {0x23, 0x00},
 569     {0x24, 0x00},
 570     {0x25, 0x4a},
 571     {0x26, 0x00},
 572     {0x27, 0x00},
 573     {0x28, 0x00},
 574     {0x29, 0x00},
 575     {0x2a, 0x00},
 576     {0x2b, 0x00},
 577     {0x2c, 0x00},
 578     {0x2d, 0x34},
 579     {0x2e, 0x18},
 580     {0x2f, 0x0c},
 581     {0x30, 0x26},
 582     {0x31, 0x5b},
 583     {0x32, 0x00},
 584     {0x33, 0x00},
 585     {0x34, 0x00},
 586     {0x35, 0x00},
 587     {0x36, 0xaa},
 588     {0x37, 0xaa},
 589     {0x38, 0xff},
 590     {0x39, 0xff},
 591     {0x3a, 0xf8},
 592     {0x3b, 0x00},
 593     {0x3c, 0x00},
 594     {0x3d, 0x09},
 595     {0x3e, 0x0d},
 596     {0x3f, 0x04},
 597     {0x40, 0x00},
 598     {0x41, 0x08},
 599     {0x42, 0x00},
 600     {0x43, 0x08},
 601     {0x44, 0x08},
 602     {0x45, 0x14},
 603     {0x46, 0x05},
 604     {0x47, 0x08},
 605     {0x48, 0x00},
 606     {0x49, 0x00},
 607     {0x4a, 0x00},
 608     {0x4b, 0x00},
 609     {0x4c, 0x09},
 610     {0x4d, 0x80},
 611     {0x4e, 0x00},
 612     {0x4f, 0xc5},
 613     {0x50, 0x14},
 614     {0x51, 0x19},
 615     {0x52, 0x00},
 616     {0x53, 0x00},
 617     {0x54, 0x00},
 618     {0x55, 0x00},
 619     {0x56, 0x00},
 620     {0x57, 0x00},
 621     {0x58, 0x00},
 622     {0x59, 0xb0},
 623     {0x5a, 0x00},
 624     {0x5b, 0x00},
 625     {0x5c, 0x00},
 626     {0x5d, 0x00},
 627     {0x5e, 0x00},
 628     {0x5f, 0x00},
 629     {0x60, 0x39},
 630     {0x61, 0x83},
 631     {0x62, 0x00},
 632     {0x63, 0x00},
 633     {0x64, 0x00},
 634     {0x65, 0x00},
 635     {0x66, 0xc0},
 636     {0x67, 0x49},
 637     {0x68, 0x00},
 638     {0x69, 0x00},
 639     {0x6a, 0x00},
 640     {0x6b, 0x00},
 641     {0x6c, 0x00},
 642     {0x6d, 0x03},
 643     {0x6e, 0x01},
 644     {0x6f, 0x00},
 645     {0x70, 0x00},
 646     {0x71, 0x00},
 647     {0x72, 0x00},
 648     {0x73, 0x00},
 649     {0x74, 0x00},
 650     {0x75, 0x00},
 651     {0x76, 0x00},
 652     {0x77, 0x00},
 653     {0x78, 0x00},
 654     {0x79, 0x00},
 655     {0x7a, 0x00},
 656     {0x7b, 0x00},
 657     {0x7c, 0x00},
 658     {0x7d, 0x00},
 659     {0x7e, 0x00},
 660     {0x7f, 0x00},
 661     {0x80, 0x89},
 662     {0x81, 0x00},
 663     {0x82, 0x0e},
 664     {0x83, 0x00},
 665     {0x84, 0x00},
 666     {0x85, 0x00},
 667     {0x86, 0x00},
 668     {0x87, 0x00},
 669     {0x88, 0x08},
 670     {0x89, 0x00},
 671     {0x8a, 0x0e},
 672     {0x8b, 0xa7},
 673     {0x8c, 0x88},
 674     {0x8d, 0x47},
 675     {0x8e, 0xaa},
 676     {0x8f, 0x02},
 677     {0x90, 0x23},
 678     {0x91, 0x0c},
 679     {0x92, 0x06},
 680     {0x93, 0x08},
 681     {0x94, 0x00},
 682     {0x95, 0x00},
 683     {0x96, 0x00},
 684     {0x97, 0xeb},
 685     {0x98, 0x00},
 686     {0x99, 0x00},
 687     {0x9a, 0x00},
 688     {0x9b, 0x00},
 689     {0x9c, 0x00},
 690     {0x9d, 0x00},
 691     {0x9e, 0x00},
 692     {0x9f, 0x00},
 693     {0xa0, 0x00},
 694     {0xa1, 0x00},
 695     {0xa2, 0x00},
 696     {0xa3, 0xcd},
 697     {0xa4, 0x07},
 698     {0xa5, 0x33},
 699     {0xa6, 0x18},
 700     {0xa7, 0x00},
 701     {0xa8, 0x18},
 702     {0xa9, 0x00},
 703     {0xaa, 0x28},
 704     {0xab, 0x00},
 705     {0xac, 0x00},
 706     {0xad, 0x00},
 707     {0xae, 0x00},
 708     {0xaf, 0x18},
 709     {0xb0, 0x38},
 710     {0xb1, 0x30},
 711     {0xb2, 0x00},
 712     {0xb3, 0x00},
 713     {0xb4, 0x00},
 714     {0xb5, 0x00},
 715     {0xb6, 0x84},
 716     {0xb7, 0xfd},
 717     {0xb8, 0x00},
 718     {0xb9, 0x00},
 719     {0xba, 0x00},
 720     {0xbb, 0x03},
 721     {0xbc, 0x00},
 722     {0xbd, 0x00},
 723     {0xbe, 0x00},
 724     {0xbf, 0x00},
 725     {0xc0, 0x10},
 726     {0xc1, 0x20},
 727     {0xc2, 0x18},
 728     {0xc3, 0x20},
 729     {0xc4, 0x10},
 730     {0xc5, 0x2c},
 731     {0xc6, 0x1e},
 732     {0xc7, 0x10},
 733     {0xc8, 0x12},
 734     {0xc9, 0x01},
 735     {0xca, 0x6f},
 736     {0xcb, 0xa7},
 737     {0xcc, 0x3c},
 738     {0xcd, 0x10},
 739     {0xce, 0x00},
 740     {0xcf, 0x22},
 741     {0xd0, 0x00},
 742     {0xd1, 0x10},
 743     {0xd2, 0x00},
 744     {0xd3, 0x00},
 745     {0xd4, 0x10},
 746     {0xd5, 0x33},
 747     {0xd6, 0x80},
 748     {0xd7, 0x21},
 749     {0xd8, 0x00},
 750     {0xd9, 0x00},
 751     {0xda, 0x00},
 752     {0xdb, 0x00},
 753     {0xdc, 0x00},
 754     {0xdd, 0x00},
 755     {0xde, 0x00},
 756     {0xdf, 0x00},
 757     {0xe0, 0x00},
 758     {0xe1, 0xB3},
 759     {0xe2, 0x00},
 760     {0xe3, 0x00},
 761     {0xe4, 0x00},
 762     {0xe5, 0x10},
 763     {0xe6, 0x00},
 764     {0xe7, 0x18},
 765     {0xe8, 0x08},
 766     {0xe9, 0xd4},
 767     {0xea, 0x00},
 768     {0xeb, 0xff},
 769     {0xec, 0x79},
 770     {0xed, 0x10},
 771     {0xee, 0x30},
 772     {0xef, 0x02},
 773     {0xf0, 0x00},
 774     {0xf1, 0x09},
 775     {0xf2, 0x00},
 776     {0xf3, 0x00},
 777     {0xf4, 0x00},
 778     {0xf5, 0x00},
 779     {0xf6, 0x00},
 780     {0xf7, 0x00},
 781     {0xf8, 0x00},
 782     {0xf9, 0x00},
 783     {0xfa, 0x00},
 784     {0xfb, 0x00},
 785     {0xfc, 0x00},
 786     {0xfd, 0x00},
 787     {0xfe, 0x00},
 788     {0xff, 0x00},
 789 };
 790
 791 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
 792 // For RFMD2959
 793 BYTE byVT3253B0_AGC4_RFMD2959[CB_VT3253B0_AGC_FOR_RFMD2959][2] = {
 794     {0xF0, 0x00},
 795     {0xF1, 0x3E},
 796     {0xF0, 0x80},
 797     {0xF0, 0x00},
 798     {0xF1, 0x3E},
 799     {0xF0, 0x81},
 800     {0xF0, 0x01},
 801     {0xF1, 0x3E},
 802     {0xF0, 0x82},
 803     {0xF0, 0x02},
 804     {0xF1, 0x3E},
 805     {0xF0, 0x83},
 806     {0xF0, 0x03},
 807     {0xF1, 0x3B},
 808     {0xF0, 0x84},
 809     {0xF0, 0x04},
 810     {0xF1, 0x39},
 811     {0xF0, 0x85},
 812     {0xF0, 0x05},
 813     {0xF1, 0x38},
 814     {0xF0, 0x86},
 815     {0xF0, 0x06},
 816     {0xF1, 0x37},
 817     {0xF0, 0x87},
 818     {0xF0, 0x07},
 819     {0xF1, 0x36},
 820     {0xF0, 0x88},
 821     {0xF0, 0x08},
 822     {0xF1, 0x35},
 823     {0xF0, 0x89},
 824     {0xF0, 0x09},
 825     {0xF1, 0x35},
 826     {0xF0, 0x8A},
 827     {0xF0, 0x0A},
 828     {0xF1, 0x34},
 829     {0xF0, 0x8B},
 830     {0xF0, 0x0B},
 831     {0xF1, 0x34},
 832     {0xF0, 0x8C},
 833     {0xF0, 0x0C},
 834     {0xF1, 0x33},
 835     {0xF0, 0x8D},
 836     {0xF0, 0x0D},
 837     {0xF1, 0x32},
 838     {0xF0, 0x8E},
 839     {0xF0, 0x0E},
 840     {0xF1, 0x31},
 841     {0xF0, 0x8F},
 842     {0xF0, 0x0F},
 843     {0xF1, 0x30},
 844     {0xF0, 0x90},
 845     {0xF0, 0x10},
 846     {0xF1, 0x2F},
 847     {0xF0, 0x91},
 848     {0xF0, 0x11},
 849     {0xF1, 0x2F},
 850     {0xF0, 0x92},
 851     {0xF0, 0x12},
 852     {0xF1, 0x2E},
 853     {0xF0, 0x93},
 854     {0xF0, 0x13},
 855     {0xF1, 0x2D},
 856     {0xF0, 0x94},
 857     {0xF0, 0x14},
 858     {0xF1, 0x2C},
 859     {0xF0, 0x95},
 860     {0xF0, 0x15},
 861     {0xF1, 0x2B},
 862     {0xF0, 0x96},
 863     {0xF0, 0x16},
 864     {0xF1, 0x2B},
 865     {0xF0, 0x97},
 866     {0xF0, 0x17},
 867     {0xF1, 0x2A},
 868     {0xF0, 0x98},
 869     {0xF0, 0x18},
 870     {0xF1, 0x29},
 871     {0xF0, 0x99},
 872     {0xF0, 0x19},
 873     {0xF1, 0x28},
 874     {0xF0, 0x9A},
 875     {0xF0, 0x1A},
 876     {0xF1, 0x27},
 877     {0xF0, 0x9B},
 878     {0xF0, 0x1B},
 879     {0xF1, 0x26},
 880     {0xF0, 0x9C},
 881     {0xF0, 0x1C},
 882     {0xF1, 0x25},
 883     {0xF0, 0x9D},
 884     {0xF0, 0x1D},
 885     {0xF1, 0x24},
 886     {0xF0, 0x9E},
 887     {0xF0, 0x1E},
 888     {0xF1, 0x24},
 889     {0xF0, 0x9F},
 890     {0xF0, 0x1F},
 891     {0xF1, 0x23},
 892     {0xF0, 0xA0},
 893     {0xF0, 0x20},
 894     {0xF1, 0x22},
 895     {0xF0, 0xA1},
 896     {0xF0, 0x21},
 897     {0xF1, 0x21},
 898     {0xF0, 0xA2},
 899     {0xF0, 0x22},
 900     {0xF1, 0x20},
 901     {0xF0, 0xA3},
 902     {0xF0, 0x23},
 903     {0xF1, 0x20},
 904     {0xF0, 0xA4},
 905     {0xF0, 0x24},
 906     {0xF1, 0x1F},
 907     {0xF0, 0xA5},
 908     {0xF0, 0x25},
 909     {0xF1, 0x1E},
 910     {0xF0, 0xA6},
 911     {0xF0, 0x26},
 912     {0xF1, 0x1D},
 913     {0xF0, 0xA7},
 914     {0xF0, 0x27},
 915     {0xF1, 0x1C},
 916     {0xF0, 0xA8},
 917     {0xF0, 0x28},
 918     {0xF1, 0x1B},
 919     {0xF0, 0xA9},
 920     {0xF0, 0x29},
 921     {0xF1, 0x1B},
 922     {0xF0, 0xAA},
 923     {0xF0, 0x2A},
 924     {0xF1, 0x1A},
 925     {0xF0, 0xAB},
 926     {0xF0, 0x2B},
 927     {0xF1, 0x1A},
 928     {0xF0, 0xAC},
 929     {0xF0, 0x2C},
 930     {0xF1, 0x19},
 931     {0xF0, 0xAD},
 932     {0xF0, 0x2D},
 933     {0xF1, 0x18},
 934     {0xF0, 0xAE},
 935     {0xF0, 0x2E},
 936     {0xF1, 0x17},
 937     {0xF0, 0xAF},
 938     {0xF0, 0x2F},
 939     {0xF1, 0x16},
 940     {0xF0, 0xB0},
 941     {0xF0, 0x30},
 942     {0xF1, 0x15},
 943     {0xF0, 0xB1},
 944     {0xF0, 0x31},
 945     {0xF1, 0x15},
 946     {0xF0, 0xB2},
 947     {0xF0, 0x32},
 948     {0xF1, 0x15},
 949     {0xF0, 0xB3},
 950     {0xF0, 0x33},
 951     {0xF1, 0x14},
 952     {0xF0, 0xB4},
 953     {0xF0, 0x34},
 954     {0xF1, 0x13},
 955     {0xF0, 0xB5},
 956     {0xF0, 0x35},
 957     {0xF1, 0x12},
 958     {0xF0, 0xB6},
 959     {0xF0, 0x36},
 960     {0xF1, 0x11},
 961     {0xF0, 0xB7},
 962     {0xF0, 0x37},
 963     {0xF1, 0x10},
 964     {0xF0, 0xB8},
 965     {0xF0, 0x38},
 966     {0xF1, 0x0F},
 967     {0xF0, 0xB9},
 968     {0xF0, 0x39},
 969     {0xF1, 0x0E},
 970     {0xF0, 0xBA},
 971     {0xF0, 0x3A},
 972     {0xF1, 0x0D},
 973     {0xF0, 0xBB},
 974     {0xF0, 0x3B},
 975     {0xF1, 0x0C},
 976     {0xF0, 0xBC},
 977     {0xF0, 0x3C},
 978     {0xF1, 0x0B},
 979     {0xF0, 0xBD},
 980     {0xF0, 0x3D},
 981     {0xF1, 0x0B},
 982     {0xF0, 0xBE},
 983     {0xF0, 0x3E},
 984     {0xF1, 0x0A},
 985     {0xF0, 0xBF},
 986     {0xF0, 0x3F},
 987     {0xF1, 0x09},
 988     {0xF0, 0x00},
 989 };
 990
 991 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
 992 // For AIROHA
 993 BYTE byVT3253B0_AIROHA2230[CB_VT3253B0_INIT_FOR_AIROHA2230][2] = {
 994     {0x00, 0x31},
 995     {0x01, 0x00},
 996     {0x02, 0x00},
 997     {0x03, 0x00},
 998     {0x04, 0x00},
 999     {0x05, 0x80},
1000     {0x06, 0x00},
1001     {0x07, 0x00},
1002     {0x08, 0x70},
1003     {0x09, 0x41},
1004     {0x0a, 0x2A},
1005     {0x0b, 0x76},
1006     {0x0c, 0x00},
1007     {0x0d, 0x00},
1008     {0x0e, 0x80},
1009     {0x0f, 0x00},
1010     {0x10, 0x00},
1011     {0x11, 0x00},
1012     {0x12, 0x00},
1013     {0x13, 0x00},
1014     {0x14, 0x00},
1015     {0x15, 0x00},
1016     {0x16, 0x00},
1017     {0x17, 0x00},
1018     {0x18, 0x00},
1019     {0x19, 0x00},
1020     {0x1a, 0x00},
1021     {0x1b, 0x8f},
1022     {0x1c, 0x09},
1023     {0x1d, 0x00},
1024     {0x1e, 0x00},
1025     {0x1f, 0x00},
1026     {0x20, 0x00},
1027     {0x21, 0x00},
1028     {0x22, 0x00},
1029     {0x23, 0x00},
1030     {0x24, 0x00},
1031     {0x25, 0x4a},
1032     {0x26, 0x00},
1033     {0x27, 0x00},
1034     {0x28, 0x00},
1035     {0x29, 0x00},
1036     {0x2a, 0x00},
1037     {0x2b, 0x00},
1038     {0x2c, 0x00},
1039     {0x2d, 0x4a},
1040     {0x2e, 0x00},
1041     {0x2f, 0x0a},
1042     {0x30, 0x26},
1043     {0x31, 0x5b},
1044     {0x32, 0x00},
1045     {0x33, 0x00},
1046     {0x34, 0x00},
1047     {0x35, 0x00},
1048     {0x36, 0xaa},
1049     {0x37, 0xaa},
1050     {0x38, 0xff},
1051     {0x39, 0xff},
1052     {0x3a, 0x79},
1053     {0x3b, 0x00},
1054     {0x3c, 0x00},
1055     {0x3d, 0x0b},
1056     {0x3e, 0x48},
1057     {0x3f, 0x04},
1058     {0x40, 0x00},
1059     {0x41, 0x08},
1060     {0x42, 0x00},
1061     {0x43, 0x08},
1062     {0x44, 0x08},
1063     {0x45, 0x14},
1064     {0x46, 0x05},
1065     {0x47, 0x09},
1066     {0x48, 0x00},
1067     {0x49, 0x00},
1068     {0x4a, 0x00},
1069     {0x4b, 0x00},
1070     {0x4c, 0x09},
1071     {0x4d, 0x73},
1072     {0x4e, 0x00},
1073     {0x4f, 0xc5},
1074     {0x50, 0x15},
1075     {0x51, 0x19},
1076     {0x52, 0x00},
1077     {0x53, 0x00},
1078     {0x54, 0x00},
1079     {0x55, 0x00},
1080     {0x56, 0x00},
1081     {0x57, 0x00},
1082     {0x58, 0x00},
1083     {0x59, 0xb0},
1084     {0x5a, 0x00},
1085     {0x5b, 0x00},
1086     {0x5c, 0x00},
1087     {0x5d, 0x00},
1088     {0x5e, 0x00},
1089     {0x5f, 0x00},
1090     {0x60, 0xe4},
1091     {0x61, 0x80},
1092     {0x62, 0x00},
1093     {0x63, 0x00},
1094     {0x64, 0x00},
1095     {0x65, 0x00},
1096     {0x66, 0x98},
1097     {0x67, 0x0a},
1098     {0x68, 0x00},
1099     {0x69, 0x00},
1100     {0x6a, 0x00},
1101     {0x6b, 0x00},
1102     //{0x6c, 0x80},
1103     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1104     {0x6d, 0x03},
1105     {0x6e, 0x01},
1106     {0x6f, 0x00},
1107     {0x70, 0x00},
1108     {0x71, 0x00},
1109     {0x72, 0x00},
1110     {0x73, 0x00},
1111     {0x74, 0x00},
1112     {0x75, 0x00},
1113     {0x76, 0x00},
1114     {0x77, 0x00},
1115     {0x78, 0x00},
1116     {0x79, 0x00},
1117     {0x7a, 0x00},
1118     {0x7b, 0x00},
1119     {0x7c, 0x00},
1120     {0x7d, 0x00},
1121     {0x7e, 0x00},
1122     {0x7f, 0x00},
1123     {0x80, 0x8c},
1124     {0x81, 0x01},
1125     {0x82, 0x09},
1126     {0x83, 0x00},
1127     {0x84, 0x00},
1128     {0x85, 0x00},
1129     {0x86, 0x00},
1130     {0x87, 0x00},
1131     {0x88, 0x08},
1132     {0x89, 0x00},
1133     {0x8a, 0x0f},
1134     {0x8b, 0xb7},
1135     {0x8c, 0x88},
1136     {0x8d, 0x47},
1137     {0x8e, 0xaa},
1138     {0x8f, 0x02},
1139     {0x90, 0x22},
1140     {0x91, 0x00},
1141     {0x92, 0x00},
1142     {0x93, 0x00},
1143     {0x94, 0x00},
1144     {0x95, 0x00},
1145     {0x96, 0x00},
1146     {0x97, 0xeb},
1147     {0x98, 0x00},
1148     {0x99, 0x00},
1149     {0x9a, 0x00},
1150     {0x9b, 0x00},
1151     {0x9c, 0x00},
1152     {0x9d, 0x00},
1153     {0x9e, 0x00},
1154     {0x9f, 0x01},
1155     {0xa0, 0x00},
1156     {0xa1, 0x00},
1157     {0xa2, 0x00},
1158     {0xa3, 0x00},
1159     {0xa4, 0x00},
1160     {0xa5, 0x00},
1161     {0xa6, 0x10},
1162     {0xa7, 0x00},
1163     {0xa8, 0x18},
1164     {0xa9, 0x00},
1165     {0xaa, 0x00},
1166     {0xab, 0x00},
1167     {0xac, 0x00},
1168     {0xad, 0x00},
1169     {0xae, 0x00},
1170     {0xaf, 0x18},
1171     {0xb0, 0x38},
1172     {0xb1, 0x30},
1173     {0xb2, 0x00},
1174     {0xb3, 0x00},
1175     {0xb4, 0xff},
1176     {0xb5, 0x0f},
1177     {0xb6, 0xe4},
1178     {0xb7, 0xe2},
1179     {0xb8, 0x00},
1180     {0xb9, 0x00},
1181     {0xba, 0x00},
1182     {0xbb, 0x03},
1183     {0xbc, 0x01},
1184     {0xbd, 0x00},
1185     {0xbe, 0x00},
1186     {0xbf, 0x00},
1187     {0xc0, 0x18},
1188     {0xc1, 0x20},
1189     {0xc2, 0x07},
1190     {0xc3, 0x18},
1191     {0xc4, 0xff},
1192     {0xc5, 0x2c},
1193     {0xc6, 0x0c},
1194     {0xc7, 0x0a},
1195     {0xc8, 0x0e},
1196     {0xc9, 0x01},
1197     {0xca, 0x68},
1198     {0xcb, 0xa7},
1199     {0xcc, 0x3c},
1200     {0xcd, 0x10},
1201     {0xce, 0x00},
1202     {0xcf, 0x25},
1203     {0xd0, 0x40},
1204     {0xd1, 0x12},
1205     {0xd2, 0x00},
1206     {0xd3, 0x00},
1207     {0xd4, 0x10},
1208     {0xd5, 0x28},
1209     {0xd6, 0x80},
1210     {0xd7, 0x2A},
1211     {0xd8, 0x00},
1212     {0xd9, 0x00},
1213     {0xda, 0x00},
1214     {0xdb, 0x00},
1215     {0xdc, 0x00},
1216     {0xdd, 0x00},
1217     {0xde, 0x00},
1218     {0xdf, 0x00},
1219     {0xe0, 0x00},
1220     {0xe1, 0xB3},
1221     {0xe2, 0x00},
1222     {0xe3, 0x00},
1223     {0xe4, 0x00},
1224     {0xe5, 0x10},
1225     {0xe6, 0x00},
1226     {0xe7, 0x1C},
1227     {0xe8, 0x00},
1228     {0xe9, 0xf4},
1229     {0xea, 0x00},
1230     {0xeb, 0xff},
1231     {0xec, 0x79},
1232     {0xed, 0x20},
1233     {0xee, 0x30},
1234     {0xef, 0x01},
1235     {0xf0, 0x00},
1236     {0xf1, 0x3e},
1237     {0xf2, 0x00},
1238     {0xf3, 0x00},
1239     {0xf4, 0x00},
1240     {0xf5, 0x00},
1241     {0xf6, 0x00},
1242     {0xf7, 0x00},
1243     {0xf8, 0x00},
1244     {0xf9, 0x00},
1245     {0xfa, 0x00},
1246     {0xfb, 0x00},
1247     {0xfc, 0x00},
1248     {0xfd, 0x00},
1249     {0xfe, 0x00},
1250     {0xff, 0x00},
1251 };
1252
1253
1254
1255 #define CB_VT3253B0_INIT_FOR_UW2451 256
1256 //For UW2451
1257 BYTE byVT3253B0_UW2451[CB_VT3253B0_INIT_FOR_UW2451][2] = {
1258     {0x00, 0x31},
1259     {0x01, 0x00},
1260     {0x02, 0x00},
1261     {0x03, 0x00},
1262     {0x04, 0x00},
1263     {0x05, 0x81},
1264     {0x06, 0x00},
1265     {0x07, 0x00},
1266     {0x08, 0x38},
1267     {0x09, 0x45},
1268     {0x0a, 0x28},
1269     {0x0b, 0x76},
1270     {0x0c, 0x00},
1271     {0x0d, 0x00},
1272     {0x0e, 0x80},
1273     {0x0f, 0x00},
1274     {0x10, 0x00},
1275     {0x11, 0x00},
1276     {0x12, 0x00},
1277     {0x13, 0x00},
1278     {0x14, 0x00},
1279     {0x15, 0x00},
1280     {0x16, 0x00},
1281     {0x17, 0x00},
1282     {0x18, 0x00},
1283     {0x19, 0x00},
1284     {0x1a, 0x00},
1285     {0x1b, 0x8f},
1286     {0x1c, 0x0f},
1287     {0x1d, 0x00},
1288     {0x1e, 0x00},
1289     {0x1f, 0x00},
1290     {0x20, 0x00},
1291     {0x21, 0x00},
1292     {0x22, 0x00},
1293     {0x23, 0x00},
1294     {0x24, 0x00},
1295     {0x25, 0x4a},
1296     {0x26, 0x00},
1297     {0x27, 0x00},
1298     {0x28, 0x00},
1299     {0x29, 0x00},
1300     {0x2a, 0x00},
1301     {0x2b, 0x00},
1302     {0x2c, 0x00},
1303     {0x2d, 0x18},
1304     {0x2e, 0x00},
1305     {0x2f, 0x0a},
1306     {0x30, 0x26},
1307     {0x31, 0x5b},
1308     {0x32, 0x00},
1309     {0x33, 0x00},
1310     {0x34, 0x00},
1311     {0x35, 0x00},
1312     {0x36, 0xaa},
1313     {0x37, 0xaa},
1314     {0x38, 0xff},
1315     {0x39, 0xff},
1316     {0x3a, 0x00},
1317     {0x3b, 0x00},
1318     {0x3c, 0x00},
1319     {0x3d, 0x03},
1320     {0x3e, 0x1d},
1321     {0x3f, 0x04},
1322     {0x40, 0x00},
1323     {0x41, 0x08},
1324     {0x42, 0x00},
1325     {0x43, 0x08},
1326     {0x44, 0x08},
1327     {0x45, 0x14},
1328     {0x46, 0x05},
1329     {0x47, 0x09},
1330     {0x48, 0x00},
1331     {0x49, 0x00},
1332     {0x4a, 0x00},
1333     {0x4b, 0x00},
1334     {0x4c, 0x09},
1335     {0x4d, 0x90},
1336     {0x4e, 0x00},
1337     {0x4f, 0xc5},
1338     {0x50, 0x15},
1339     {0x51, 0x19},
1340     {0x52, 0x00},
1341     {0x53, 0x00},
1342     {0x54, 0x00},
1343     {0x55, 0x00},
1344     {0x56, 0x00},
1345     {0x57, 0x00},
1346     {0x58, 0x00},
1347     {0x59, 0xb0},
1348     {0x5a, 0x00},
1349     {0x5b, 0x00},
1350     {0x5c, 0x00},
1351     {0x5d, 0x00},
1352     {0x5e, 0x00},
1353     {0x5f, 0x00},
1354     {0x60, 0xb3},
1355     {0x61, 0x81},
1356     {0x62, 0x00},
1357     {0x63, 0x00},
1358     {0x64, 0x00},
1359     {0x65, 0x00},
1360     {0x66, 0x57},
1361     {0x67, 0x6c},
1362     {0x68, 0x00},
1363     {0x69, 0x00},
1364     {0x6a, 0x00},
1365     {0x6b, 0x00},
1366     //{0x6c, 0x80},
1367     {0x6c, 0x00}, //RobertYu:20050125, request by JJSue
1368     {0x6d, 0x03},
1369     {0x6e, 0x01},
1370     {0x6f, 0x00},
1371     {0x70, 0x00},
1372     {0x71, 0x00},
1373     {0x72, 0x00},
1374     {0x73, 0x00},
1375     {0x74, 0x00},
1376     {0x75, 0x00},
1377     {0x76, 0x00},
1378     {0x77, 0x00},
1379     {0x78, 0x00},
1380     {0x79, 0x00},
1381     {0x7a, 0x00},
1382     {0x7b, 0x00},
1383     {0x7c, 0x00},
1384     {0x7d, 0x00},
1385     {0x7e, 0x00},
1386     {0x7f, 0x00},
1387     {0x80, 0x8c},
1388     {0x81, 0x00},
1389     {0x82, 0x0e},
1390     {0x83, 0x00},
1391     {0x84, 0x00},
1392     {0x85, 0x00},
1393     {0x86, 0x00},
1394     {0x87, 0x00},
1395     {0x88, 0x08},
1396     {0x89, 0x00},
1397     {0x8a, 0x0e},
1398     {0x8b, 0xa7},
1399     {0x8c, 0x88},
1400     {0x8d, 0x47},
1401     {0x8e, 0xaa},
1402     {0x8f, 0x02},
1403     {0x90, 0x00},
1404     {0x91, 0x00},
1405     {0x92, 0x00},
1406     {0x93, 0x00},
1407     {0x94, 0x00},
1408     {0x95, 0x00},
1409     {0x96, 0x00},
1410     {0x97, 0xe3},
1411     {0x98, 0x00},
1412     {0x99, 0x00},
1413     {0x9a, 0x00},
1414     {0x9b, 0x00},
1415     {0x9c, 0x00},
1416     {0x9d, 0x00},
1417     {0x9e, 0x00},
1418     {0x9f, 0x00},
1419     {0xa0, 0x00},
1420     {0xa1, 0x00},
1421     {0xa2, 0x00},
1422     {0xa3, 0x00},
1423     {0xa4, 0x00},
1424     {0xa5, 0x00},
1425     {0xa6, 0x10},
1426     {0xa7, 0x00},
1427     {0xa8, 0x18},
1428     {0xa9, 0x00},
1429     {0xaa, 0x00},
1430     {0xab, 0x00},
1431     {0xac, 0x00},
1432     {0xad, 0x00},
1433     {0xae, 0x00},
1434     {0xaf, 0x18},
1435     {0xb0, 0x18},
1436     {0xb1, 0x30},
1437     {0xb2, 0x00},
1438     {0xb3, 0x00},
1439     {0xb4, 0x00},
1440     {0xb5, 0x00},
1441     {0xb6, 0x00},
1442     {0xb7, 0x00},
1443     {0xb8, 0x00},
1444     {0xb9, 0x00},
1445     {0xba, 0x00},
1446     {0xbb, 0x03},
1447     {0xbc, 0x01},
1448     {0xbd, 0x00},
1449     {0xbe, 0x00},
1450     {0xbf, 0x00},
1451     {0xc0, 0x10},
1452     {0xc1, 0x20},
1453     {0xc2, 0x00},
1454     {0xc3, 0x20},
1455     {0xc4, 0x00},
1456     {0xc5, 0x2c},
1457     {0xc6, 0x1c},
1458     {0xc7, 0x10},
1459     {0xc8, 0x10},
1460     {0xc9, 0x01},
1461     {0xca, 0x68},
1462     {0xcb, 0xa7},
1463     {0xcc, 0x3c},
1464     {0xcd, 0x09},
1465     {0xce, 0x00},
1466     {0xcf, 0x20},
1467     {0xd0, 0x40},
1468     {0xd1, 0x10},
1469     {0xd2, 0x00},
1470     {0xd3, 0x00},
1471     {0xd4, 0x20},
1472     {0xd5, 0x28},
1473     {0xd6, 0xa0},
1474     {0xd7, 0x2a},
1475     {0xd8, 0x00},
1476     {0xd9, 0x00},
1477     {0xda, 0x00},
1478     {0xdb, 0x00},
1479     {0xdc, 0x00},
1480     {0xdd, 0x00},
1481     {0xde, 0x00},
1482     {0xdf, 0x00},
1483     {0xe0, 0x00},
1484     {0xe1, 0xd3},
1485     {0xe2, 0xc0},
1486     {0xe3, 0x00},
1487     {0xe4, 0x00},
1488     {0xe5, 0x10},
1489     {0xe6, 0x00},
1490     {0xe7, 0x12},
1491     {0xe8, 0x12},
1492     {0xe9, 0x34},
1493     {0xea, 0x00},
1494     {0xeb, 0xff},
1495     {0xec, 0x79},
1496     {0xed, 0x20},
1497     {0xee, 0x30},
1498     {0xef, 0x01},
1499     {0xf0, 0x00},
1500     {0xf1, 0x3e},
1501     {0xf2, 0x00},
1502     {0xf3, 0x00},
1503     {0xf4, 0x00},
1504     {0xf5, 0x00},
1505     {0xf6, 0x00},
1506     {0xf7, 0x00},
1507     {0xf8, 0x00},
1508     {0xf9, 0x00},
1509     {0xfa, 0x00},
1510     {0xfb, 0x00},
1511     {0xfc, 0x00},
1512     {0xfd, 0x00},
1513     {0xfe, 0x00},
1514     {0xff, 0x00},
1515 };
1516
1517 #define CB_VT3253B0_AGC 193
1518 // For AIROHA
1519 BYTE byVT3253B0_AGC[CB_VT3253B0_AGC][2] = {
1520     {0xF0, 0x00},
1521     {0xF1, 0x00},
1522     {0xF0, 0x80},
1523     {0xF0, 0x01},
1524     {0xF1, 0x00},
1525     {0xF0, 0x81},
1526     {0xF0, 0x02},
1527     {0xF1, 0x02},
1528     {0xF0, 0x82},
1529     {0xF0, 0x03},
1530     {0xF1, 0x04},
1531     {0xF0, 0x83},
1532     {0xF0, 0x03},
1533     {0xF1, 0x04},
1534     {0xF0, 0x84},
1535     {0xF0, 0x04},
1536     {0xF1, 0x06},
1537     {0xF0, 0x85},
1538     {0xF0, 0x05},
1539     {0xF1, 0x06},
1540     {0xF0, 0x86},
1541     {0xF0, 0x06},
1542     {0xF1, 0x06},
1543     {0xF0, 0x87},
1544     {0xF0, 0x07},
1545     {0xF1, 0x08},
1546     {0xF0, 0x88},
1547     {0xF0, 0x08},
1548     {0xF1, 0x08},
1549     {0xF0, 0x89},
1550     {0xF0, 0x09},
1551     {0xF1, 0x0A},
1552     {0xF0, 0x8A},
1553     {0xF0, 0x0A},
1554     {0xF1, 0x0A},
1555     {0xF0, 0x8B},
1556     {0xF0, 0x0B},
1557     {0xF1, 0x0C},
1558     {0xF0, 0x8C},
1559     {0xF0, 0x0C},
1560     {0xF1, 0x0C},
1561     {0xF0, 0x8D},
1562     {0xF0, 0x0D},
1563     {0xF1, 0x0E},
1564     {0xF0, 0x8E},
1565     {0xF0, 0x0E},
1566     {0xF1, 0x0E},
1567     {0xF0, 0x8F},
1568     {0xF0, 0x0F},
1569     {0xF1, 0x10},
1570     {0xF0, 0x90},
1571     {0xF0, 0x10},
1572     {0xF1, 0x10},
1573     {0xF0, 0x91},
1574     {0xF0, 0x11},
1575     {0xF1, 0x12},
1576     {0xF0, 0x92},
1577     {0xF0, 0x12},
1578     {0xF1, 0x12},
1579     {0xF0, 0x93},
1580     {0xF0, 0x13},
1581     {0xF1, 0x14},
1582     {0xF0, 0x94},
1583     {0xF0, 0x14},
1584     {0xF1, 0x14},
1585     {0xF0, 0x95},
1586     {0xF0, 0x15},
1587     {0xF1, 0x16},
1588     {0xF0, 0x96},
1589     {0xF0, 0x16},
1590     {0xF1, 0x16},
1591     {0xF0, 0x97},
1592     {0xF0, 0x17},
1593     {0xF1, 0x18},
1594     {0xF0, 0x98},
1595     {0xF0, 0x18},
1596     {0xF1, 0x18},
1597     {0xF0, 0x99},
1598     {0xF0, 0x19},
1599     {0xF1, 0x1A},
1600     {0xF0, 0x9A},
1601     {0xF0, 0x1A},
1602     {0xF1, 0x1A},
1603     {0xF0, 0x9B},
1604     {0xF0, 0x1B},
1605     {0xF1, 0x1C},
1606     {0xF0, 0x9C},
1607     {0xF0, 0x1C},
1608     {0xF1, 0x1C},
1609     {0xF0, 0x9D},
1610     {0xF0, 0x1D},
1611     {0xF1, 0x1E},
1612     {0xF0, 0x9E},
1613     {0xF0, 0x1E},
1614     {0xF1, 0x1E},
1615     {0xF0, 0x9F},
1616     {0xF0, 0x1F},
1617     {0xF1, 0x20},
1618     {0xF0, 0xA0},
1619     {0xF0, 0x20},
1620     {0xF1, 0x20},
1621     {0xF0, 0xA1},
1622     {0xF0, 0x21},
1623     {0xF1, 0x22},
1624     {0xF0, 0xA2},
1625     {0xF0, 0x22},
1626     {0xF1, 0x22},
1627     {0xF0, 0xA3},
1628     {0xF0, 0x23},
1629     {0xF1, 0x24},
1630     {0xF0, 0xA4},
1631     {0xF0, 0x24},
1632     {0xF1, 0x24},
1633     {0xF0, 0xA5},
1634     {0xF0, 0x25},
1635     {0xF1, 0x26},
1636     {0xF0, 0xA6},
1637     {0xF0, 0x26},
1638     {0xF1, 0x26},
1639     {0xF0, 0xA7},
1640     {0xF0, 0x27},
1641     {0xF1, 0x28},
1642     {0xF0, 0xA8},
1643     {0xF0, 0x28},
1644     {0xF1, 0x28},
1645     {0xF0, 0xA9},
1646     {0xF0, 0x29},
1647     {0xF1, 0x2A},
1648     {0xF0, 0xAA},
1649     {0xF0, 0x2A},
1650     {0xF1, 0x2A},
1651     {0xF0, 0xAB},
1652     {0xF0, 0x2B},
1653     {0xF1, 0x2C},
1654     {0xF0, 0xAC},
1655     {0xF0, 0x2C},
1656     {0xF1, 0x2C},
1657     {0xF0, 0xAD},
1658     {0xF0, 0x2D},
1659     {0xF1, 0x2E},
1660     {0xF0, 0xAE},
1661     {0xF0, 0x2E},
1662     {0xF1, 0x2E},
1663     {0xF0, 0xAF},
1664     {0xF0, 0x2F},
1665     {0xF1, 0x30},
1666     {0xF0, 0xB0},
1667     {0xF0, 0x30},
1668     {0xF1, 0x30},
1669     {0xF0, 0xB1},
1670     {0xF0, 0x31},
1671     {0xF1, 0x32},
1672     {0xF0, 0xB2},
1673     {0xF0, 0x32},
1674     {0xF1, 0x32},
1675     {0xF0, 0xB3},
1676     {0xF0, 0x33},
1677     {0xF1, 0x34},
1678     {0xF0, 0xB4},
1679     {0xF0, 0x34},
1680     {0xF1, 0x34},
1681     {0xF0, 0xB5},
1682     {0xF0, 0x35},
1683     {0xF1, 0x36},
1684     {0xF0, 0xB6},
1685     {0xF0, 0x36},
1686     {0xF1, 0x36},
1687     {0xF0, 0xB7},
1688     {0xF0, 0x37},
1689     {0xF1, 0x38},
1690     {0xF0, 0xB8},
1691     {0xF0, 0x38},
1692     {0xF1, 0x38},
1693     {0xF0, 0xB9},
1694     {0xF0, 0x39},
1695     {0xF1, 0x3A},
1696     {0xF0, 0xBA},
1697     {0xF0, 0x3A},
1698     {0xF1, 0x3A},
1699     {0xF0, 0xBB},
1700     {0xF0, 0x3B},
1701     {0xF1, 0x3C},
1702     {0xF0, 0xBC},
1703     {0xF0, 0x3C},
1704     {0xF1, 0x3C},
1705     {0xF0, 0xBD},
1706     {0xF0, 0x3D},
1707     {0xF1, 0x3E},
1708     {0xF0, 0xBE},
1709     {0xF0, 0x3E},
1710     {0xF1, 0x3E},
1711     {0xF0, 0xBF},
1712     {0xF0, 0x00},
1713 };
1714
1715 const WORD awcFrameTime[MAX_RATE] =
1716 {10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216};
1717
1718
1719 /*---------------------  Static Functions  --------------------------*/
1720
1721 static
1722 ULONG
1723 s_ulGetRatio(PSDevice pDevice);
1724
1725 static
1726 VOID
1727 s_vChangeAntenna(
1728     IN PSDevice pDevice
1729     );
1730
1731 static
1732 VOID
1733 s_vChangeAntenna (
1734     IN PSDevice pDevice
1735     )
1736 {
1737
1738 #ifdef  PLICE_DEBUG
1739         //printk("Enter s_vChangeAntenna:original RxMode is %d,TxMode is %d\n",pDevice->byRxAntennaMode,pDevice->byTxAntennaMode);
1740 #endif
1741     if ( pDevice->dwRxAntennaSel == 0) {
1742         pDevice->dwRxAntennaSel=1;
1743         if (pDevice->bTxRxAntInv == TRUE)
1744             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1745         else
1746             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1747     } else {
1748         pDevice->dwRxAntennaSel=0;
1749         if (pDevice->bTxRxAntInv == TRUE)
1750             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_B);
1751         else
1752             BBvSetRxAntennaMode(pDevice->PortOffset, ANT_A);
1753     }
1754     if ( pDevice->dwTxAntennaSel == 0) {
1755         pDevice->dwTxAntennaSel=1;
1756         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_B);
1757     } else {
1758         pDevice->dwTxAntennaSel=0;
1759         BBvSetTxAntennaMode(pDevice->PortOffset, ANT_A);
1760     }
1761 }
1762
1763
1764 /*---------------------  Export Variables  --------------------------*/
1765 /*
1766  * Description: Calculate data frame transmitting time
1767  *
1768  * Parameters:
1769  *  In:
1770  *      byPreambleType  - Preamble Type
1771  *      byPktType        - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1772  *      cbFrameLength   - Baseband Type
1773  *      wRate           - Tx Rate
1774  *  Out:
1775  *
1776  * Return Value: FrameTime
1777  *
1778  */
1779 UINT
1780 BBuGetFrameTime (
1781     IN BYTE byPreambleType,
1782     IN BYTE byPktType,
1783     IN UINT cbFrameLength,
1784     IN WORD wRate
1785     )
1786 {
1787     UINT uFrameTime;
1788     UINT uPreamble;
1789     UINT uTmp;
1790     UINT uRateIdx = (UINT)wRate;
1791     UINT uRate = 0;
1792
1793
1794     if (uRateIdx > RATE_54M) {
1795             ASSERT(0);
1796         return 0;
1797     }
1798
1799     uRate = (UINT)awcFrameTime[uRateIdx];
1800
1801     if (uRateIdx <= 3) {          //CCK mode
1802
1803         if (byPreambleType == 1) {//Short
1804             uPreamble = 96;
1805         } else {
1806             uPreamble = 192;
1807         }
1808         uFrameTime = (cbFrameLength * 80) / uRate;  //?????
1809         uTmp = (uFrameTime * uRate) / 80;
1810         if (cbFrameLength != uTmp) {
1811             uFrameTime ++;
1812         }
1813
1814         return (uPreamble + uFrameTime);
1815     }
1816     else {
1817         uFrameTime = (cbFrameLength * 8 + 22) / uRate;   //????????
1818         uTmp = ((uFrameTime * uRate) - 22) / 8;
1819         if(cbFrameLength != uTmp) {
1820             uFrameTime ++;
1821         }
1822         uFrameTime = uFrameTime * 4;    //???????
1823         if(byPktType != PK_TYPE_11A) {
1824             uFrameTime += 6;     //??????
1825         }
1826         return (20 + uFrameTime); //??????
1827     }
1828 }
1829
1830 /*
1831  * Description: Caculate Length, Service, and Signal fields of Phy for Tx
1832  *
1833  * Parameters:
1834  *  In:
1835  *      pDevice         - Device Structure
1836  *      cbFrameLength   - Tx Frame Length
1837  *      wRate           - Tx Rate
1838  *  Out:
1839  *      pwPhyLen        - pointer to Phy Length field
1840  *      pbyPhySrv       - pointer to Phy Service field
1841  *      pbyPhySgn       - pointer to Phy Signal field
1842  *
1843  * Return Value: none
1844  *
1845  */
1846 VOID
1847 BBvCaculateParameter (
1848     IN  PSDevice pDevice,
1849     IN  UINT cbFrameLength,
1850     IN  WORD wRate,
1851     IN  BYTE byPacketType,
1852     OUT PWORD pwPhyLen,
1853     OUT PBYTE pbyPhySrv,
1854     OUT PBYTE pbyPhySgn
1855     )
1856 {
1857     UINT cbBitCount;
1858     UINT cbUsCount = 0;
1859     UINT cbTmp;
1860     BOOL bExtBit;
1861     BYTE byPreambleType = pDevice->byPreambleType;
1862     BOOL bCCK = pDevice->bCCK;
1863
1864     cbBitCount = cbFrameLength * 8;
1865     bExtBit = FALSE;
1866
1867     switch (wRate) {
1868     case RATE_1M :
1869         cbUsCount = cbBitCount;
1870         *pbyPhySgn = 0x00;
1871         break;
1872
1873     case RATE_2M :
1874         cbUsCount = cbBitCount / 2;
1875         if (byPreambleType == 1)
1876             *pbyPhySgn = 0x09;
1877         else // long preamble
1878             *pbyPhySgn = 0x01;
1879         break;
1880
1881     case RATE_5M :
1882         if (bCCK == FALSE)
1883             cbBitCount ++;
1884         cbUsCount = (cbBitCount * 10) / 55;
1885         cbTmp = (cbUsCount * 55) / 10;
1886         if (cbTmp != cbBitCount)
1887             cbUsCount ++;
1888         if (byPreambleType == 1)
1889             *pbyPhySgn = 0x0a;
1890         else // long preamble
1891             *pbyPhySgn = 0x02;
1892         break;
1893
1894     case RATE_11M :
1895
1896         if (bCCK == FALSE)
1897             cbBitCount ++;
1898         cbUsCount = cbBitCount / 11;
1899         cbTmp = cbUsCount * 11;
1900         if (cbTmp != cbBitCount) {
1901             cbUsCount ++;
1902             if ((cbBitCount - cbTmp) <= 3)
1903                 bExtBit = TRUE;
1904         }
1905         if (byPreambleType == 1)
1906             *pbyPhySgn = 0x0b;
1907         else // long preamble
1908             *pbyPhySgn = 0x03;
1909         break;
1910
1911     case RATE_6M :
1912         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1913             *pbyPhySgn = 0x9B; //1001 1011
1914         }
1915         else {//11g, 2.4GHZ
1916             *pbyPhySgn = 0x8B; //1000 1011
1917         }
1918         break;
1919
1920     case RATE_9M :
1921         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1922             *pbyPhySgn = 0x9F; //1001 1111
1923         }
1924         else {//11g, 2.4GHZ
1925             *pbyPhySgn = 0x8F; //1000 1111
1926         }
1927         break;
1928
1929     case RATE_12M :
1930         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1931             *pbyPhySgn = 0x9A; //1001 1010
1932         }
1933         else {//11g, 2.4GHZ
1934             *pbyPhySgn = 0x8A; //1000 1010
1935         }
1936         break;
1937
1938     case RATE_18M :
1939         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1940             *pbyPhySgn = 0x9E; //1001 1110
1941         }
1942         else {//11g, 2.4GHZ
1943             *pbyPhySgn = 0x8E; //1000 1110
1944         }
1945         break;
1946
1947     case RATE_24M :
1948         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1949             *pbyPhySgn = 0x99; //1001 1001
1950         }
1951         else {//11g, 2.4GHZ
1952             *pbyPhySgn = 0x89; //1000 1001
1953         }
1954         break;
1955
1956     case RATE_36M :
1957         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1958             *pbyPhySgn = 0x9D; //1001 1101
1959         }
1960         else {//11g, 2.4GHZ
1961             *pbyPhySgn = 0x8D; //1000 1101
1962         }
1963         break;
1964
1965     case RATE_48M :
1966         if(byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1967             *pbyPhySgn = 0x98; //1001 1000
1968         }
1969         else {//11g, 2.4GHZ
1970             *pbyPhySgn = 0x88; //1000 1000
1971         }
1972         break;
1973
1974     case RATE_54M :
1975         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1976             *pbyPhySgn = 0x9C; //1001 1100
1977         }
1978         else {//11g, 2.4GHZ
1979             *pbyPhySgn = 0x8C; //1000 1100
1980         }
1981         break;
1982
1983     default :
1984         if (byPacketType == PK_TYPE_11A) {//11a, 5GHZ
1985             *pbyPhySgn = 0x9C; //1001 1100
1986         }
1987         else {//11g, 2.4GHZ
1988             *pbyPhySgn = 0x8C; //1000 1100
1989         }
1990         break;
1991     }
1992
1993     if (byPacketType == PK_TYPE_11B) {
1994         *pbyPhySrv = 0x00;
1995         if (bExtBit)
1996             *pbyPhySrv = *pbyPhySrv | 0x80;
1997         *pwPhyLen = (WORD)cbUsCount;
1998     }
1999     else {
2000         *pbyPhySrv = 0x00;
2001         *pwPhyLen = (WORD)cbFrameLength;
2002     }
2003 }
2004
2005 /*
2006  * Description: Read a byte from BASEBAND, by embeded programming
2007  *
2008  * Parameters:
2009  *  In:
2010  *      dwIoBase    - I/O base address
2011  *      byBBAddr    - address of register in Baseband
2012  *  Out:
2013  *      pbyData     - data read
2014  *
2015  * Return Value: TRUE if succeeded; FALSE if failed.
2016  *
2017  */
2018 BOOL BBbReadEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, PBYTE pbyData)
2019 {
2020     WORD    ww;
2021     BYTE    byValue;
2022
2023     // BB reg offset
2024     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2025
2026     // turn on REGR
2027     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR);
2028     // W_MAX_TIMEOUT is the timeout period
2029     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2030         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2031         if (byValue & BBREGCTL_DONE)
2032             break;
2033     }
2034
2035     // get BB data
2036     VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData);
2037
2038     if (ww == W_MAX_TIMEOUT) {
2039         DBG_PORT80(0x30);
2040         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x30)\n");
2041         return FALSE;
2042     }
2043     return TRUE;
2044 }
2045
2046
2047 /*
2048  * Description: Write a Byte to BASEBAND, by embeded programming
2049  *
2050  * Parameters:
2051  *  In:
2052  *      dwIoBase    - I/O base address
2053  *      byBBAddr    - address of register in Baseband
2054  *      byData      - data to write
2055  *  Out:
2056  *      none
2057  *
2058  * Return Value: TRUE if succeeded; FALSE if failed.
2059  *
2060  */
2061 BOOL BBbWriteEmbeded (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byData)
2062 {
2063     WORD    ww;
2064     BYTE    byValue;
2065
2066     // BB reg offset
2067     VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr);
2068     // set BB data
2069     VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData);
2070
2071     // turn on BBREGCTL_REGW
2072     MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW);
2073     // W_MAX_TIMEOUT is the timeout period
2074     for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2075         VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue);
2076         if (byValue & BBREGCTL_DONE)
2077             break;
2078     }
2079
2080     if (ww == W_MAX_TIMEOUT) {
2081         DBG_PORT80(0x31);
2082         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO" DBG_PORT80(0x31)\n");
2083         return FALSE;
2084     }
2085     return TRUE;
2086 }
2087
2088
2089 /*
2090  * Description: Test if all bits are set for the Baseband register
2091  *
2092  * Parameters:
2093  *  In:
2094  *      dwIoBase    - I/O base address
2095  *      byBBAddr    - address of register in Baseband
2096  *      byTestBits  - TestBits
2097  *  Out:
2098  *      none
2099  *
2100  * Return Value: TRUE if all TestBits are set; FALSE otherwise.
2101  *
2102  */
2103 BOOL BBbIsRegBitsOn (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2104 {
2105     BYTE byOrgData;
2106
2107     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2108     return (byOrgData & byTestBits) == byTestBits;
2109 }
2110
2111
2112 /*
2113  * Description: Test if all bits are clear for the Baseband register
2114  *
2115  * Parameters:
2116  *  In:
2117  *      dwIoBase    - I/O base address
2118  *      byBBAddr    - address of register in Baseband
2119  *      byTestBits  - TestBits
2120  *  Out:
2121  *      none
2122  *
2123  * Return Value: TRUE if all TestBits are clear; FALSE otherwise.
2124  *
2125  */
2126 BOOL BBbIsRegBitsOff (DWORD_PTR dwIoBase, BYTE byBBAddr, BYTE byTestBits)
2127 {
2128     BYTE byOrgData;
2129
2130     BBbReadEmbeded(dwIoBase, byBBAddr, &byOrgData);
2131     return (byOrgData & byTestBits) == 0;
2132 }
2133
2134 /*
2135  * Description: VIA VT3253 Baseband chip init function
2136  *
2137  * Parameters:
2138  *  In:
2139  *      dwIoBase    - I/O base address
2140  *      byRevId     - Revision ID
2141  *      byRFType    - RF type
2142  *  Out:
2143  *      none
2144  *
2145  * Return Value: TRUE if succeeded; FALSE if failed.
2146  *
2147  */
2148
2149 BOOL BBbVT3253Init (PSDevice pDevice)
2150 {
2151     BOOL       bResult = TRUE;
2152     int        ii;
2153     DWORD_PTR  dwIoBase = pDevice->PortOffset;
2154     BYTE       byRFType = pDevice->byRFType;
2155     BYTE       byLocalID = pDevice->byLocalID;
2156
2157     if (byRFType == RF_RFMD2959) {
2158         if (byLocalID <= REV_ID_VT3253_A1) {
2159             for (ii = 0; ii < CB_VT3253_INIT_FOR_RFMD; ii++) {
2160                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253InitTab_RFMD[ii][0],byVT3253InitTab_RFMD[ii][1]);
2161             }
2162         } else {
2163             for (ii = 0; ii < CB_VT3253B0_INIT_FOR_RFMD; ii++) {
2164                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_RFMD[ii][0],byVT3253B0_RFMD[ii][1]);
2165             }
2166             for (ii = 0; ii < CB_VT3253B0_AGC_FOR_RFMD2959; ii++) {
2167                     bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC4_RFMD2959[ii][0],byVT3253B0_AGC4_RFMD2959[ii][1]);
2168             }
2169             VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2170             MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2171         }
2172         pDevice->abyBBVGA[0] = 0x18;
2173         pDevice->abyBBVGA[1] = 0x0A;
2174         pDevice->abyBBVGA[2] = 0x0;
2175         pDevice->abyBBVGA[3] = 0x0;
2176         pDevice->ldBmThreshold[0] = -70;
2177         pDevice->ldBmThreshold[1] = -50;
2178         pDevice->ldBmThreshold[2] = 0;
2179         pDevice->ldBmThreshold[3] = 0;
2180     } else if ((byRFType == RF_AIROHA) || (byRFType == RF_AL2230S) ) {
2181         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2182             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2183         }
2184         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2185             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2186         }
2187         pDevice->abyBBVGA[0] = 0x1C;
2188         pDevice->abyBBVGA[1] = 0x10;
2189         pDevice->abyBBVGA[2] = 0x0;
2190         pDevice->abyBBVGA[3] = 0x0;
2191         pDevice->ldBmThreshold[0] = -70;
2192         pDevice->ldBmThreshold[1] = -48;
2193         pDevice->ldBmThreshold[2] = 0;
2194         pDevice->ldBmThreshold[3] = 0;
2195     } else if (byRFType == RF_UW2451) {
2196         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2197                 bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2198         }
2199         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2200             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2201         }
2202         VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23);
2203         MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0);
2204
2205         pDevice->abyBBVGA[0] = 0x14;
2206         pDevice->abyBBVGA[1] = 0x0A;
2207         pDevice->abyBBVGA[2] = 0x0;
2208         pDevice->abyBBVGA[3] = 0x0;
2209         pDevice->ldBmThreshold[0] = -60;
2210         pDevice->ldBmThreshold[1] = -50;
2211         pDevice->ldBmThreshold[2] = 0;
2212         pDevice->ldBmThreshold[3] = 0;
2213     } else if (byRFType == RF_UW2452) {
2214         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_UW2451; ii++) {
2215             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_UW2451[ii][0],byVT3253B0_UW2451[ii][1]);
2216         }
2217         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2218         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2219         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2220         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2221         // Select VC1/VC2, CR215 = 0x02->0x06
2222         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2223
2224         //{{RobertYu:20050125, request by Jack
2225         bResult &= BBbWriteEmbeded(dwIoBase,0x90,0x20);
2226         bResult &= BBbWriteEmbeded(dwIoBase,0x97,0xeb);
2227         //}}
2228
2229         //{{RobertYu:20050221, request by Jack
2230         bResult &= BBbWriteEmbeded(dwIoBase,0xa6,0x00);
2231         bResult &= BBbWriteEmbeded(dwIoBase,0xa8,0x30);
2232         //}}
2233         bResult &= BBbWriteEmbeded(dwIoBase,0xb0,0x58);
2234
2235         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2236             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2237         }
2238         //VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); // RobertYu: 20050104, 20050131 disable PA_Delay
2239         //MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT0); // RobertYu: 20050104, 20050131 disable PA_Delay
2240
2241         pDevice->abyBBVGA[0] = 0x14;
2242         pDevice->abyBBVGA[1] = 0x0A;
2243         pDevice->abyBBVGA[2] = 0x0;
2244         pDevice->abyBBVGA[3] = 0x0;
2245         pDevice->ldBmThreshold[0] = -60;
2246         pDevice->ldBmThreshold[1] = -50;
2247         pDevice->ldBmThreshold[2] = 0;
2248         pDevice->ldBmThreshold[3] = 0;
2249     //}} RobertYu
2250
2251     } else if (byRFType == RF_VT3226) {
2252         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2253             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2254         }
2255         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2256             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2257         }
2258         pDevice->abyBBVGA[0] = 0x1C;
2259         pDevice->abyBBVGA[1] = 0x10;
2260         pDevice->abyBBVGA[2] = 0x0;
2261         pDevice->abyBBVGA[3] = 0x0;
2262         pDevice->ldBmThreshold[0] = -70;
2263         pDevice->ldBmThreshold[1] = -48;
2264         pDevice->ldBmThreshold[2] = 0;
2265         pDevice->ldBmThreshold[3] = 0;
2266         // Fix VT3226 DFC system timing issue
2267         MACvSetRFLE_LatchBase(dwIoBase);
2268          //{{ RobertYu: 20050104
2269     } else if (byRFType == RF_AIROHA7230) {
2270         for (ii = 0; ii < CB_VT3253B0_INIT_FOR_AIROHA2230; ii++) {
2271             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AIROHA2230[ii][0],byVT3253B0_AIROHA2230[ii][1]);
2272         }
2273
2274         //{{ RobertYu:20050223, request by JerryChung
2275         // Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2276         //bResult &= BBbWriteEmbeded(dwIoBase,0x09,0x41);
2277         // Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2278         //bResult &= BBbWriteEmbeded(dwIoBase,0x0a,0x28);
2279         // Select VC1/VC2, CR215 = 0x02->0x06
2280         bResult &= BBbWriteEmbeded(dwIoBase,0xd7,0x06);
2281         //}}
2282
2283         for (ii = 0; ii < CB_VT3253B0_AGC; ii++) {
2284             bResult &= BBbWriteEmbeded(dwIoBase,byVT3253B0_AGC[ii][0],byVT3253B0_AGC[ii][1]);
2285         }
2286         pDevice->abyBBVGA[0] = 0x1C;
2287         pDevice->abyBBVGA[1] = 0x10;
2288         pDevice->abyBBVGA[2] = 0x0;
2289         pDevice->abyBBVGA[3] = 0x0;
2290         pDevice->ldBmThreshold[0] = -70;
2291         pDevice->ldBmThreshold[1] = -48;
2292         pDevice->ldBmThreshold[2] = 0;
2293         pDevice->ldBmThreshold[3] = 0;
2294     //}} RobertYu
2295     } else {
2296         // No VGA Table now
2297         pDevice->bUpdateBBVGA = FALSE;
2298         pDevice->abyBBVGA[0] = 0x1C;
2299     }
2300
2301     if (byLocalID > REV_ID_VT3253_A1) {
2302         BBbWriteEmbeded(dwIoBase, 0x04, 0x7F);
2303         BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);
2304     }
2305
2306     return bResult;
2307 }
2308
2309
2310
2311 /*
2312  * Description: Read All Baseband Registers
2313  *
2314  * Parameters:
2315  *  In:
2316  *      dwIoBase    - I/O base address
2317  *      pbyBBRegs   - Point to struct that stores Baseband Registers
2318  *  Out:
2319  *      none
2320  *
2321  * Return Value: none
2322  *
2323  */
2324 VOID BBvReadAllRegs (DWORD_PTR dwIoBase, PBYTE pbyBBRegs)
2325 {
2326     int  ii;
2327     BYTE byBase = 1;
2328     for (ii = 0; ii < BB_MAX_CONTEXT_SIZE; ii++) {
2329         BBbReadEmbeded(dwIoBase, (BYTE)(ii*byBase), pbyBBRegs);
2330         pbyBBRegs += byBase;
2331     }
2332 }
2333
2334 /*
2335  * Description: Turn on BaseBand Loopback mode
2336  *
2337  * Parameters:
2338  *  In:
2339  *      dwIoBase    - I/O base address
2340  *      bCCK        - If CCK is set
2341  *  Out:
2342  *      none
2343  *
2344  * Return Value: none
2345  *
2346  */
2347
2348
2349 void BBvLoopbackOn (PSDevice pDevice)
2350 {
2351     BYTE      byData;
2352     DWORD_PTR dwIoBase = pDevice->PortOffset;
2353
2354     //CR C9 = 0x00
2355     BBbReadEmbeded(dwIoBase, 0xC9, &pDevice->byBBCRc9);//CR201
2356     BBbWriteEmbeded(dwIoBase, 0xC9, 0);
2357     BBbReadEmbeded(dwIoBase, 0x4D, &pDevice->byBBCR4d);//CR77
2358     BBbWriteEmbeded(dwIoBase, 0x4D, 0x90);
2359
2360     //CR 88 = 0x02(CCK), 0x03(OFDM)
2361     BBbReadEmbeded(dwIoBase, 0x88, &pDevice->byBBCR88);//CR136
2362
2363     if (pDevice->uConnectionRate <= RATE_11M) { //CCK
2364         // Enable internal digital loopback: CR33 |= 0000 0001
2365         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2366         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData | 0x01));//CR33
2367         // CR154 = 0x00
2368         BBbWriteEmbeded(dwIoBase, 0x9A, 0);   //CR154
2369
2370         BBbWriteEmbeded(dwIoBase, 0x88, 0x02);//CR239
2371     }
2372     else { //OFDM
2373         // Enable internal digital loopback:CR154 |= 0000 0001
2374         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2375         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData | 0x01));//CR154
2376         // CR33 = 0x00
2377         BBbWriteEmbeded(dwIoBase, 0x21, 0);   //CR33
2378
2379         BBbWriteEmbeded(dwIoBase, 0x88, 0x03);//CR239
2380     }
2381
2382     //CR14 = 0x00
2383     BBbWriteEmbeded(dwIoBase, 0x0E, 0);//CR14
2384
2385     // Disable TX_IQUN
2386     BBbReadEmbeded(pDevice->PortOffset, 0x09, &pDevice->byBBCR09);
2387     BBbWriteEmbeded(pDevice->PortOffset, 0x09, (BYTE)(pDevice->byBBCR09 & 0xDE));
2388 }
2389
2390 /*
2391  * Description: Turn off BaseBand Loopback mode
2392  *
2393  * Parameters:
2394  *  In:
2395  *      pDevice         - Device Structure
2396  *
2397  *  Out:
2398  *      none
2399  *
2400  * Return Value: none
2401  *
2402  */
2403 void BBvLoopbackOff (PSDevice pDevice)
2404 {
2405     BYTE      byData;
2406     DWORD_PTR dwIoBase = pDevice->PortOffset;
2407
2408     BBbWriteEmbeded(dwIoBase, 0xC9, pDevice->byBBCRc9);//CR201
2409     BBbWriteEmbeded(dwIoBase, 0x88, pDevice->byBBCR88);//CR136
2410     BBbWriteEmbeded(dwIoBase, 0x09, pDevice->byBBCR09);//CR136
2411     BBbWriteEmbeded(dwIoBase, 0x4D, pDevice->byBBCR4d);//CR77
2412
2413     if (pDevice->uConnectionRate <= RATE_11M) { // CCK
2414         // Set the CR33 Bit2 to disable internal Loopback.
2415         BBbReadEmbeded(dwIoBase, 0x21, &byData);//CR33
2416         BBbWriteEmbeded(dwIoBase, 0x21, (BYTE)(byData & 0xFE));//CR33
2417     }
2418     else { // OFDM
2419         BBbReadEmbeded(dwIoBase, 0x9A, &byData);//CR154
2420         BBbWriteEmbeded(dwIoBase, 0x9A, (BYTE)(byData & 0xFE));//CR154
2421     }
2422     BBbReadEmbeded(dwIoBase, 0x0E, &byData);//CR14
2423     BBbWriteEmbeded(dwIoBase, 0x0E, (BYTE)(byData | 0x80));//CR14
2424
2425 }
2426
2427
2428
2429 /*
2430  * Description: Set ShortSlotTime mode
2431  *
2432  * Parameters:
2433  *  In:
2434  *      pDevice     - Device Structure
2435  *  Out:
2436  *      none
2437  *
2438  * Return Value: none
2439  *
2440  */
2441 VOID
2442 BBvSetShortSlotTime (PSDevice pDevice)
2443 {
2444     BYTE byBBRxConf=0;
2445     BYTE byBBVGA=0;
2446
2447     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2448
2449     if (pDevice->bShortSlotTime) {
2450         byBBRxConf &= 0xDF;//1101 1111
2451     } else {
2452         byBBRxConf |= 0x20;//0010 0000
2453     }
2454
2455     // patch for 3253B0 Baseband with Cardbus module
2456     BBbReadEmbeded(pDevice->PortOffset, 0xE7, &byBBVGA);
2457     if (byBBVGA == pDevice->abyBBVGA[0]) {
2458         byBBRxConf |= 0x20;//0010 0000
2459     }
2460
2461     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2462
2463 }
2464
2465 VOID BBvSetVGAGainOffset(PSDevice pDevice, BYTE byData)
2466 {
2467     BYTE byBBRxConf=0;
2468
2469     BBbWriteEmbeded(pDevice->PortOffset, 0xE7, byData);
2470
2471     BBbReadEmbeded(pDevice->PortOffset, 0x0A, &byBBRxConf);//CR10
2472     // patch for 3253B0 Baseband with Cardbus module
2473     if (byData == pDevice->abyBBVGA[0]) {
2474         byBBRxConf |= 0x20;//0010 0000
2475     } else if (pDevice->bShortSlotTime) {
2476         byBBRxConf &= 0xDF;//1101 1111
2477     } else {
2478         byBBRxConf |= 0x20;//0010 0000
2479     }
2480     pDevice->byBBVGACurrent = byData;
2481     BBbWriteEmbeded(pDevice->PortOffset, 0x0A, byBBRxConf);//CR10
2482 }
2483
2484
2485 /*
2486  * Description: Baseband SoftwareReset
2487  *
2488  * Parameters:
2489  *  In:
2490  *      dwIoBase    - I/O base address
2491  *  Out:
2492  *      none
2493  *
2494  * Return Value: none
2495  *
2496  */
2497 VOID
2498 BBvSoftwareReset (DWORD_PTR dwIoBase)
2499 {
2500     BBbWriteEmbeded(dwIoBase, 0x50, 0x40);
2501     BBbWriteEmbeded(dwIoBase, 0x50, 0);
2502     BBbWriteEmbeded(dwIoBase, 0x9C, 0x01);
2503     BBbWriteEmbeded(dwIoBase, 0x9C, 0);
2504 }
2505
2506 /*
2507  * Description: Baseband Power Save Mode ON
2508  *
2509  * Parameters:
2510  *  In:
2511  *      dwIoBase    - I/O base address
2512  *  Out:
2513  *      none
2514  *
2515  * Return Value: none
2516  *
2517  */
2518 VOID
2519 BBvPowerSaveModeON (DWORD_PTR dwIoBase)
2520 {
2521     BYTE byOrgData;
2522
2523     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2524     byOrgData |= BIT0;
2525     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2526 }
2527
2528 /*
2529  * Description: Baseband Power Save Mode OFF
2530  *
2531  * Parameters:
2532  *  In:
2533  *      dwIoBase    - I/O base address
2534  *  Out:
2535  *      none
2536  *
2537  * Return Value: none
2538  *
2539  */
2540 VOID
2541 BBvPowerSaveModeOFF (DWORD_PTR dwIoBase)
2542 {
2543     BYTE byOrgData;
2544
2545     BBbReadEmbeded(dwIoBase, 0x0D, &byOrgData);
2546     byOrgData &= ~(BIT0);
2547     BBbWriteEmbeded(dwIoBase, 0x0D, byOrgData);
2548 }
2549
2550 /*
2551  * Description: Set Tx Antenna mode
2552  *
2553  * Parameters:
2554  *  In:
2555  *      pDevice          - Device Structure
2556  *      byAntennaMode    - Antenna Mode
2557  *  Out:
2558  *      none
2559  *
2560  * Return Value: none
2561  *
2562  */
2563
2564 VOID
2565 BBvSetTxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2566 {
2567     BYTE byBBTxConf;
2568
2569 #ifdef  PLICE_DEBUG
2570         //printk("Enter BBvSetTxAntennaMode\n");
2571 #endif
2572     BBbReadEmbeded(dwIoBase, 0x09, &byBBTxConf);//CR09
2573     if (byAntennaMode == ANT_DIVERSITY) {
2574         // bit 1 is diversity
2575         byBBTxConf |= 0x02;
2576     } else if (byAntennaMode == ANT_A) {
2577         // bit 2 is ANTSEL
2578         byBBTxConf &= 0xF9; // 1111 1001
2579     } else if (byAntennaMode == ANT_B) {
2580 #ifdef  PLICE_DEBUG
2581         //printk("BBvSetTxAntennaMode:ANT_B\n");
2582 #endif
2583         byBBTxConf &= 0xFD; // 1111 1101
2584         byBBTxConf |= 0x04;
2585     }
2586     BBbWriteEmbeded(dwIoBase, 0x09, byBBTxConf);//CR09
2587 }
2588
2589
2590
2591
2592 /*
2593  * Description: Set Rx Antenna mode
2594  *
2595  * Parameters:
2596  *  In:
2597  *      pDevice          - Device Structure
2598  *      byAntennaMode    - Antenna Mode
2599  *  Out:
2600  *      none
2601  *
2602  * Return Value: none
2603  *
2604  */
2605
2606 VOID
2607 BBvSetRxAntennaMode (DWORD_PTR dwIoBase, BYTE byAntennaMode)
2608 {
2609     BYTE byBBRxConf;
2610
2611     BBbReadEmbeded(dwIoBase, 0x0A, &byBBRxConf);//CR10
2612     if (byAntennaMode == ANT_DIVERSITY) {
2613         byBBRxConf |= 0x01;
2614
2615     } else if (byAntennaMode == ANT_A) {
2616         byBBRxConf &= 0xFC; // 1111 1100
2617     } else if (byAntennaMode == ANT_B) {
2618         byBBRxConf &= 0xFE; // 1111 1110
2619         byBBRxConf |= 0x02;
2620     }
2621     BBbWriteEmbeded(dwIoBase, 0x0A, byBBRxConf);//CR10
2622 }
2623
2624
2625 /*
2626  * Description: BBvSetDeepSleep
2627  *
2628  * Parameters:
2629  *  In:
2630  *      pDevice          - Device Structure
2631  *  Out:
2632  *      none
2633  *
2634  * Return Value: none
2635  *
2636  */
2637 VOID
2638 BBvSetDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2639 {
2640     BBbWriteEmbeded(dwIoBase, 0x0C, 0x17);//CR12
2641     BBbWriteEmbeded(dwIoBase, 0x0D, 0xB9);//CR13
2642 }
2643
2644 VOID
2645 BBvExitDeepSleep (DWORD_PTR dwIoBase, BYTE byLocalID)
2646 {
2647     BBbWriteEmbeded(dwIoBase, 0x0C, 0x00);//CR12
2648     BBbWriteEmbeded(dwIoBase, 0x0D, 0x01);//CR13
2649 }
2650
2651
2652
2653 static
2654 ULONG
2655 s_ulGetRatio (PSDevice pDevice)
2656 {
2657 ULONG   ulRatio = 0;
2658 ULONG   ulMaxPacket;
2659 ULONG   ulPacketNum;
2660
2661     //This is a thousand-ratio
2662     ulMaxPacket = pDevice->uNumSQ3[RATE_54M];
2663     if ( pDevice->uNumSQ3[RATE_54M] != 0 ) {
2664         ulPacketNum = pDevice->uNumSQ3[RATE_54M];
2665         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2666         //ulRatio = (pDevice->uNumSQ3[RATE_54M] * 1000 / pDevice->uDiversityCnt);
2667         ulRatio += TOP_RATE_54M;
2668     }
2669     if ( pDevice->uNumSQ3[RATE_48M] > ulMaxPacket ) {
2670         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M];
2671         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2672         //ulRatio = (pDevice->uNumSQ3[RATE_48M] * 1000 / pDevice->uDiversityCnt);
2673         ulRatio += TOP_RATE_48M;
2674         ulMaxPacket = pDevice->uNumSQ3[RATE_48M];
2675     }
2676     if ( pDevice->uNumSQ3[RATE_36M] > ulMaxPacket ) {
2677         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2678                       pDevice->uNumSQ3[RATE_36M];
2679         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2680         //ulRatio = (pDevice->uNumSQ3[RATE_36M] * 1000 / pDevice->uDiversityCnt);
2681         ulRatio += TOP_RATE_36M;
2682         ulMaxPacket = pDevice->uNumSQ3[RATE_36M];
2683     }
2684     if ( pDevice->uNumSQ3[RATE_24M] > ulMaxPacket ) {
2685         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2686                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M];
2687         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2688         //ulRatio = (pDevice->uNumSQ3[RATE_24M] * 1000 / pDevice->uDiversityCnt);
2689         ulRatio += TOP_RATE_24M;
2690         ulMaxPacket = pDevice->uNumSQ3[RATE_24M];
2691     }
2692     if ( pDevice->uNumSQ3[RATE_18M] > ulMaxPacket ) {
2693         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2694                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2695                       pDevice->uNumSQ3[RATE_18M];
2696         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2697         //ulRatio = (pDevice->uNumSQ3[RATE_18M] * 1000 / pDevice->uDiversityCnt);
2698         ulRatio += TOP_RATE_18M;
2699         ulMaxPacket = pDevice->uNumSQ3[RATE_18M];
2700     }
2701     if ( pDevice->uNumSQ3[RATE_12M] > ulMaxPacket ) {
2702         ulPacketNum = pDevice->uNumSQ3[RATE_54M] + pDevice->uNumSQ3[RATE_48M] +
2703                       pDevice->uNumSQ3[RATE_36M] + pDevice->uNumSQ3[RATE_24M] +
2704                       pDevice->uNumSQ3[RATE_18M] + pDevice->uNumSQ3[RATE_12M];
2705         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2706         //ulRatio = (pDevice->uNumSQ3[RATE_12M] * 1000 / pDevice->uDiversityCnt);
2707         ulRatio += TOP_RATE_12M;
2708         ulMaxPacket = pDevice->uNumSQ3[RATE_12M];
2709     }
2710     if ( pDevice->uNumSQ3[RATE_11M] > ulMaxPacket ) {
2711         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2712                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2713                       pDevice->uNumSQ3[RATE_6M] - pDevice->uNumSQ3[RATE_9M];
2714         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2715         //ulRatio = (pDevice->uNumSQ3[RATE_11M] * 1000 / pDevice->uDiversityCnt);
2716         ulRatio += TOP_RATE_11M;
2717         ulMaxPacket = pDevice->uNumSQ3[RATE_11M];
2718     }
2719     if ( pDevice->uNumSQ3[RATE_9M] > ulMaxPacket ) {
2720         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2721                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M] -
2722                       pDevice->uNumSQ3[RATE_6M];
2723         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2724         //ulRatio = (pDevice->uNumSQ3[RATE_9M] * 1000 / pDevice->uDiversityCnt);
2725         ulRatio += TOP_RATE_9M;
2726         ulMaxPacket = pDevice->uNumSQ3[RATE_9M];
2727     }
2728     if ( pDevice->uNumSQ3[RATE_6M] > ulMaxPacket ) {
2729         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2730                       pDevice->uNumSQ3[RATE_2M] - pDevice->uNumSQ3[RATE_5M];
2731         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2732         //ulRatio = (pDevice->uNumSQ3[RATE_6M] * 1000 / pDevice->uDiversityCnt);
2733         ulRatio += TOP_RATE_6M;
2734         ulMaxPacket = pDevice->uNumSQ3[RATE_6M];
2735     }
2736     if ( pDevice->uNumSQ3[RATE_5M] > ulMaxPacket ) {
2737         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M] -
2738                       pDevice->uNumSQ3[RATE_2M];
2739         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2740         //ulRatio = (pDevice->uNumSQ3[RATE_5M] * 1000 / pDevice->uDiversityCnt);
2741         ulRatio += TOP_RATE_55M;
2742         ulMaxPacket = pDevice->uNumSQ3[RATE_5M];
2743     }
2744     if ( pDevice->uNumSQ3[RATE_2M] > ulMaxPacket ) {
2745         ulPacketNum = pDevice->uDiversityCnt - pDevice->uNumSQ3[RATE_1M];
2746         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2747         //ulRatio = (pDevice->uNumSQ3[RATE_2M]  * 1000 / pDevice->uDiversityCnt);
2748         ulRatio += TOP_RATE_2M;
2749         ulMaxPacket = pDevice->uNumSQ3[RATE_2M];
2750     }
2751     if ( pDevice->uNumSQ3[RATE_1M] > ulMaxPacket ) {
2752         ulPacketNum = pDevice->uDiversityCnt;
2753         ulRatio = (ulPacketNum * 1000 / pDevice->uDiversityCnt);
2754         //ulRatio = (pDevice->uNumSQ3[RATE_1M]  * 1000 / pDevice->uDiversityCnt);
2755         ulRatio += TOP_RATE_1M;
2756     }
2757
2758     return ulRatio;
2759 }
2760
2761
2762 VOID
2763 BBvClearAntDivSQ3Value (PSDevice pDevice)
2764 {
2765     UINT    ii;
2766
2767     pDevice->uDiversityCnt = 0;
2768     for (ii = 0; ii < MAX_RATE; ii++) {
2769         pDevice->uNumSQ3[ii] = 0;
2770     }
2771 }
2772
2773
2774 /*
2775  * Description: Antenna Diversity
2776  *
2777  * Parameters:
2778  *  In:
2779  *      pDevice          - Device Structure
2780  *      byRSR            - RSR from received packet
2781  *      bySQ3            - SQ3 value from received packet
2782  *  Out:
2783  *      none
2784  *
2785  * Return Value: none
2786  *
2787  */
2788
2789 VOID
2790 BBvAntennaDiversity (PSDevice pDevice, BYTE byRxRate, BYTE bySQ3)
2791 {
2792
2793     if ((byRxRate >= MAX_RATE) || (pDevice->wAntDiversityMaxRate >= MAX_RATE)) {
2794         return;
2795     }
2796     pDevice->uDiversityCnt++;
2797    // DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "pDevice->uDiversityCnt = %d\n", (int)pDevice->uDiversityCnt);
2798
2799     pDevice->uNumSQ3[byRxRate]++;
2800
2801     if (pDevice->byAntennaState == 0) {
2802
2803         if (pDevice->uDiversityCnt > pDevice->ulDiversityNValue) {
2804             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"ulDiversityNValue=[%d],54M-[%d]\n",
2805                           (int)pDevice->ulDiversityNValue, (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate]);
2806
2807             if (pDevice->uNumSQ3[pDevice->wAntDiversityMaxRate] < pDevice->uDiversityCnt/2) {
2808
2809                 pDevice->ulRatio_State0 = s_ulGetRatio(pDevice);
2810                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State0, rate = [%08x]\n", (int)pDevice->ulRatio_State0);
2811
2812                 if ( pDevice->byTMax == 0 )
2813                     return;
2814                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"1.[%08x], uNumSQ3[%d]=%d, %d\n",
2815                               (int)pDevice->ulRatio_State0, (int)pDevice->wAntDiversityMaxRate,
2816                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2817 #ifdef  PLICE_DEBUG
2818                 //printk("BBvAntennaDiversity1:call s_vChangeAntenna\n");
2819 #endif
2820                 s_vChangeAntenna(pDevice);
2821                 pDevice->byAntennaState = 1;
2822                 del_timer(&pDevice->TimerSQ3Tmax3);
2823                 del_timer(&pDevice->TimerSQ3Tmax2);
2824                 pDevice->TimerSQ3Tmax1.expires =  RUN_AT(pDevice->byTMax * HZ);
2825                 add_timer(&pDevice->TimerSQ3Tmax1);
2826
2827             } else {
2828
2829                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2830                 add_timer(&pDevice->TimerSQ3Tmax3);
2831             }
2832             BBvClearAntDivSQ3Value(pDevice);
2833
2834         }
2835     } else { //byAntennaState == 1
2836
2837         if (pDevice->uDiversityCnt > pDevice->ulDiversityMValue) {
2838
2839             del_timer(&pDevice->TimerSQ3Tmax1);
2840
2841             pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2842             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"RX:SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2843                           (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2844
2845             if (pDevice->ulRatio_State1 < pDevice->ulRatio_State0) {
2846                 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2847                               (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2848                               (int)pDevice->wAntDiversityMaxRate,
2849                               (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2850 #ifdef  PLICE_DEBUG
2851                 //printk("BBvAntennaDiversity2:call s_vChangeAntenna\n");
2852 #endif
2853                                 s_vChangeAntenna(pDevice);
2854                 pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2855                 pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2856                 add_timer(&pDevice->TimerSQ3Tmax3);
2857                 add_timer(&pDevice->TimerSQ3Tmax2);
2858             }
2859             pDevice->byAntennaState = 0;
2860             BBvClearAntDivSQ3Value(pDevice);
2861         }
2862     } //byAntennaState
2863 }
2864
2865 /*+
2866  *
2867  * Description:
2868  *  Timer for SQ3 antenna diversity
2869  *
2870  * Parameters:
2871  *  In:
2872  *  Out:
2873  *      none
2874  *
2875  * Return Value: none
2876  *
2877 -*/
2878
2879 VOID
2880 TimerSQ3CallBack (
2881     IN  HANDLE      hDeviceContext
2882     )
2883 {
2884     PSDevice        pDevice = (PSDevice)hDeviceContext;
2885
2886     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerSQ3CallBack...");
2887     spin_lock_irq(&pDevice->lock);
2888
2889     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"3.[%08x][%08x], %d\n",(int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1, (int)pDevice->uDiversityCnt);
2890 #ifdef  PLICE_DEBUG
2891                 //printk("TimerSQ3CallBack1:call s_vChangeAntenna\n");
2892 #endif
2893
2894     s_vChangeAntenna(pDevice);
2895     pDevice->byAntennaState = 0;
2896     BBvClearAntDivSQ3Value(pDevice);
2897
2898     pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2899     pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2900     add_timer(&pDevice->TimerSQ3Tmax3);
2901     add_timer(&pDevice->TimerSQ3Tmax2);
2902
2903
2904     spin_unlock_irq(&pDevice->lock);
2905     return;
2906 }
2907
2908
2909 /*+
2910  *
2911  * Description:
2912  *  Timer for SQ3 antenna diversity
2913  *
2914  * Parameters:
2915  *  In:
2916  *      pvSysSpec1
2917  *      hDeviceContext - Pointer to the adapter
2918  *      pvSysSpec2
2919  *      pvSysSpec3
2920  *  Out:
2921  *      none
2922  *
2923  * Return Value: none
2924  *
2925 -*/
2926
2927 VOID
2928 TimerState1CallBack (
2929     IN  HANDLE      hDeviceContext
2930     )
2931 {
2932     PSDevice        pDevice = (PSDevice)hDeviceContext;
2933
2934     DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"TimerState1CallBack...");
2935
2936     spin_lock_irq(&pDevice->lock);
2937     if (pDevice->uDiversityCnt < pDevice->ulDiversityMValue/100) {
2938 #ifdef  PLICE_DEBUG
2939                 //printk("TimerSQ3CallBack2:call s_vChangeAntenna\n");
2940 #endif
2941
2942                 s_vChangeAntenna(pDevice);
2943         pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2944         pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2945         add_timer(&pDevice->TimerSQ3Tmax3);
2946         add_timer(&pDevice->TimerSQ3Tmax2);
2947     } else {
2948         pDevice->ulRatio_State1 = s_ulGetRatio(pDevice);
2949         DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"SQ3_State1, rate0 = %08x,rate1 = %08x\n",
2950                       (int)pDevice->ulRatio_State0,(int)pDevice->ulRatio_State1);
2951
2952         if ( pDevice->ulRatio_State1 < pDevice->ulRatio_State0 ) {
2953             DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO"2.[%08x][%08x], uNumSQ3[%d]=%d, %d\n",
2954                           (int)pDevice->ulRatio_State0, (int)pDevice->ulRatio_State1,
2955                           (int)pDevice->wAntDiversityMaxRate,
2956                           (int)pDevice->uNumSQ3[(int)pDevice->wAntDiversityMaxRate], (int)pDevice->uDiversityCnt);
2957 #ifdef  PLICE_DEBUG
2958                 //printk("TimerSQ3CallBack3:call s_vChangeAntenna\n");
2959 #endif
2960
2961                         s_vChangeAntenna(pDevice);
2962
2963             pDevice->TimerSQ3Tmax3.expires =  RUN_AT(pDevice->byTMax3 * HZ);
2964             pDevice->TimerSQ3Tmax2.expires =  RUN_AT(pDevice->byTMax2 * HZ);
2965             add_timer(&pDevice->TimerSQ3Tmax3);
2966             add_timer(&pDevice->TimerSQ3Tmax2);
2967         }
2968     }
2969     pDevice->byAntennaState = 0;
2970     BBvClearAntDivSQ3Value(pDevice);
2971     spin_unlock_irq(&pDevice->lock);
2972
2973     return;
2974 }
2975