arch/arm/mach-davinci/board-dm644x-evm.c

   1 /*
   2  * TI DaVinci EVM board support
   3  *
   4  * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
   5  *
   6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
   7  * the terms of the GNU General Public License version 2. This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/gpio.h>
  17 #include <linux/leds.h>
  18 #include <linux/memory.h>
  19
  20 #include <linux/i2c.h>
  21 #include <linux/i2c/pcf857x.h>
  22 #include <linux/i2c/at24.h>
  23 #include <linux/etherdevice.h>
  24 #include <linux/mtd/mtd.h>
  25 #include <linux/mtd/nand.h>
  26 #include <linux/mtd/partitions.h>
  27 #include <linux/mtd/physmap.h>
  28 #include <linux/io.h>
  29 #include <linux/phy.h>
  30 #include <linux/clk.h>
  31 #include <linux/videodev2.h>
  32 #include <linux/davinci_emac.h>
  33
  34 #include <media/tvp514x.h>
  35
  36 #include <asm/setup.h>
  37 #include <asm/mach-types.h>
  38
  39 #include <asm/mach/arch.h>
  40 #include <asm/mach/map.h>
  41 #include <asm/mach/flash.h>
  42
  43 #include <mach/dm644x.h>
  44 #include <mach/common.h>
  45 #include <mach/i2c.h>
  46 #include <mach/serial.h>
  47 #include <mach/mux.h>
  48 #include <mach/psc.h>
  49 #include <mach/nand.h>
  50 #include <mach/mmc.h>
  51
  52 #define DM644X_EVM_PHY_MASK             (0x2)
  53 #define DM644X_EVM_MDIO_FREQUENCY       (2200000) /* PHY bus frequency */
  54
  55 #define DAVINCI_CFC_ATA_BASE              0x01C66000
  56
  57 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE   0x01e00000
  58 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE  0x02000000
  59 #define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE  0x04000000
  60 #define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE  0x06000000
  61 #define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE  0x08000000
  62
  63 #define LXT971_PHY_ID   (0x001378e2)
  64 #define LXT971_PHY_MASK (0xfffffff0)
  65
  66 static struct mtd_partition davinci_evm_norflash_partitions[] = {
  67         /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
  68         {
  69                 .name           = "bootloader",
  70                 .offset         = 0,
  71                 .size           = 5 * SZ_64K,
  72                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
  73         },
  74         /* bootloader params in the next 1 sectors */
  75         {
  76                 .name           = "params",
  77                 .offset         = MTDPART_OFS_APPEND,
  78                 .size           = SZ_64K,
  79                 .mask_flags     = 0,
  80         },
  81         /* kernel */
  82         {
  83                 .name           = "kernel",
  84                 .offset         = MTDPART_OFS_APPEND,
  85                 .size           = SZ_2M,
  86                 .mask_flags     = 0
  87         },
  88         /* file system */
  89         {
  90                 .name           = "filesystem",
  91                 .offset         = MTDPART_OFS_APPEND,
  92                 .size           = MTDPART_SIZ_FULL,
  93                 .mask_flags     = 0
  94         }
  95 };
  96
  97 static struct physmap_flash_data davinci_evm_norflash_data = {
  98         .width          = 2,
  99         .parts          = davinci_evm_norflash_partitions,
 100         .nr_parts       = ARRAY_SIZE(davinci_evm_norflash_partitions),
 101 };
 102
 103 /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
 104  * limits addresses to 16M, so using addresses past 16M will wrap */
 105 static struct resource davinci_evm_norflash_resource = {
 106         .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
 107         .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
 108         .flags          = IORESOURCE_MEM,
 109 };
 110
 111 static struct platform_device davinci_evm_norflash_device = {
 112         .name           = "physmap-flash",
 113         .id             = 0,
 114         .dev            = {
 115                 .platform_data  = &davinci_evm_norflash_data,
 116         },
 117         .num_resources  = 1,
 118         .resource       = &davinci_evm_norflash_resource,
 119 };
 120
 121 /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
 122  * It may used instead of the (default) NOR chip to boot, using TI's
 123  * tools to install the secondary boot loader (UBL) and U-Boot.
 124  */
 125 struct mtd_partition davinci_evm_nandflash_partition[] = {
 126         /* Bootloader layout depends on whose u-boot is installed, but we
 127          * can hide all the details.
 128          *  - block 0 for u-boot environment ... in mainline u-boot
 129          *  - block 1 for UBL (plus up to four backup copies in blocks 2..5)
 130          *  - blocks 6...? for u-boot
 131          *  - blocks 16..23 for u-boot environment ... in TI's u-boot
 132          */
 133         {
 134                 .name           = "bootloader",
 135                 .offset         = 0,
 136                 .size           = SZ_256K + SZ_128K,
 137                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 138         },
 139         /* Kernel */
 140         {
 141                 .name           = "kernel",
 142                 .offset         = MTDPART_OFS_APPEND,
 143                 .size           = SZ_4M,
 144                 .mask_flags     = 0,
 145         },
 146         /* File system (older GIT kernels started this on the 5MB mark) */
 147         {
 148                 .name           = "filesystem",
 149                 .offset         = MTDPART_OFS_APPEND,
 150                 .size           = MTDPART_SIZ_FULL,
 151                 .mask_flags     = 0,
 152         }
 153         /* A few blocks at end hold a flash BBT ... created by TI's CCS
 154          * using flashwriter_nand.out, but ignored by TI's versions of
 155          * Linux and u-boot.  We boot faster by using them.
 156          */
 157 };
 158
 159 static struct davinci_nand_pdata davinci_evm_nandflash_data = {
 160         .parts          = davinci_evm_nandflash_partition,
 161         .nr_parts       = ARRAY_SIZE(davinci_evm_nandflash_partition),
 162         .ecc_mode       = NAND_ECC_HW,
 163         .options        = NAND_USE_FLASH_BBT,
 164 };
 165
 166 static struct resource davinci_evm_nandflash_resource[] = {
 167         {
 168                 .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
 169                 .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
 170                 .flags          = IORESOURCE_MEM,
 171         }, {
 172                 .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
 173                 .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
 174                 .flags          = IORESOURCE_MEM,
 175         },
 176 };
 177
 178 static struct platform_device davinci_evm_nandflash_device = {
 179         .name           = "davinci_nand",
 180         .id             = 0,
 181         .dev            = {
 182                 .platform_data  = &davinci_evm_nandflash_data,
 183         },
 184         .num_resources  = ARRAY_SIZE(davinci_evm_nandflash_resource),
 185         .resource       = davinci_evm_nandflash_resource,
 186 };
 187
 188 static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
 189
 190 static struct platform_device davinci_fb_device = {
 191         .name           = "davincifb",
 192         .id             = -1,
 193         .dev = {
 194                 .dma_mask               = &davinci_fb_dma_mask,
 195                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 196         },
 197         .num_resources = 0,
 198 };
 199
 200 static struct tvp514x_platform_data tvp5146_pdata = {
 201         .clk_polarity = 0,
 202         .hs_polarity = 1,
 203         .vs_polarity = 1
 204 };
 205
 206 #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
 207 /* Inputs available at the TVP5146 */
 208 static struct v4l2_input tvp5146_inputs[] = {
 209         {
 210                 .index = 0,
 211                 .name = "Composite",
 212                 .type = V4L2_INPUT_TYPE_CAMERA,
 213                 .std = TVP514X_STD_ALL,
 214         },
 215         {
 216                 .index = 1,
 217                 .name = "S-Video",
 218                 .type = V4L2_INPUT_TYPE_CAMERA,
 219                 .std = TVP514X_STD_ALL,
 220         },
 221 };
 222
 223 /*
 224  * this is the route info for connecting each input to decoder
 225  * ouput that goes to vpfe. There is a one to one correspondence
 226  * with tvp5146_inputs
 227  */
 228 static struct vpfe_route tvp5146_routes[] = {
 229         {
 230                 .input = INPUT_CVBS_VI2B,
 231                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 232         },
 233         {
 234                 .input = INPUT_SVIDEO_VI2C_VI1C,
 235                 .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
 236         },
 237 };
 238
 239 static struct vpfe_subdev_info vpfe_sub_devs[] = {
 240         {
 241                 .name = "tvp5146",
 242                 .grp_id = 0,
 243                 .num_inputs = ARRAY_SIZE(tvp5146_inputs),
 244                 .inputs = tvp5146_inputs,
 245                 .routes = tvp5146_routes,
 246                 .can_route = 1,
 247                 .ccdc_if_params = {
 248                         .if_type = VPFE_BT656,
 249                         .hdpol = VPFE_PINPOL_POSITIVE,
 250                         .vdpol = VPFE_PINPOL_POSITIVE,
 251                 },
 252                 .board_info = {
 253                         I2C_BOARD_INFO("tvp5146", 0x5d),
 254                         .platform_data = &tvp5146_pdata,
 255                 },
 256         },
 257 };
 258
 259 static struct vpfe_config vpfe_cfg = {
 260         .num_subdevs = ARRAY_SIZE(vpfe_sub_devs),
 261         .i2c_adapter_id = 1,
 262         .sub_devs = vpfe_sub_devs,
 263         .card_name = "DM6446 EVM",
 264         .ccdc = "DM6446 CCDC",
 265 };
 266
 267 static struct platform_device rtc_dev = {
 268         .name           = "rtc_davinci_evm",
 269         .id             = -1,
 270 };
 271
 272 static struct resource ide_resources[] = {
 273         {
 274                 .start          = DAVINCI_CFC_ATA_BASE,
 275                 .end            = DAVINCI_CFC_ATA_BASE + 0x7ff,
 276                 .flags          = IORESOURCE_MEM,
 277         },
 278         {
 279                 .start          = IRQ_IDE,
 280                 .end            = IRQ_IDE,
 281                 .flags          = IORESOURCE_IRQ,
 282         },
 283 };
 284
 285 static u64 ide_dma_mask = DMA_BIT_MASK(32);
 286
 287 static struct platform_device ide_dev = {
 288         .name           = "palm_bk3710",
 289         .id             = -1,
 290         .resource       = ide_resources,
 291         .num_resources  = ARRAY_SIZE(ide_resources),
 292         .dev = {
 293                 .dma_mask               = &ide_dma_mask,
 294                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 295         },
 296 };
 297
 298 static struct snd_platform_data dm644x_evm_snd_data;
 299
 300 /*----------------------------------------------------------------------*/
 301
 302 /*
 303  * I2C GPIO expanders
 304  */
 305
 306 #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
 307
 308
 309 /* U2 -- LEDs */
 310
 311 static struct gpio_led evm_leds[] = {
 312         { .name = "DS8", .active_low = 1,
 313                 .default_trigger = "heartbeat", },
 314         { .name = "DS7", .active_low = 1, },
 315         { .name = "DS6", .active_low = 1, },
 316         { .name = "DS5", .active_low = 1, },
 317         { .name = "DS4", .active_low = 1, },
 318         { .name = "DS3", .active_low = 1, },
 319         { .name = "DS2", .active_low = 1,
 320                 .default_trigger = "mmc0", },
 321         { .name = "DS1", .active_low = 1,
 322                 .default_trigger = "ide-disk", },
 323 };
 324
 325 static const struct gpio_led_platform_data evm_led_data = {
 326         .num_leds       = ARRAY_SIZE(evm_leds),
 327         .leds           = evm_leds,
 328 };
 329
 330 static struct platform_device *evm_led_dev;
 331
 332 static int
 333 evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 334 {
 335         struct gpio_led *leds = evm_leds;
 336         int status;
 337
 338         while (ngpio--) {
 339                 leds->gpio = gpio++;
 340                 leds++;
 341         }
 342
 343         /* what an extremely annoying way to be forced to handle
 344          * device unregistration ...
 345          */
 346         evm_led_dev = platform_device_alloc("leds-gpio", 0);
 347         platform_device_add_data(evm_led_dev,
 348                         &evm_led_data, sizeof evm_led_data);
 349
 350         evm_led_dev->dev.parent = &client->dev;
 351         status = platform_device_add(evm_led_dev);
 352         if (status < 0) {
 353                 platform_device_put(evm_led_dev);
 354                 evm_led_dev = NULL;
 355         }
 356         return status;
 357 }
 358
 359 static int
 360 evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 361 {
 362         if (evm_led_dev) {
 363                 platform_device_unregister(evm_led_dev);
 364                 evm_led_dev = NULL;
 365         }
 366         return 0;
 367 }
 368
 369 static struct pcf857x_platform_data pcf_data_u2 = {
 370         .gpio_base      = PCF_Uxx_BASE(0),
 371         .setup          = evm_led_setup,
 372         .teardown       = evm_led_teardown,
 373 };
 374
 375
 376 /* U18 - A/V clock generator and user switch */
 377
 378 static int sw_gpio;
 379
 380 static ssize_t
 381 sw_show(struct device *d, struct device_attribute *a, char *buf)
 382 {
 383         char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
 384
 385         strcpy(buf, s);
 386         return strlen(s);
 387 }
 388
 389 static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
 390
 391 static int
 392 evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 393 {
 394         int     status;
 395
 396         /* export dip switch option */
 397         sw_gpio = gpio + 7;
 398         status = gpio_request(sw_gpio, "user_sw");
 399         if (status == 0)
 400                 status = gpio_direction_input(sw_gpio);
 401         if (status == 0)
 402                 status = device_create_file(&client->dev, &dev_attr_user_sw);
 403         else
 404                 gpio_free(sw_gpio);
 405         if (status != 0)
 406                 sw_gpio = -EINVAL;
 407
 408         /* audio PLL:  48 kHz (vs 44.1 or 32), single rate (vs double) */
 409         gpio_request(gpio + 3, "pll_fs2");
 410         gpio_direction_output(gpio + 3, 0);
 411
 412         gpio_request(gpio + 2, "pll_fs1");
 413         gpio_direction_output(gpio + 2, 0);
 414
 415         gpio_request(gpio + 1, "pll_sr");
 416         gpio_direction_output(gpio + 1, 0);
 417
 418         return 0;
 419 }
 420
 421 static int
 422 evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 423 {
 424         gpio_free(gpio + 1);
 425         gpio_free(gpio + 2);
 426         gpio_free(gpio + 3);
 427
 428         if (sw_gpio > 0) {
 429                 device_remove_file(&client->dev, &dev_attr_user_sw);
 430                 gpio_free(sw_gpio);
 431         }
 432         return 0;
 433 }
 434
 435 static struct pcf857x_platform_data pcf_data_u18 = {
 436         .gpio_base      = PCF_Uxx_BASE(1),
 437         .n_latch        = (1 << 3) | (1 << 2) | (1 << 1),
 438         .setup          = evm_u18_setup,
 439         .teardown       = evm_u18_teardown,
 440 };
 441
 442
 443 /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
 444
 445 static int
 446 evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 447 {
 448         /* p0 = nDRV_VBUS (initial:  don't supply it) */
 449         gpio_request(gpio + 0, "nDRV_VBUS");
 450         gpio_direction_output(gpio + 0, 1);
 451
 452         /* p1 = VDDIMX_EN */
 453         gpio_request(gpio + 1, "VDDIMX_EN");
 454         gpio_direction_output(gpio + 1, 1);
 455
 456         /* p2 = VLYNQ_EN */
 457         gpio_request(gpio + 2, "VLYNQ_EN");
 458         gpio_direction_output(gpio + 2, 1);
 459
 460         /* p3 = n3V3_CF_RESET (initial: stay in reset) */
 461         gpio_request(gpio + 3, "nCF_RESET");
 462         gpio_direction_output(gpio + 3, 0);
 463
 464         /* (p4 unused) */
 465
 466         /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
 467         gpio_request(gpio + 5, "WLAN_RESET");
 468         gpio_direction_output(gpio + 5, 1);
 469
 470         /* p6 = nATA_SEL (initial: select) */
 471         gpio_request(gpio + 6, "nATA_SEL");
 472         gpio_direction_output(gpio + 6, 0);
 473
 474         /* p7 = nCF_SEL (initial: deselect) */
 475         gpio_request(gpio + 7, "nCF_SEL");
 476         gpio_direction_output(gpio + 7, 1);
 477
 478         /* irlml6401 switches over 1A, in under 8 msec;
 479          * now it can be managed by nDRV_VBUS ...
 480          */
 481         setup_usb(500, 8);
 482
 483         return 0;
 484 }
 485
 486 static int
 487 evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
 488 {
 489         gpio_free(gpio + 7);
 490         gpio_free(gpio + 6);
 491         gpio_free(gpio + 5);
 492         gpio_free(gpio + 3);
 493         gpio_free(gpio + 2);
 494         gpio_free(gpio + 1);
 495         gpio_free(gpio + 0);
 496         return 0;
 497 }
 498
 499 static struct pcf857x_platform_data pcf_data_u35 = {
 500         .gpio_base      = PCF_Uxx_BASE(2),
 501         .setup          = evm_u35_setup,
 502         .teardown       = evm_u35_teardown,
 503 };
 504
 505 /*----------------------------------------------------------------------*/
 506
 507 /* Most of this EEPROM is unused, but U-Boot uses some data:
 508  *  - 0x7f00, 6 bytes Ethernet Address
 509  *  - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
 510  *  - ... newer boards may have more
 511  */
 512
 513 static struct at24_platform_data eeprom_info = {
 514         .byte_len       = (256*1024) / 8,
 515         .page_size      = 64,
 516         .flags          = AT24_FLAG_ADDR16,
 517         .setup          = davinci_get_mac_addr,
 518         .context        = (void *)0x7f00,
 519 };
 520
 521 /*
 522  * MSP430 supports RTC, card detection, input from IR remote, and
 523  * a bit more.  It triggers interrupts on GPIO(7) from pressing
 524  * buttons on the IR remote, and for card detect switches.
 525  */
 526 static struct i2c_client *dm6446evm_msp;
 527
 528 static int dm6446evm_msp_probe(struct i2c_client *client,
 529                 const struct i2c_device_id *id)
 530 {
 531         dm6446evm_msp = client;
 532         return 0;
 533 }
 534
 535 static int dm6446evm_msp_remove(struct i2c_client *client)
 536 {
 537         dm6446evm_msp = NULL;
 538         return 0;
 539 }
 540
 541 static const struct i2c_device_id dm6446evm_msp_ids[] = {
 542         { "dm6446evm_msp", 0, },
 543         { /* end of list */ },
 544 };
 545
 546 static struct i2c_driver dm6446evm_msp_driver = {
 547         .driver.name    = "dm6446evm_msp",
 548         .id_table       = dm6446evm_msp_ids,
 549         .probe          = dm6446evm_msp_probe,
 550         .remove         = dm6446evm_msp_remove,
 551 };
 552
 553 static int dm6444evm_msp430_get_pins(void)
 554 {
 555         static const char txbuf[2] = { 2, 4, };
 556         char buf[4];
 557         struct i2c_msg msg[2] = {
 558                 {
 559                         .addr = dm6446evm_msp->addr,
 560                         .flags = 0,
 561                         .len = 2,
 562                         .buf = (void __force *)txbuf,
 563                 },
 564                 {
 565                         .addr = dm6446evm_msp->addr,
 566                         .flags = I2C_M_RD,
 567                         .len = 4,
 568                         .buf = buf,
 569                 },
 570         };
 571         int status;
 572
 573         if (!dm6446evm_msp)
 574                 return -ENXIO;
 575
 576         /* Command 4 == get input state, returns port 2 and port3 data
 577          *   S Addr W [A] len=2 [A] cmd=4 [A]
 578          *   RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
 579          */
 580         status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
 581         if (status < 0)
 582                 return status;
 583
 584         dev_dbg(&dm6446evm_msp->dev,
 585                 "PINS: %02x %02x %02x %02x\n",
 586                 buf[0], buf[1], buf[2], buf[3]);
 587
 588         return (buf[3] << 8) | buf[2];
 589 }
 590
 591 static int dm6444evm_mmc_get_cd(int module)
 592 {
 593         int status = dm6444evm_msp430_get_pins();
 594
 595         return (status < 0) ? status : !(status & BIT(1));
 596 }
 597
 598 static int dm6444evm_mmc_get_ro(int module)
 599 {
 600         int status = dm6444evm_msp430_get_pins();
 601
 602         return (status < 0) ? status : status & BIT(6 + 8);
 603 }
 604
 605 static struct davinci_mmc_config dm6446evm_mmc_config = {
 606         .get_cd         = dm6444evm_mmc_get_cd,
 607         .get_ro         = dm6444evm_mmc_get_ro,
 608         .wires          = 4,
 609         .version        = MMC_CTLR_VERSION_1
 610 };
 611
 612 static struct i2c_board_info __initdata i2c_info[] =  {
 613         {
 614                 I2C_BOARD_INFO("dm6446evm_msp", 0x23),
 615         },
 616         {
 617                 I2C_BOARD_INFO("pcf8574", 0x38),
 618                 .platform_data  = &pcf_data_u2,
 619         },
 620         {
 621                 I2C_BOARD_INFO("pcf8574", 0x39),
 622                 .platform_data  = &pcf_data_u18,
 623         },
 624         {
 625                 I2C_BOARD_INFO("pcf8574", 0x3a),
 626                 .platform_data  = &pcf_data_u35,
 627         },
 628         {
 629                 I2C_BOARD_INFO("24c256", 0x50),
 630                 .platform_data  = &eeprom_info,
 631         },
 632         {
 633                 I2C_BOARD_INFO("tlv320aic33", 0x1b),
 634         },
 635 };
 636
 637 /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
 638  * which requires 100 usec of idle bus after i2c writes sent to it.
 639  */
 640 static struct davinci_i2c_platform_data i2c_pdata = {
 641         .bus_freq       = 20 /* kHz */,
 642         .bus_delay      = 100 /* usec */,
 643 };
 644
 645 static void __init evm_init_i2c(void)
 646 {
 647         davinci_init_i2c(&i2c_pdata);
 648         i2c_add_driver(&dm6446evm_msp_driver);
 649         i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
 650 }
 651
 652 static struct platform_device *davinci_evm_devices[] __initdata = {
 653         &davinci_fb_device,
 654         &rtc_dev,
 655 };
 656
 657 static struct davinci_uart_config uart_config __initdata = {
 658         .enabled_uarts = (1 << 0),
 659 };
 660
 661 static void __init
 662 davinci_evm_map_io(void)
 663 {
 664         /* setup input configuration for VPFE input devices */
 665         dm644x_set_vpfe_config(&vpfe_cfg);
 666         dm644x_init();
 667 }
 668
 669 static int davinci_phy_fixup(struct phy_device *phydev)
 670 {
 671         unsigned int control;
 672         /* CRITICAL: Fix for increasing PHY signal drive strength for
 673          * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
 674          * signal strength was low causing  TX to fail randomly. The
 675          * fix is to Set bit 11 (Increased MII drive strength) of PHY
 676          * register 26 (Digital Config register) on this phy. */
 677         control = phy_read(phydev, 26);
 678         phy_write(phydev, 26, (control | 0x800));
 679         return 0;
 680 }
 681
 682 #if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
 683     defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
 684 #define HAS_ATA 1
 685 #else
 686 #define HAS_ATA 0
 687 #endif
 688
 689 #if defined(CONFIG_MTD_PHYSMAP) || \
 690     defined(CONFIG_MTD_PHYSMAP_MODULE)
 691 #define HAS_NOR 1
 692 #else
 693 #define HAS_NOR 0
 694 #endif
 695
 696 #if defined(CONFIG_MTD_NAND_DAVINCI) || \
 697     defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
 698 #define HAS_NAND 1
 699 #else
 700 #define HAS_NAND 0
 701 #endif
 702
 703 static __init void davinci_evm_init(void)
 704 {
 705         struct clk *aemif_clk;
 706         struct davinci_soc_info *soc_info = &davinci_soc_info;
 707
 708         aemif_clk = clk_get(NULL, "aemif");
 709         clk_enable(aemif_clk);
 710
 711         if (HAS_ATA) {
 712                 if (HAS_NAND || HAS_NOR)
 713                         pr_warning("WARNING: both IDE and Flash are "
 714                                 "enabled, but they share AEMIF pins.\n"
 715                                 "\tDisable IDE for NAND/NOR support.\n");
 716                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
 717                 davinci_cfg_reg(DM644X_ATAEN);
 718                 davinci_cfg_reg(DM644X_HDIREN);
 719                 platform_device_register(&ide_dev);
 720         } else if (HAS_NAND || HAS_NOR) {
 721                 davinci_cfg_reg(DM644X_HPIEN_DISABLE);
 722                 davinci_cfg_reg(DM644X_ATAEN_DISABLE);
 723
 724                 /* only one device will be jumpered and detected */
 725                 if (HAS_NAND) {
 726                         platform_device_register(&davinci_evm_nandflash_device);
 727                         evm_leds[7].default_trigger = "nand-disk";
 728                         if (HAS_NOR)
 729                                 pr_warning("WARNING: both NAND and NOR flash "
 730                                         "are enabled; disable one of them.\n");
 731                 } else if (HAS_NOR)
 732                         platform_device_register(&davinci_evm_norflash_device);
 733         }
 734
 735         platform_add_devices(davinci_evm_devices,
 736                              ARRAY_SIZE(davinci_evm_devices));
 737         evm_init_i2c();
 738
 739         davinci_setup_mmc(0, &dm6446evm_mmc_config);
 740
 741         davinci_serial_init(&uart_config);
 742         dm644x_init_asp(&dm644x_evm_snd_data);
 743
 744         soc_info->emac_pdata->phy_mask = DM644X_EVM_PHY_MASK;
 745         soc_info->emac_pdata->mdio_max_freq = DM644X_EVM_MDIO_FREQUENCY;
 746
 747         /* Register the fixup for PHY on DaVinci */
 748         phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
 749                                         davinci_phy_fixup);
 750
 751 }
 752
 753 static __init void davinci_evm_irq_init(void)
 754 {
 755         davinci_irq_init();
 756 }
 757
 758 MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
 759         /* Maintainer: MontaVista Software <source@mvista.com> */
 760         .phys_io      = IO_PHYS,
 761         .io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
 762         .boot_params  = (DAVINCI_DDR_BASE + 0x100),
 763         .map_io       = davinci_evm_map_io,
 764         .init_irq     = davinci_evm_irq_init,
 765         .timer        = &davinci_timer,
 766         .init_machine = davinci_evm_init,
 767 MACHINE_END