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First Support on Ginger and OMAP TI
[linux-ginger.git] / arch / arm / mach-omap2 / board-omap3evm.c
blob1a49b197ccded68e0d5437285f2188fae712b0ea
1 /*
2 * linux/arch/arm/mach-omap2/board-omap3evm.c
3 *
4 * Copyright (C) 2008 Texas Instruments
5 *
6 * Modified from mach-omap2/board-3430sdp.c
7 *
8 * Initial code: Syed Mohammed Khasim
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/delay.h>
19 #include <linux/err.h>
20 #include <linux/clk.h>
21 #include <linux/gpio.h>
22 #include <linux/input.h>
23 #include <linux/input/matrix_keypad.h>
24 #include <linux/leds.h>
25 #include <linux/interrupt.h>
26
27 #include <linux/spi/spi.h>
28 #include <linux/spi/ads7846.h>
29 #include <linux/i2c/twl4030.h>
30 #include <linux/regulator/machine.h>
31 #include <linux/usb/otg.h>
32 #include <linux/smsc911x.h>
33
34 #include <linux/mtd/mtd.h>
35 #include <linux/mtd/partitions.h>
36 #include <linux/mtd/nand.h>
37
38
39 #include <linux/regulator/machine.h>
40
41 #include <mach/hardware.h>
42 #include <asm/mach-types.h>
43 #include <asm/mach/arch.h>
44 #include <asm/mach/map.h>
45
46 #include <plat/board.h>
47 #include <plat/mux.h>
48 #include <plat/gpmc.h>
49 #include <plat/nand.h>
50 #include <plat/usb.h>
51 #include <plat/common.h>
52 #include <plat/control.h>
53 #include <plat/mcspi.h>
54 #include <plat/clock.h>
55 #include <plat/omap-pm.h>
56 #include <plat/display.h>
57
58 #include "sdram-micron-mt46h32m32lf-6.h"
59 #include "mmc-twl4030.h"
60 #include "pm.h"
61 #include "prm-regbits-34xx.h"
62 #include "omap3-opp.h"
63 #include "board-omap3evm-camera.h"
64
65 #include "board-omap35x-pmic.h"
66
67 #define GPMC_CS0_BASE 0x60
68 #define GPMC_CS_SIZE 0x30
69
70 #define NAND_BLOCK_SIZE SZ_128K
71
72 #define OMAP3_EVM_TS_GPIO 175
73 #define OMAP3_EVM_EHCI_VBUS 22
74 #define OMAP3_EVM_EHCI_SELECT 61
75
76 #define OMAP3EVM_ETHR_START 0x2c000000
77 #define OMAP3EVM_ETHR_SIZE 1024
78 #define OMAP3EVM_ETHR_ID_REV 0x50
79 #define OMAP3EVM_ETHR_GPIO_IRQ 176
80 #define OMAP3EVM_SMC911X_CS 5
81
82
83 static struct mtd_partition omap3evm_nand_partitions[] = {
84 /* All the partition sizes are listed in terms of NAND block size */
85 {
86 .name = "xloader-nand",
87 .offset = 0,
88 .size = 4*(SZ_128K),
89 .mask_flags = MTD_WRITEABLE
90 },
91 {
92 .name = "uboot-nand",
93 .offset = MTDPART_OFS_APPEND,
94 .size = 14*(SZ_128K),
95 .mask_flags = MTD_WRITEABLE
96 },
97 {
98 .name = "params-nand",
99 .offset = MTDPART_OFS_APPEND,
100 .size = 2*(SZ_128K)
101 },
102 {
103 .name = "linux-nand",
104 .offset = MTDPART_OFS_APPEND,
105 .size = 40*(SZ_128K)
106 },
107 {
108 .name = "jffs2-nand",
109 .size = MTDPART_SIZ_FULL,
110 .offset = MTDPART_OFS_APPEND,
111 },
112 };
113
114 static struct omap_nand_platform_data omap3evm_nand_data = {
115 .parts = omap3evm_nand_partitions,
116 .nr_parts = ARRAY_SIZE(omap3evm_nand_partitions),
117 .nand_setup = NULL,
118 .dma_channel = -1, /* disable DMA in OMAP NAND driver */
119 .dev_ready = NULL,
120 };
121
122 static struct resource omap3evm_nand_resource = {
123 .flags = IORESOURCE_MEM,
124 };
125
126 static struct platform_device omap3evm_nand_device = {
127 .name = "omap2-nand",
128 .id = 0,
129 .dev = {
130 .platform_data = &omap3evm_nand_data,
131 },
132 .num_resources = 1,
133 .resource = &omap3evm_nand_resource,
134 };
135
136
137 void __init omap3evm_flash_init(void)
138 {
139 u8 cs = 0;
140 u8 nandcs = GPMC_CS_NUM + 1;
141 u32 gpmc_base_add = OMAP34XX_GPMC_VIRT;
142
143 while (cs < GPMC_CS_NUM) {
144 u32 ret = 0;
145 ret = gpmc_cs_read_reg(cs, GPMC_CS_CONFIG1);
146
147 if ((ret & 0xC00) == 0x800) {
148 /* Found it!! */
149 if (nandcs > GPMC_CS_NUM)
150 nandcs = cs;
151 }
152 cs++;
153 }
154 if (nandcs > GPMC_CS_NUM) {
155 printk(KERN_INFO "NAND: Unable to find configuration "
156 " in GPMC\n ");
157 return;
158 }
159
160 if (nandcs < GPMC_CS_NUM) {
161 omap3evm_nand_data.cs = nandcs;
162 omap3evm_nand_data.gpmc_cs_baseaddr = (void *)(gpmc_base_add +
163 GPMC_CS0_BASE + nandcs*GPMC_CS_SIZE);
164 omap3evm_nand_data.gpmc_baseaddr = (void *) (gpmc_base_add);
165
166 if (platform_device_register(&omap3evm_nand_device) < 0) {
167 printk(KERN_ERR "Unable to register NAND device\n");
168 }
169 }
170 }
171
172 static u8 omap3_evm_version;
173
174 u8 get_omap3_evm_rev(void)
175 {
176 return omap3_evm_version;
177 }
178 EXPORT_SYMBOL(get_omap3_evm_rev);
179
180 static void __init omap3_evm_get_revision(void)
181 {
182 void __iomem *ioaddr;
183 unsigned int smsc_id;
184
185 /* Ethernet PHY ID is stored at ID_REV register */
186 ioaddr = ioremap_nocache(OMAP3EVM_ETHR_START, SZ_1K);
187 smsc_id = readl(ioaddr + OMAP3EVM_ETHR_ID_REV) & 0xFFFF0000;
188 iounmap(ioaddr);
189
190 switch (smsc_id) {
191 /*SMSC9115 chipset*/
192 case 0x01150000:
193 omap3_evm_version = OMAP3EVM_BOARD_GEN_1;
194 break;
195 /*SMSC 9220 chipset*/
196 case 0x92200000:
197 default:
198 omap3_evm_version = OMAP3EVM_BOARD_GEN_2;
199 }
200 }
201
202 #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
203 static struct resource omap3evm_smsc911x_resources[] = {
204 [0] = {
205 .start = OMAP3EVM_ETHR_START,
206 .end = (OMAP3EVM_ETHR_START + OMAP3EVM_ETHR_SIZE - 1),
207 .flags = IORESOURCE_MEM,
208 },
209 [1] = {
210 .start = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ),
211 .end = OMAP_GPIO_IRQ(OMAP3EVM_ETHR_GPIO_IRQ),
212 .flags = (IORESOURCE_IRQ | IRQF_TRIGGER_LOW),
213 },
214 };
215
216 static struct smsc911x_platform_config smsc911x_config = {
217 .phy_interface = PHY_INTERFACE_MODE_MII,
218 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
219 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
220 .flags = (SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS),
221 };
222
223 static struct platform_device omap3evm_smsc911x_device = {
224 .name = "smsc911x",
225 .id = -1,
226 .num_resources = ARRAY_SIZE(omap3evm_smsc911x_resources),
227 .resource = &omap3evm_smsc911x_resources[0],
228 .dev = {
229 .platform_data = &smsc911x_config,
230 },
231 };
232
233 static inline void __init omap3evm_init_smsc911x(void)
234 {
235 int eth_cs;
236 struct clk *l3ck;
237 unsigned int rate;
238
239 eth_cs = OMAP3EVM_SMC911X_CS;
240
241 l3ck = clk_get(NULL, "l3_ck");
242 if (IS_ERR(l3ck))
243 rate = 100000000;
244 else
245 rate = clk_get_rate(l3ck);
246
247 if (gpio_request(OMAP3EVM_ETHR_GPIO_IRQ, "SMC911x irq") < 0) {
248 printk(KERN_ERR "Failed to request GPIO%d for smc911x IRQ\n",
249 OMAP3EVM_ETHR_GPIO_IRQ);
250 return;
251 }
252
253 gpio_direction_input(OMAP3EVM_ETHR_GPIO_IRQ);
254
255 platform_device_register(&omap3evm_smsc911x_device);
256 }
257
258 #else
259 static inline void __init omap3evm_init_smsc911x(void) { return; }
260 #endif
261
262 /*
263 * OMAP3EVM LCD Panel control signals
264 */
265 #define OMAP3EVM_LCD_PANEL_LR 2
266 #define OMAP3EVM_LCD_PANEL_UD 3
267 #define OMAP3EVM_LCD_PANEL_INI 152
268 #define OMAP3EVM_LCD_PANEL_ENVDD 153
269 #define OMAP3EVM_LCD_PANEL_QVGA 154
270 #define OMAP3EVM_LCD_PANEL_RESB 155
271 #define OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO 210
272 #define OMAP3EVM_DVI_PANEL_EN_GPIO 199
273
274 #define ENABLE_VPLL2_DEV_GRP 0xE0
275
276 static int lcd_enabled;
277 static int dvi_enabled;
278
279 static void __init omap3_evm_display_init(void)
280 {
281 int r;
282
283 r = gpio_request(OMAP3EVM_LCD_PANEL_RESB, "lcd_panel_resb");
284 if (r) {
285 printk(KERN_ERR "failed to get lcd_panel_resb\n");
286 return;
287 }
288 gpio_direction_output(OMAP3EVM_LCD_PANEL_RESB, 1);
289
290 r = gpio_request(OMAP3EVM_LCD_PANEL_INI, "lcd_panel_ini");
291 if (r) {
292 printk(KERN_ERR "failed to get lcd_panel_ini\n");
293 goto err_1;
294 }
295 gpio_direction_output(OMAP3EVM_LCD_PANEL_INI, 1);
296
297 r = gpio_request(OMAP3EVM_LCD_PANEL_QVGA, "lcd_panel_qvga");
298 if (r) {
299 printk(KERN_ERR "failed to get lcd_panel_qvga\n");
300 goto err_2;
301 }
302 gpio_direction_output(OMAP3EVM_LCD_PANEL_QVGA, 0);
303
304 r = gpio_request(OMAP3EVM_LCD_PANEL_LR, "lcd_panel_lr");
305 if (r) {
306 printk(KERN_ERR "failed to get lcd_panel_lr\n");
307 goto err_3;
308 }
309 gpio_direction_output(OMAP3EVM_LCD_PANEL_LR, 1);
310
311 r = gpio_request(OMAP3EVM_LCD_PANEL_UD, "lcd_panel_ud");
312 if (r) {
313 printk(KERN_ERR "failed to get lcd_panel_ud\n");
314 goto err_4;
315 }
316 gpio_direction_output(OMAP3EVM_LCD_PANEL_UD, 1);
317
318 r = gpio_request(OMAP3EVM_LCD_PANEL_ENVDD, "lcd_panel_envdd");
319 if (r) {
320 printk(KERN_ERR "failed to get lcd_panel_envdd\n");
321 goto err_5;
322 }
323 gpio_direction_output(OMAP3EVM_LCD_PANEL_ENVDD, 0);
324
325 return;
326
327 err_5:
328 gpio_free(OMAP3EVM_LCD_PANEL_UD);
329 err_4:
330 gpio_free(OMAP3EVM_LCD_PANEL_LR);
331 err_3:
332 gpio_free(OMAP3EVM_LCD_PANEL_QVGA);
333 err_2:
334 gpio_free(OMAP3EVM_LCD_PANEL_INI);
335 err_1:
336 gpio_free(OMAP3EVM_LCD_PANEL_RESB);
337
338 }
339
340 static int omap3_evm_enable_lcd(struct omap_dss_device *dssdev)
341 {
342 if (dvi_enabled) {
343 printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
344 return -EINVAL;
345 }
346 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 0);
347
348 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
349 gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
350 else
351 gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
352
353 lcd_enabled = 1;
354
355 return 0;
356 }
357
358 static void omap3_evm_disable_lcd(struct omap_dss_device *dssdev)
359 {
360 gpio_set_value(OMAP3EVM_LCD_PANEL_ENVDD, 1);
361
362 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
363 gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 1);
364 else
365 gpio_set_value(OMAP3EVM_LCD_PANEL_BKLIGHT_GPIO, 0);
366
367 lcd_enabled = 0;
368 }
369
370 static struct omap_dss_device omap3_evm_lcd_device = {
371 .name = "lcd",
372 .driver_name = "sharp_ls_panel",
373 .type = OMAP_DISPLAY_TYPE_DPI,
374 .phy.dpi.data_lines = 18,
375 .platform_enable = omap3_evm_enable_lcd,
376 .platform_disable = omap3_evm_disable_lcd,
377 };
378
379 static int omap3_evm_enable_tv(struct omap_dss_device *dssdev)
380 {
381 return 0;
382 }
383
384 static void omap3_evm_disable_tv(struct omap_dss_device *dssdev)
385 {
386 }
387
388 static struct omap_dss_device omap3_evm_tv_device = {
389 .name = "tv",
390 .driver_name = "venc",
391 .type = OMAP_DISPLAY_TYPE_VENC,
392 #if defined(CONFIG_OMAP2_VENC_OUT_TYPE_SVIDEO)
393 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
394 #elif defined(CONFIG_OMAP2_VENC_OUT_TYPE_COMPOSITE)
395 .u.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE,
396 #endif
397 .platform_enable = omap3_evm_enable_tv,
398 .platform_disable = omap3_evm_disable_tv,
399 };
400
401 static int omap3_evm_enable_dvi(struct omap_dss_device *dssdev)
402 {
403 if (lcd_enabled) {
404 printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
405 return -EINVAL;
406 }
407
408 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, ENABLE_VPLL2_DEV_GRP,
409 TWL4030_VPLL2_DEV_GRP);
410 gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 1);
411
412 dvi_enabled = 1;
413 return 0;
414 }
415
416 static void omap3_evm_disable_dvi(struct omap_dss_device *dssdev)
417 {
418 twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x0,
419 TWL4030_VPLL2_DEV_GRP);
420 gpio_set_value(OMAP3EVM_DVI_PANEL_EN_GPIO, 0);
421
422 dvi_enabled = 0;
423 }
424
425 static struct omap_dss_device omap3_evm_dvi_device = {
426 .name = "dvi",
427 .driver_name = "generic_panel",
428 .type = OMAP_DISPLAY_TYPE_DPI,
429 .phy.dpi.data_lines = 24,
430 .platform_enable = omap3_evm_enable_dvi,
431 .platform_disable = omap3_evm_disable_dvi,
432 };
433
434 static struct omap_dss_device *omap3_evm_dss_devices[] = {
435 &omap3_evm_lcd_device,
436 &omap3_evm_tv_device,
437 &omap3_evm_dvi_device,
438 };
439
440 static struct omap_dss_board_info omap3_evm_dss_data = {
441 .num_devices = ARRAY_SIZE(omap3_evm_dss_devices),
442 .devices = omap3_evm_dss_devices,
443 .default_device = &omap3_evm_lcd_device,
444 };
445
446 static struct platform_device omap3_evm_dss_device = {
447 .name = "omapdss",
448 .id = -1,
449 .dev = {
450 .platform_data = &omap3_evm_dss_data,
451 },
452 };
453
454 /* Create a single supply for VMMC1 */
455 REGULATOR_CONSUMER_SINGLE_SUPPLY(vmmc1, vmmc, NULL);
456
457 /* Create a single supply for VSIM */
458 REGULATOR_CONSUMER_SINGLE_SUPPLY(vsim, vmmc_aux, NULL);
459
460 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
461 REGULATOR_INIT_DATA(vmmc1, VMMC1, 1850000, 3150000,
462 TWL_REGULATOR_MODES_DEFAULT,
463 TWL_REGULATOR_OPS_DEFAULT | REGULATOR_CHANGE_VOLTAGE,
464 false, false);
465
466 /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
467 /* Create init data for VMMC1 */
468 REGULATOR_INIT_DATA(vsim, VSIM, 1800000, 3000000,
469 TWL_REGULATOR_MODES_DEFAULT,
470 TWL_REGULATOR_OPS_DEFAULT | REGULATOR_CHANGE_VOLTAGE,
471 false, false);
472
473 static struct platform_device omap3evm_camkit_device = {
474 .name = "omap3evm_camkit",
475 .id = -1,
476 };
477
478 /* Create supplies for VAUX2 */
479 REGULATOR_CONSUMER_SINGLE_SUPPLY(vaux2, hsusb1, NULL);
480 /* VAUX2 for EHCI module on OMAP3EVM Rev >= E */
481 TWL_VAUX2_DATA;
482
483 /* Create supplies for VUSB1V5 */
484 REGULATOR_CONSUMER_SINGLE_SUPPLY(vusb1v5, hsusb1-aux, NULL);
485 /* VUSB1V5 for EHCI module on OMAP3EVM Rev < E*/
486 TWL_VUSB1V5_DATA;
487
488 /* Create supplies for VUSB1V8 */
489 REGULATOR_CONSUMER_SINGLE_SUPPLY(vusb1v8, hsusb1, NULL);
490 /* VUSB1V8 for EHCI module */
491 TWL_VUSB1V8_DATA;
492
493 static struct twl4030_hsmmc_info mmc[] = {
494 {
495 .mmc = 1,
496 .wires = 4,
497 .gpio_cd = -EINVAL,
498 .gpio_wp = 63,
499 },
500 {} /* Terminator */
501 };
502
503 static struct gpio_led gpio_leds[] = {
504 {
505 .name = "omap3evm::ledb",
506 /* normally not visible (board underside) */
507 .default_trigger = "default-on",
508 .gpio = -EINVAL, /* gets replaced */
509 .active_low = true,
510 },
511 };
512
513 static struct gpio_led_platform_data gpio_led_info = {
514 .leds = gpio_leds,
515 .num_leds = ARRAY_SIZE(gpio_leds),
516 };
517
518 static struct platform_device leds_gpio = {
519 .name = "leds-gpio",
520 .id = -1,
521 .dev = {
522 .platform_data = &gpio_led_info,
523 },
524 };
525
526 #ifdef CONFIG_PM
527 /*
528 * Save the state of keypad
529 *
530 * TODO: This definition should ideally be in a header file, but
531 * matrix_keypad.h is not the right one. Also, plat/keypad.h
532 * is no longer used.
533 */
534 struct omap_keypad_pm_state {
535 void __iomem *wk_st;
536 void __iomem *wk_en;
537 u32 wk_mask;
538 u32 padconf;
539 };
540
541 /*
542 * Board specific hook for keypad suspend
543 */
544 void omap3_evm_kp_suspend(void *ptr)
545 {
546 struct omap_keypad_pm_state *pstate =
547 (struct omap_keypad_pm_state *)ptr;
548
549 if (pstate) {
550 /*
551 * Set wake-enable bit
552 */
553 if (pstate->wk_en && pstate->wk_mask) {
554 u32 v = __raw_readl(pstate->wk_en);
555 v |= pstate->wk_mask;
556 __raw_writel(v, pstate->wk_en);
557 }
558 /*
559 * Set corresponding IOPAD wakeup-enable
560 */
561 if (cpu_is_omap34xx() && pstate->padconf) {
562 u16 v = omap_ctrl_readw(pstate->padconf);
563 v |= OMAP3_PADCONF_WAKEUPENABLE0;
564 omap_ctrl_writew(v, pstate->padconf);
565 }
566 }
567 }
568
569 /*
570 * Board specific hook for keypad resume
571 */
572 void omap3_evm_kp_resume(void *ptr)
573 {
574 struct omap_keypad_pm_state *pstate =
575 (struct omap_keypad_pm_state *)ptr;
576
577 if (pstate) {
578 /*
579 * Clear wake-enable bit
580 */
581 if (pstate->wk_en && pstate->wk_mask) {
582 u32 v = __raw_readl(pstate->wk_en);
583 v &= ~pstate->wk_mask;
584 __raw_writel(v, pstate->wk_en);
585 }
586 /*
587 * Clear corresponding IOPAD wakeup-enable
588 */
589 if (cpu_is_omap34xx() && pstate->padconf) {
590 u16 v = omap_ctrl_readw(pstate->padconf);
591 v &= ~OMAP3_PADCONF_WAKEUPENABLE0;
592 omap_ctrl_writew(v, pstate->padconf);
593 }
594 }
595 }
596
597 static struct omap_keypad_pm_state omap3evm_kp_pm_state = {
598 .wk_st = OMAP34XX_PRM_REGADDR(WKUP_MOD, PM_WKEN1),
599 .wk_en = OMAP34XX_PRM_REGADDR(WKUP_MOD, PM_WKST1),
600 .wk_mask = OMAP3430_EN_GPIO1,
601 .padconf = 0x1e0,
602 };
603 #endif /* CONFIG_PM */
604
605 static int omap3evm_twl_gpio_setup(struct device *dev,
606 unsigned gpio, unsigned ngpio)
607 {
608 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
609 omap_cfg_reg(L8_34XX_GPIO63);
610 mmc[0].gpio_cd = gpio + 0;
611 twl4030_mmc_init(mmc);
612
613 /* link regulators to MMC adapters */
614 vmmc1_consumers[0].dev = mmc[0].dev;
615 vsim_consumers[0].dev = mmc[0].dev;
616
617 /*
618 * Most GPIOs are for USB OTG. Some are mostly sent to
619 * the P2 connector; notably LEDA for the LCD backlight.
620 */
621
622 /* TWL4030_GPIO_MAX + 0 == ledA, LCD Backlight control */
623 gpio_request(gpio + TWL4030_GPIO_MAX, "EN_LCD_BKL");
624 gpio_direction_output(gpio + TWL4030_GPIO_MAX, 0);
625
626 /* gpio + 7 == DVI Enable */
627 gpio_request(gpio + 7, "EN_DVI");
628 gpio_direction_output(gpio + 7, 0);
629
630 /* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
631 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
632
633 platform_device_register(&leds_gpio);
634
635 return 0;
636 }
637
638 static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
639 .gpio_base = OMAP_MAX_GPIO_LINES,
640 .irq_base = TWL4030_GPIO_IRQ_BASE,
641 .irq_end = TWL4030_GPIO_IRQ_END,
642 .use_leds = true,
643 .setup = omap3evm_twl_gpio_setup,
644 };
645
646 static struct twl4030_usb_data omap3evm_usb_data = {
647 .usb_mode = T2_USB_MODE_ULPI,
648 };
649
650 static int board_keymap[] = {
651 KEY(0, 0, KEY_LEFT),
652 KEY(0, 1, KEY_DOWN),
653 KEY(0, 2, KEY_ENTER),
654 KEY(0, 3, KEY_M),
655
656 KEY(1, 0, KEY_RIGHT),
657 KEY(1, 1, KEY_UP),
658 KEY(1, 2, KEY_I),
659 KEY(1, 3, KEY_N),
660
661 KEY(2, 0, KEY_A),
662 KEY(2, 1, KEY_E),
663 KEY(2, 2, KEY_J),
664 KEY(2, 3, KEY_K),
665
666 KEY(3, 0, KEY_B),
667 KEY(3, 1, KEY_F),
668 KEY(3, 2, KEY_O),
669 KEY(3, 3, KEY_P)
670 };
671
672 static struct matrix_keymap_data board_map_data = {
673 .keymap = board_keymap,
674 .keymap_size = ARRAY_SIZE(board_keymap),
675 };
676
677 static struct twl4030_keypad_data omap3evm_kp_data = {
678 .keymap_data = &board_map_data,
679 .rows = 4,
680 .cols = 4,
681 .rep = 1,
682 #ifdef CONFIG_PM
683 .pm_state = (void *)&omap3evm_kp_pm_state,
684 .on_suspend = omap3_evm_kp_suspend,
685 .on_resume = omap3_evm_kp_resume,
686 #endif /* CONFIG_PM */
687 };
688
689 static struct twl4030_madc_platform_data omap3evm_madc_data = {
690 .irq_line = 1,
691 };
692
693 static struct twl4030_ins __initdata sleep_on_seq[] = {
694 /* Turn off HFCLKOUT */
695 {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_OFF), 2},
696 /* Turn OFF VDD1 */
697 {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_OFF), 2},
698 /* Turn OFF VDD2 */
699 {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_OFF), 2},
700 /* Turn OFF VPLL1 */
701 {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_OFF), 2},
702 };
703
704 static struct twl4030_script sleep_on_script __initdata = {
705 .script = sleep_on_seq,
706 .size = ARRAY_SIZE(sleep_on_seq),
707 .flags = TWL4030_SLEEP_SCRIPT,
708 };
709
710 static struct twl4030_ins wakeup_p12_seq[] __initdata = {
711 /* Turn on HFCLKOUT */
712 {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
713 /* Turn ON VDD1 */
714 {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_ACTIVE), 2},
715 /* Turn ON VDD2 */
716 {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_ACTIVE), 2},
717 /* Turn ON VPLL1 */
718 {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_ACTIVE), 2},
719 };
720
721 static struct twl4030_script wakeup_p12_script __initdata = {
722 .script = wakeup_p12_seq,
723 .size = ARRAY_SIZE(wakeup_p12_seq),
724 .flags = TWL4030_WAKEUP12_SCRIPT,
725 };
726
727 static struct twl4030_ins wakeup_p3_seq[] __initdata = {
728 {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
729 };
730
731 static struct twl4030_script wakeup_p3_script __initdata = {
732 .script = wakeup_p3_seq,
733 .size = ARRAY_SIZE(wakeup_p3_seq),
734 .flags = TWL4030_WAKEUP3_SCRIPT,
735 };
736
737 static struct twl4030_ins wrst_seq[] __initdata = {
738 /*
739 * Reset twl4030.
740 * Reset VDD1 regulator.
741 * Reset VDD2 regulator.
742 * Reset VPLL1 regulator.
743 * Enable sysclk output.
744 * Reenable twl4030.
745 */
746 {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_OFF), 2},
747 {MSG_SINGULAR(DEV_GRP_P1, 0xf, RES_STATE_WRST), 15},
748 {MSG_SINGULAR(DEV_GRP_P1, 0x10, RES_STATE_WRST), 15},
749 {MSG_SINGULAR(DEV_GRP_P1, 0x7, RES_STATE_WRST), 0x60},
750 {MSG_SINGULAR(DEV_GRP_P1, 0x19, RES_STATE_ACTIVE), 2},
751 {MSG_SINGULAR(DEV_GRP_NULL, 0x1b, RES_STATE_ACTIVE), 2},
752 };
753 static struct twl4030_script wrst_script __initdata = {
754 .script = wrst_seq,
755 .size = ARRAY_SIZE(wrst_seq),
756 .flags = TWL4030_WRST_SCRIPT,
757 };
758
759 static struct twl4030_script *twl4030_scripts[] __initdata = {
760 &sleep_on_script,
761 &wakeup_p12_script,
762 &wakeup_p3_script,
763 &wrst_script,
764 };
765
766 static struct twl4030_resconfig twl4030_rconfig[] = {
767 { .resource = RES_HFCLKOUT, .devgroup = DEV_GRP_P3, .type = -1,
768 .type2 = -1 },
769 { .resource = RES_VDD1, .devgroup = DEV_GRP_P1, .type = -1,
770 .type2 = -1 },
771 { .resource = RES_VDD2, .devgroup = DEV_GRP_P1, .type = -1,
772 .type2 = -1 },
773 { 0, 0},
774 };
775
776 static struct twl4030_power_data omap3evm_t2scripts_data __initdata = {
777 .scripts = twl4030_scripts,
778 .num = ARRAY_SIZE(twl4030_scripts),
779 .resource_config = twl4030_rconfig,
780 };
781
782 REGULATOR_CONSUMER_SINGLE_SUPPLY(vdac, vdda_dac, &omap3_evm_dss_device.dev);
783
784 /* VDAC for DSS driving S-Video */
785 TWL_VDAC_DATA;
786
787 /* VPLL2 for digital video outputs */
788 REGULATOR_CONSUMER_SINGLE_SUPPLY(vpll2, vdvi, &omap3_evm_lcd_device.dev);
789
790 REGULATOR_INIT_DATA(vpll2, VDVI, 1800000, 1800000,
791 TWL_REGULATOR_MODES_DEFAULT,
792 TWL_REGULATOR_OPS_DEFAULT,
793 false, true);
794
795 static struct twl4030_platform_data omap3evm_twldata __initdata = {
796 .irq_base = TWL4030_IRQ_BASE,
797 .irq_end = TWL4030_IRQ_END,
798
799 /* platform_data for children goes here */
800 .keypad = &omap3evm_kp_data,
801 .madc = &omap3evm_madc_data,
802 .power = &omap3evm_t2scripts_data,
803 .usb = &omap3evm_usb_data,
804 .gpio = &omap3evm_gpio_data,
805 .vmmc1 = &vmmc1_data[0],
806 .vdac = &vdac_data[0],
807 .vpll2 = &vpll2_data[0],
808 .vsim = &vsim_data[0],
809 };
810
811 static struct i2c_board_info __initdata omap3evm_i2c_boardinfo[] = {
812 {
813 I2C_BOARD_INFO("twl4030", 0x48),
814 .flags = I2C_CLIENT_WAKE,
815 .irq = INT_34XX_SYS_NIRQ,
816 .platform_data = &omap3evm_twldata,
817 },
818 };
819
820 static int __init omap3_evm_i2c_init(void)
821 {
822 omap_register_i2c_bus(1, 2600, omap3evm_i2c_boardinfo,
823 ARRAY_SIZE(omap3evm_i2c_boardinfo));
824 omap_register_i2c_bus(2, 400, NULL, 0);
825 omap_register_i2c_bus(3, 400, NULL, 0);
826 return 0;
827 }
828
829 static void ads7846_dev_init(void)
830 {
831 if (gpio_request(OMAP3_EVM_TS_GPIO, "ADS7846 pendown") < 0) {
832 printk(KERN_ERR "can't get ads7846 pen down GPIO\n");
833 return;
834 }
835
836 omap_cfg_reg(AC3_34XX_GPIO175);
837
838 gpio_direction_input(OMAP3_EVM_TS_GPIO);
839
840 omap_set_gpio_debounce(OMAP3_EVM_TS_GPIO, 1);
841 omap_set_gpio_debounce_time(OMAP3_EVM_TS_GPIO, 0xa);
842 }
843
844 static int ads7846_get_pendown_state(void)
845 {
846 return !gpio_get_value(OMAP3_EVM_TS_GPIO);
847 }
848
849 struct ads7846_platform_data ads7846_config = {
850 .x_max = 0x0fff,
851 .y_max = 0x0fff,
852 .x_plate_ohms = 180,
853 .pressure_max = 255,
854 .debounce_max = 10,
855 .debounce_tol = 3,
856 .debounce_rep = 1,
857 .get_pendown_state = ads7846_get_pendown_state,
858 .keep_vref_on = 1,
859 .settle_delay_usecs = 150,
860 };
861
862 static struct omap2_mcspi_device_config ads7846_mcspi_config = {
863 .turbo_mode = 0,
864 .single_channel = 1, /* 0: slave, 1: master */
865 };
866
867 struct spi_board_info omap3evm_spi_board_info[] = {
868 [0] = {
869 .modalias = "ads7846",
870 .bus_num = 1,
871 .chip_select = 0,
872 .max_speed_hz = 1500000,
873 .controller_data = &ads7846_mcspi_config,
874 .irq = OMAP_GPIO_IRQ(OMAP3_EVM_TS_GPIO),
875 .platform_data = &ads7846_config,
876 },
877 };
878
879 static struct omap_board_config_kernel omap3_evm_config[] __initdata = {
880 };
881
882 static void __init omap3_evm_init_irq(void)
883 {
884 omap_board_config = omap3_evm_config;
885 omap_board_config_size = ARRAY_SIZE(omap3_evm_config);
886 omap2_init_common_hw(mt46h32m32lf6_sdrc_params, NULL, omap3_mpu_rate_table,
887 omap3_dsp_rate_table, omap3_l3_rate_table);
888 omap_init_irq();
889 omap_gpio_init();
890 }
891
892 static struct platform_device *omap3_evm_devices[] __initdata = {
893 &omap3_evm_dss_device,
894 &omap3evm_camkit_device,
895 };
896
897 static struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
898
899 .port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
900 .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
901 .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
902
903 .phy_reset = true,
904 /* PHY reset GPIO will be runtime programmed based on EVM version */
905 .reset_gpio_port[0] = -EINVAL,
906 .reset_gpio_port[1] = -EINVAL,
907 .reset_gpio_port[2] = -EINVAL,
908
909 .aux[0] = 0,
910 .aux[1] = 0,
911 .aux[2] = 0,
912 };
913
914 /*
915 * Set wakeup sources for the board
916 */
917 static void __init omap3_evm_wakeup_sources(void)
918 {
919 pr_info("omap3evm: Adding wakeup sources");
920
921 omap_cfg_reg(AF26_34XX_SYS_NIRQ);
922 }
923
924 static void __init omap3_evm_init(void)
925 {
926 omap3_evm_get_revision();
927
928 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
929 omap3evm_twldata.vaux2 = &vaux2_data[0];
930 } else {
931 omap3evm_twldata.vusb1v5 = &vusb1v5_data[0];
932 omap3evm_twldata.vusb1v8 = &vusb1v8_data[0];
933 }
934
935 omap3_evm_i2c_init();
936
937 regulator_has_full_constraints();
938
939 platform_add_devices(omap3_evm_devices, ARRAY_SIZE(omap3_evm_devices));
940
941 spi_register_board_info(omap3evm_spi_board_info,
942 ARRAY_SIZE(omap3evm_spi_board_info));
943
944 omap_serial_init();
945 #ifdef CONFIG_NOP_USB_XCEIV
946 /* OMAP3EVM uses ISP1504 phy and so register nop transceiver */
947 usb_nop_xceiv_register();
948 #endif
949 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2) {
950 /* enable EHCI VBUS using GPIO22 */
951 omap_cfg_reg(AF9_34XX_GPIO22);
952 gpio_request(OMAP3_EVM_EHCI_VBUS, "enable EHCI VBUS");
953 gpio_direction_output(OMAP3_EVM_EHCI_VBUS, 0);
954 gpio_set_value(OMAP3_EVM_EHCI_VBUS, 1);
955
956 /* Select EHCI port on main board */
957 omap_cfg_reg(U3_34XX_GPIO61);
958 gpio_request(OMAP3_EVM_EHCI_SELECT, "select EHCI port");
959 gpio_direction_output(OMAP3_EVM_EHCI_SELECT, 0);
960 gpio_set_value(OMAP3_EVM_EHCI_SELECT, 0);
961
962 /* setup EHCI phy reset config */
963 omap_cfg_reg(AH14_34XX_GPIO21);
964 ehci_pdata.reset_gpio_port[1] = 21;
965
966 } else {
967 /* setup EHCI phy reset on MDC */
968 omap_cfg_reg(AF4_34XX_GPIO135_OUT);
969 ehci_pdata.reset_gpio_port[1] = 135;
970
971 /* MDC also need VUSB1V5 regulator */
972 ehci_pdata.aux[1] = 1;
973 }
974 usb_musb_init();
975 omap3evm_flash_init();
976 usb_ehci_init(&ehci_pdata);
977 ads7846_dev_init();
978 omap3evm_init_smsc911x();
979 omap3_evm_display_init();
980
981 omap3_evm_wakeup_sources();
982 }
983
984 static void __init omap3_evm_map_io(void)
985 {
986 omap2_set_globals_343x();
987 omap2_map_common_io();
988 }
989
990 MACHINE_START(OMAP3EVM, "OMAP3 EVM")
991 /* Maintainer: Syed Mohammed Khasim - Texas Instruments */
992 .phys_io = 0x48000000,
993 .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
994 .boot_params = 0x80000100,
995 .map_io = omap3_evm_map_io,
996 .init_irq = omap3_evm_init_irq,
997 .init_machine = omap3_evm_init,
998 .timer = &omap_timer,
999 MACHINE_END
Linux for Ginger Game Console