arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * Copyright (C) 2009 Texas Instruments
  10  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify
  13  * it under the terms of the GNU General Public License version 2 as
  14  * published by the Free Software Foundation.
  15  */
  16
  17 #include <linux/module.h>
  18 #include <linux/kernel.h>
  19 #include <linux/init.h>
  20 #include <linux/io.h>
  21
  22 #include <asm/cputype.h>
  23
  24 #include <plat/common.h>
  25 #include <plat/control.h>
  26 #include <plat/cpu.h>
  27
  28 static struct omap_chip_id omap_chip;
  29 static unsigned int omap_revision;
  30
  31 u32 omap3_features;
  32
  33 unsigned int omap_rev(void)
  34 {
  35         return omap_revision;
  36 }
  37 EXPORT_SYMBOL(omap_rev);
  38
  39 /**
  40  * omap_chip_is - test whether currently running OMAP matches a chip type
  41  * @oc: omap_chip_t to test against
  42  *
  43  * Test whether the currently-running OMAP chip matches the supplied
  44  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  45  */
  46 int omap_chip_is(struct omap_chip_id oci)
  47 {
  48         return (oci.oc & omap_chip.oc) ? 1 : 0;
  49 }
  50 EXPORT_SYMBOL(omap_chip_is);
  51
  52 int omap_type(void)
  53 {
  54         u32 val = 0;
  55
  56         if (cpu_is_omap24xx())
  57                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  58         else if (cpu_is_omap34xx())
  59                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  60         else {
  61                 pr_err("Cannot detect omap type!\n");
  62                 goto out;
  63         }
  64
  65         val &= OMAP2_DEVICETYPE_MASK;
  66         val >>= 8;
  67
  68 out:
  69         return val;
  70 }
  71 EXPORT_SYMBOL(omap_type);
  72
  73 /*----------------------------------------------------------------------------*/
  74
  75 #define OMAP_TAP_IDCODE         0x0204
  76 #define OMAP_TAP_DIE_ID_0       0x0218
  77 #define OMAP_TAP_DIE_ID_1       0x021C
  78 #define OMAP_TAP_DIE_ID_2       0x0220
  79 #define OMAP_TAP_DIE_ID_3       0x0224
  80
  81 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  82
  83 struct omap_id {
  84         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  85         u8      dev;            /* Device type from production_id reg */
  86         u32     type;           /* Combined type id copied to omap_revision */
  87 };
  88
  89 /* Register values to detect the OMAP version */
  90 static struct omap_id omap_ids[] __initdata = {
  91         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  92         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  93         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  94         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  95         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  96         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
  97 };
  98
  99 static void __iomem *tap_base;
 100 static u16 tap_prod_id;
 101
 102 void __init omap24xx_check_revision(void)
 103 {
 104         int i, j;
 105         u32 idcode, prod_id;
 106         u16 hawkeye;
 107         u8  dev_type, rev;
 108
 109         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 110         prod_id = read_tap_reg(tap_prod_id);
 111         hawkeye = (idcode >> 12) & 0xffff;
 112         rev = (idcode >> 28) & 0x0f;
 113         dev_type = (prod_id >> 16) & 0x0f;
 114
 115         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 116                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 117         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
 118                  read_tap_reg(OMAP_TAP_DIE_ID_0));
 119         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 120                  read_tap_reg(OMAP_TAP_DIE_ID_1),
 121                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 122         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 123                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 124         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 125                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 126         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 127                  prod_id, dev_type);
 128
 129         /* Check hawkeye ids */
 130         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 131                 if (hawkeye == omap_ids[i].hawkeye)
 132                         break;
 133         }
 134
 135         if (i == ARRAY_SIZE(omap_ids)) {
 136                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 137                 return;
 138         }
 139
 140         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 141                 if (dev_type == omap_ids[j].dev)
 142                         break;
 143         }
 144
 145         if (j == ARRAY_SIZE(omap_ids)) {
 146                 printk(KERN_ERR "Unknown OMAP device type. "
 147                                 "Handling it as OMAP%04x\n",
 148                                 omap_ids[i].type >> 16);
 149                 j = i;
 150         }
 151
 152         pr_info("OMAP%04x", omap_rev() >> 16);
 153         if ((omap_rev() >> 8) & 0x0f)
 154                 pr_info("ES%x", (omap_rev() >> 12) & 0xf);
 155         pr_info("\n");
 156 }
 157
 158 #define OMAP3_CHECK_FEATURE(status,feat)                                \
 159         if (((status & OMAP3_ ##feat## _MASK)                           \
 160                 >> OMAP3_ ##feat## _SHIFT) != FEAT_ ##feat## _NONE) {   \
 161                 omap3_features |= OMAP3_HAS_ ##feat;                    \
 162         }
 163
 164 void __init omap3_check_features(void)
 165 {
 166         u32 status;
 167
 168         omap3_features = 0;
 169
 170         status = omap_ctrl_readl(OMAP3_CONTROL_OMAP_STATUS);
 171
 172         OMAP3_CHECK_FEATURE(status, L2CACHE);
 173         OMAP3_CHECK_FEATURE(status, IVA);
 174         OMAP3_CHECK_FEATURE(status, SGX);
 175         OMAP3_CHECK_FEATURE(status, NEON);
 176         OMAP3_CHECK_FEATURE(status, ISP);
 177
 178         /*
 179          * Does it support 720MHz?
 180          */
 181         status = ((OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID))
 182                         & OMAP3_SKUID_720MHZ) ? 1 : 0 ;
 183         if (status)
 184                 omap3_features |= OMAP3_HAS_720M;
 185
 186         /*
 187          * TODO: Get additional info (where applicable)
 188          *       e.g. Size of L2 cache.
 189          */
 190 }
 191
 192 void __init omap3_check_revision(void)
 193 {
 194         u32 cpuid, idcode;
 195         u16 hawkeye;
 196         u8 rev;
 197
 198         /*
 199          * We cannot access revision registers on ES1.0.
 200          * If the processor type is Cortex-A8 and the revision is 0x0
 201          * it means its Cortex r0p0 which is 3430 ES1.0.
 202          */
 203         cpuid = read_cpuid(CPUID_ID);
 204         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 205                 omap_revision = OMAP3430_REV_ES1_0;
 206                 return;
 207         }
 208
 209         /*
 210          * Detection for 34xx ES2.0 and above can be done with just
 211          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 212          * Note that rev does not map directly to our defined processor
 213          * revision numbers as ES1.0 uses value 0.
 214          */
 215         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 216         hawkeye = (idcode >> 12) & 0xffff;
 217         rev = (idcode >> 28) & 0xff;
 218
 219         switch (hawkeye) {
 220         case 0xb7ae:
 221                 /* Handle 34xx/35xx devices */
 222                 switch (rev) {
 223                 case 0: /* Take care of early samples */
 224                 case 1:
 225                         omap_revision = OMAP3430_REV_ES2_0;
 226                         break;
 227                 case 2:
 228                         omap_revision = OMAP3430_REV_ES2_1;
 229                         break;
 230                 case 3:
 231                         omap_revision = OMAP3430_REV_ES3_0;
 232                         break;
 233                 case 4:
 234                         omap_revision = OMAP3430_REV_ES3_1;
 235                         break;
 236                 default:
 237                         /* Use the latest known revision as default */
 238                         omap_revision = OMAP3430_REV_ES3_1;
 239                 }
 240                 break;
 241         case 0xb891:
 242                 /* Handle 36xx devices */
 243                 switch (rev) {
 244                 case 0:
 245                         omap_revision = OMAP3630_REV_ES1_0;
 246                         break;
 247                 default:
 248                         /* Use the latest known revision as default */
 249                         omap_revision = OMAP3630_REV_ES1_0;
 250                 }
 251                 break;
 252         case 0xb868:
 253                 /* Handle OMAP35xx/AM35xx devices
 254                  *
 255                  * Set the device to be OMAP3505 here. Actual device
 256                  * is identified later based on the features.
 257                  */
 258                 omap_revision = OMAP3505_REV(rev);
 259                 break;
 260         default:
 261                 /* Unknown default to latest silicon rev as default*/
 262                 omap_revision = OMAP3630_REV_ES1_0;
 263         }
 264 }
 265
 266 #define OMAP3_SHOW_FEATURE(feat)                \
 267         if (omap3_has_ ##feat()) {              \
 268                 pr_info (" - "#feat" : Y");     \
 269         } else {                                \
 270                 pr_info (" - "#feat" : N");     \
 271         }
 272
 273 void __init omap3_cpuinfo(void)
 274 {
 275         u8 rev = GET_OMAP_REVISION();
 276         char cpu_name[16], cpu_rev[16];
 277
 278         /* OMAP3430 and OMAP3530 are assumed to be same.
 279          *
 280          * OMAP3525, OMAP3515 and OMAP3503 can be detected only based
 281          * on available features. Upon detection, update the CPU id
 282          * and CPU class bits.
 283          */
 284         if (cpu_is_omap3630())
 285                 strcpy(cpu_name, "OMAP3630");
 286         else if (cpu_is_omap3505()) {
 287                 /*
 288                  * AM35xx devices
 289                  */
 290                 if (omap3_has_sgx()) {
 291                         omap_revision = OMAP3517_REV(rev);
 292                         strcpy(cpu_name, "AM3517");
 293                 }
 294                 else {
 295                         /* Already set in omap3_check_revision() */
 296                         strcpy(cpu_name, "AM3505");
 297                 }
 298         }
 299         /*
 300          * OMAP3430, OMAP3525, OMAP3515, OMAP3503 devices
 301          */
 302         else if (omap3_has_iva() && omap3_has_sgx())
 303                 strcpy(cpu_name, "OMAP3430/3530");
 304         else if (omap3_has_iva()) {
 305                 omap_revision = OMAP3525_REV(rev);
 306                 strcpy(cpu_name, "OMAP3525");
 307         }
 308         else if (omap3_has_sgx()) {
 309                 omap_revision = OMAP3515_REV(rev);
 310                 strcpy(cpu_name, "OMAP3515");
 311         }
 312         else {
 313                 omap_revision = OMAP3503_REV(rev);
 314                 strcpy(cpu_name, "OMAP3503");
 315         }
 316
 317         switch (rev) {
 318         case OMAP_REVBITS_00:
 319                 strcpy(cpu_rev, "1.0");
 320                 break;
 321         case OMAP_REVBITS_10:
 322                 strcpy(cpu_rev, "2.0");
 323                 break;
 324         case OMAP_REVBITS_20:
 325                 strcpy(cpu_rev, "2.1");
 326                 break;
 327         case OMAP_REVBITS_30:
 328                 strcpy(cpu_rev, "3.0");
 329                 break;
 330         case OMAP_REVBITS_40:
 331                 strcpy(cpu_rev, "3.1");
 332                 break;
 333         default:
 334                 /* Use the latest known revision as default */
 335                 strcpy(cpu_rev, "3.1");
 336         }
 337
 338         /*
 339          * Print verbose information
 340          */
 341         pr_info("%s ES%s\n", cpu_name, cpu_rev);
 342
 343         OMAP3_SHOW_FEATURE(l2cache);
 344         OMAP3_SHOW_FEATURE(iva);
 345         OMAP3_SHOW_FEATURE(sgx);
 346         OMAP3_SHOW_FEATURE(neon);
 347         OMAP3_SHOW_FEATURE(isp);
 348         OMAP3_SHOW_FEATURE(720m);
 349 }
 350
 351 /*
 352  * Try to detect the exact revision of the omap we're running on
 353  */
 354 void __init omap2_check_revision(void)
 355 {
 356         /*
 357          * At this point we have an idea about the processor revision set
 358          * earlier with omap2_set_globals_tap().
 359          */
 360         if (cpu_is_omap24xx())
 361                 omap24xx_check_revision();
 362         else if (cpu_is_omap34xx()) {
 363                 omap3_check_features();
 364                 omap3_check_revision();
 365                 omap3_cpuinfo();
 366         }
 367         else if (cpu_is_omap44xx()) {
 368                 printk(KERN_INFO "FIXME: CPU revision = OMAP4430\n");
 369                 return;
 370         } else
 371                 pr_err("OMAP revision unknown, please fix!\n");
 372
 373         /*
 374          * OK, now we know the exact revision. Initialize omap_chip bits
 375          * for powerdowmain and clockdomain code.
 376          */
 377         if (cpu_is_omap243x()) {
 378                 /* Currently only supports 2430ES2.1 and 2430-all */
 379                 omap_chip.oc |= CHIP_IS_OMAP2430;
 380         } else if (cpu_is_omap242x()) {
 381                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 382                 omap_chip.oc |= CHIP_IS_OMAP2420;
 383         } else if (cpu_is_omap3505() || cpu_is_omap3517()) {
 384                 omap_chip.oc = CHIP_IS_OMAP3430 | CHIP_IS_OMAP3430ES3_1;
 385         } else if (cpu_is_omap343x()) {
 386                 omap_chip.oc = CHIP_IS_OMAP3430;
 387                 if (omap_rev_is_1_0())
 388                         omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 389                 else if (omap_rev_is_2_0() || omap_rev_is_2_1())
 390                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 391                 else if (omap_rev_is_3_0())
 392                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_0;
 393                 else if (omap_rev_is_3_1())
 394                         omap_chip.oc |= CHIP_IS_OMAP3430ES3_1;
 395         } else {
 396                 pr_err("Uninitialized omap_chip, please fix!\n");
 397         }
 398 }
 399
 400 /*
 401  * Set up things for map_io and processor detection later on. Gets called
 402  * pretty much first thing from board init. For multi-omap, this gets
 403  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 404  * detect the exact revision later on in omap2_detect_revision() once map_io
 405  * is done.
 406  */
 407 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 408 {
 409         omap_revision = omap2_globals->class;
 410         tap_base = omap2_globals->tap;
 411
 412         if (cpu_is_omap34xx())
 413                 tap_prod_id = 0x0210;
 414         else
 415                 tap_prod_id = 0x0208;
 416 }