arch/blackfin/mach-bf537/boards/minotaur.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *           2008-2009 Cambridge Signal Processing
   4  *                2005 National ICT Australia (NICTA)
   5  *                      Aidan Williams <aidan@nicta.com.au>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9
  10 #include <linux/device.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/mtd/mtd.h>
  13 #include <linux/mtd/partitions.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  17 #include <linux/usb/isp1362.h>
  18 #endif
  19 #include <linux/ata_platform.h>
  20 #include <linux/irq.h>
  21 #include <linux/interrupt.h>
  22 #include <linux/usb/sl811.h>
  23 #include <asm/dma.h>
  24 #include <asm/bfin5xx_spi.h>
  25 #include <asm/reboot.h>
  26 #include <linux/spi/ad7877.h>
  27
  28 /*
  29  * Name the Board for the /proc/cpuinfo
  30  */
  31 char *bfin_board_name = "CamSig Minotaur BF537";
  32
  33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  34 static struct resource bfin_pcmcia_cf_resources[] = {
  35         {
  36                 .start = 0x20310000, /* IO PORT */
  37                 .end = 0x20312000,
  38                 .flags = IORESOURCE_MEM,
  39         }, {
  40                 .start = 0x20311000, /* Attribute Memory */
  41                 .end = 0x20311FFF,
  42                 .flags = IORESOURCE_MEM,
  43         }, {
  44                 .start = IRQ_PF4,
  45                 .end = IRQ_PF4,
  46                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  47         }, {
  48                 .start = IRQ_PF6, /* Card Detect PF6 */
  49                 .end = IRQ_PF6,
  50                 .flags = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device bfin_pcmcia_cf_device = {
  55         .name = "bfin_cf_pcmcia",
  56         .id = -1,
  57         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  58         .resource = bfin_pcmcia_cf_resources,
  59 };
  60 #endif
  61
  62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  63 static struct platform_device rtc_device = {
  64         .name = "rtc-bfin",
  65         .id   = -1,
  66 };
  67 #endif
  68
  69 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  70 static struct platform_device bfin_mii_bus = {
  71         .name = "bfin_mii_bus",
  72 };
  73
  74 static struct platform_device bfin_mac_device = {
  75         .name = "bfin_mac",
  76         .dev.platform_data = &bfin_mii_bus,
  77 };
  78 #endif
  79
  80 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  81 static struct resource net2272_bfin_resources[] = {
  82         {
  83                 .start = 0x20300000,
  84                 .end = 0x20300000 + 0x100,
  85                 .flags = IORESOURCE_MEM,
  86         }, {
  87                 .start = IRQ_PF7,
  88                 .end = IRQ_PF7,
  89                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  90         },
  91 };
  92
  93 static struct platform_device net2272_bfin_device = {
  94         .name = "net2272",
  95         .id = -1,
  96         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  97         .resource = net2272_bfin_resources,
  98 };
  99 #endif
 100
 101 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 102 /* all SPI peripherals info goes here */
 103
 104 #if defined(CONFIG_MTD_M25P80) \
 105         || defined(CONFIG_MTD_M25P80_MODULE)
 106
 107 /* Partition sizes */
 108 #define FLASH_SIZE       0x00400000
 109 #define PSIZE_UBOOT      0x00030000
 110 #define PSIZE_INITRAMFS  0x00240000
 111
 112 static struct mtd_partition bfin_spi_flash_partitions[] = {
 113         {
 114                 .name       = "bootloader(spi)",
 115                 .size       = PSIZE_UBOOT,
 116                 .offset     = 0x000000,
 117                 .mask_flags = MTD_CAP_ROM
 118         }, {
 119                 .name       = "initramfs(spi)",
 120                 .size       = PSIZE_INITRAMFS,
 121                 .offset     = PSIZE_UBOOT
 122         }, {
 123                 .name       = "opt(spi)",
 124                 .size       = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
 125                 .offset     = PSIZE_UBOOT + PSIZE_INITRAMFS,
 126         }
 127 };
 128
 129 static struct flash_platform_data bfin_spi_flash_data = {
 130         .name = "m25p80",
 131         .parts = bfin_spi_flash_partitions,
 132         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 133         .type = "m25p64",
 134 };
 135
 136 /* SPI flash chip (m25p64) */
 137 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 138         .enable_dma = 0,         /* use dma transfer with this chip*/
 139         .bits_per_word = 8,
 140 };
 141 #endif
 142
 143 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 144 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 145         .enable_dma = 0,
 146         .bits_per_word = 8,
 147 };
 148 #endif
 149
 150 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 151 #if defined(CONFIG_MTD_M25P80) \
 152         || defined(CONFIG_MTD_M25P80_MODULE)
 153         {
 154                 /* the modalias must be the same as spi device driver name */
 155                 .modalias = "m25p80", /* Name of spi_driver for this device */
 156                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 157                 .bus_num = 0, /* Framework bus number */
 158                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 159                 .platform_data = &bfin_spi_flash_data,
 160                 .controller_data = &spi_flash_chip_info,
 161                 .mode = SPI_MODE_3,
 162         },
 163 #endif
 164
 165 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 166         {
 167                 .modalias = "mmc_spi",
 168                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 169                 .bus_num = 0,
 170                 .chip_select = 5,
 171                 .controller_data = &mmc_spi_chip_info,
 172                 .mode = SPI_MODE_3,
 173         },
 174 #endif
 175 };
 176
 177 /* SPI controller data */
 178 static struct bfin5xx_spi_master bfin_spi0_info = {
 179         .num_chipselect = 8,
 180         .enable_dma = 1,  /* master has the ability to do dma transfer */
 181 };
 182
 183 /* SPI (0) */
 184 static struct resource bfin_spi0_resource[] = {
 185         [0] = {
 186                 .start = SPI0_REGBASE,
 187                 .end   = SPI0_REGBASE + 0xFF,
 188                 .flags = IORESOURCE_MEM,
 189                 },
 190         [1] = {
 191                 .start = CH_SPI,
 192                 .end   = CH_SPI,
 193                 .flags = IORESOURCE_DMA,
 194         },
 195         [2] = {
 196                 .start = IRQ_SPI,
 197                 .end   = IRQ_SPI,
 198                 .flags = IORESOURCE_IRQ,
 199         },
 200 };
 201
 202 static struct platform_device bfin_spi0_device = {
 203         .name = "bfin-spi",
 204         .id = 0, /* Bus number */
 205         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 206         .resource = bfin_spi0_resource,
 207         .dev = {
 208                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 209         },
 210 };
 211 #endif  /* spi master and devices */
 212
 213 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 214 static struct resource bfin_uart_resources[] = {
 215         {
 216                 .start = 0xFFC00400,
 217                 .end = 0xFFC004FF,
 218                 .flags = IORESOURCE_MEM,
 219         }, {
 220                 .start = 0xFFC02000,
 221                 .end = 0xFFC020FF,
 222                 .flags = IORESOURCE_MEM,
 223         },
 224 };
 225
 226 static struct platform_device bfin_uart_device = {
 227         .name = "bfin-uart",
 228         .id = 1,
 229         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 230         .resource = bfin_uart_resources,
 231 };
 232 #endif
 233
 234 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 235 #ifdef CONFIG_BFIN_SIR0
 236 static struct resource bfin_sir0_resources[] = {
 237         {
 238                 .start = 0xFFC00400,
 239                 .end = 0xFFC004FF,
 240                 .flags = IORESOURCE_MEM,
 241         },
 242         {
 243                 .start = IRQ_UART0_RX,
 244                 .end = IRQ_UART0_RX+1,
 245                 .flags = IORESOURCE_IRQ,
 246         },
 247         {
 248                 .start = CH_UART0_RX,
 249                 .end = CH_UART0_RX+1,
 250                 .flags = IORESOURCE_DMA,
 251         },
 252 };
 253
 254 static struct platform_device bfin_sir0_device = {
 255         .name = "bfin_sir",
 256         .id = 0,
 257         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 258         .resource = bfin_sir0_resources,
 259 };
 260 #endif
 261 #ifdef CONFIG_BFIN_SIR1
 262 static struct resource bfin_sir1_resources[] = {
 263         {
 264                 .start = 0xFFC02000,
 265                 .end = 0xFFC020FF,
 266                 .flags = IORESOURCE_MEM,
 267         },
 268         {
 269                 .start = IRQ_UART1_RX,
 270                 .end = IRQ_UART1_RX+1,
 271                 .flags = IORESOURCE_IRQ,
 272         },
 273         {
 274                 .start = CH_UART1_RX,
 275                 .end = CH_UART1_RX+1,
 276                 .flags = IORESOURCE_DMA,
 277         },
 278 };
 279
 280 static struct platform_device bfin_sir1_device = {
 281         .name = "bfin_sir",
 282         .id = 1,
 283         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 284         .resource = bfin_sir1_resources,
 285 };
 286 #endif
 287 #endif
 288
 289 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 290 static struct resource bfin_twi0_resource[] = {
 291         [0] = {
 292                 .start = TWI0_REGBASE,
 293                 .end   = TWI0_REGBASE + 0xFF,
 294                 .flags = IORESOURCE_MEM,
 295         },
 296         [1] = {
 297                 .start = IRQ_TWI,
 298                 .end   = IRQ_TWI,
 299                 .flags = IORESOURCE_IRQ,
 300         },
 301 };
 302
 303 static struct platform_device i2c_bfin_twi_device = {
 304         .name = "i2c-bfin-twi",
 305         .id = 0,
 306         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 307         .resource = bfin_twi0_resource,
 308 };
 309 #endif
 310
 311 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 312 static struct platform_device bfin_sport0_uart_device = {
 313         .name = "bfin-sport-uart",
 314         .id = 0,
 315 };
 316
 317 static struct platform_device bfin_sport1_uart_device = {
 318         .name = "bfin-sport-uart",
 319         .id = 1,
 320 };
 321 #endif
 322
 323 static struct platform_device *minotaur_devices[] __initdata = {
 324 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 325         &bfin_pcmcia_cf_device,
 326 #endif
 327
 328 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 329         &rtc_device,
 330 #endif
 331
 332 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 333         &bfin_mii_bus,
 334         &bfin_mac_device,
 335 #endif
 336
 337 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 338         &net2272_bfin_device,
 339 #endif
 340
 341 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 342         &bfin_spi0_device,
 343 #endif
 344
 345 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 346         &bfin_uart_device,
 347 #endif
 348
 349 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 350 #ifdef CONFIG_BFIN_SIR0
 351         &bfin_sir0_device,
 352 #endif
 353 #ifdef CONFIG_BFIN_SIR1
 354         &bfin_sir1_device,
 355 #endif
 356 #endif
 357
 358 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 359         &i2c_bfin_twi_device,
 360 #endif
 361
 362 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 363         &bfin_sport0_uart_device,
 364         &bfin_sport1_uart_device,
 365 #endif
 366
 367 };
 368
 369 static int __init minotaur_init(void)
 370 {
 371         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 372         platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
 373 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 374         spi_register_board_info(bfin_spi_board_info,
 375                                 ARRAY_SIZE(bfin_spi_board_info));
 376 #endif
 377
 378         return 0;
 379 }
 380
 381 arch_initcall(minotaur_init);
 382
 383 void native_machine_restart(char *cmd)
 384 {
 385         /* workaround reboot hang when booting from SPI */
 386         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 387                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 388 }