arch/blackfin/mach-bf538/include/mach/bf538.h

   1 /*
   2  * SYSTEM MMR REGISTER AND MEMORY MAP FOR ADSP-BF538
   3  *
   4  * Copyright 2008 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #ifndef __MACH_BF538_H__
  10 #define __MACH_BF538_H__
  11
  12 #define OFFSET_(x) ((x) & 0x0000FFFF)
  13
  14 /*some misc defines*/
  15 #define IMASK_IVG15             0x8000
  16 #define IMASK_IVG14             0x4000
  17 #define IMASK_IVG13             0x2000
  18 #define IMASK_IVG12             0x1000
  19
  20 #define IMASK_IVG11             0x0800
  21 #define IMASK_IVG10             0x0400
  22 #define IMASK_IVG9              0x0200
  23 #define IMASK_IVG8              0x0100
  24
  25 #define IMASK_IVG7              0x0080
  26 #define IMASK_IVGTMR    0x0040
  27 #define IMASK_IVGHW             0x0020
  28
  29 /***************************/
  30
  31 #define BFIN_DSUBBANKS  4
  32 #define BFIN_DWAYS              2
  33 #define BFIN_DLINES             64
  34 #define BFIN_ISUBBANKS  4
  35 #define BFIN_IWAYS              4
  36 #define BFIN_ILINES             32
  37
  38 #define WAY0_L                  0x1
  39 #define WAY1_L                  0x2
  40 #define WAY01_L                 0x3
  41 #define WAY2_L                  0x4
  42 #define WAY02_L                 0x5
  43 #define WAY12_L                 0x6
  44 #define WAY012_L                0x7
  45
  46 #define WAY3_L                  0x8
  47 #define WAY03_L                 0x9
  48 #define WAY13_L                 0xA
  49 #define WAY013_L                0xB
  50
  51 #define WAY32_L                 0xC
  52 #define WAY320_L                0xD
  53 #define WAY321_L                0xE
  54 #define WAYALL_L                0xF
  55
  56 #define DMC_ENABLE (2<<2)       /*yes, 2, not 1 */
  57
  58 /********************************* EBIU Settings ************************************/
  59 #define AMBCTL0VAL      ((CONFIG_BANK_1 << 16) | CONFIG_BANK_0)
  60 #define AMBCTL1VAL      ((CONFIG_BANK_3 << 16) | CONFIG_BANK_2)
  61
  62 #ifdef CONFIG_C_AMBEN_ALL
  63 #define V_AMBEN AMBEN_ALL
  64 #endif
  65 #ifdef CONFIG_C_AMBEN
  66 #define V_AMBEN 0x0
  67 #endif
  68 #ifdef CONFIG_C_AMBEN_B0
  69 #define V_AMBEN AMBEN_B0
  70 #endif
  71 #ifdef CONFIG_C_AMBEN_B0_B1
  72 #define V_AMBEN AMBEN_B0_B1
  73 #endif
  74 #ifdef CONFIG_C_AMBEN_B0_B1_B2
  75 #define V_AMBEN AMBEN_B0_B1_B2
  76 #endif
  77 #ifdef CONFIG_C_AMCKEN
  78 #define V_AMCKEN AMCKEN
  79 #else
  80 #define V_AMCKEN 0x0
  81 #endif
  82 #ifdef CONFIG_C_CDPRIO
  83 #define V_CDPRIO 0x100
  84 #else
  85 #define V_CDPRIO 0x0
  86 #endif
  87
  88 #define AMGCTLVAL       (V_AMBEN | V_AMCKEN | V_CDPRIO)
  89
  90 #ifdef CONFIG_BF538
  91 #define CPU "BF538"
  92 #define CPUID 0x27C4
  93 #endif
  94 #ifdef CONFIG_BF539
  95 #define CPU "BF539"
  96 #define CPUID 0x27C4    /* FXIME:? */
  97 #endif
  98
  99 #ifndef CPU
 100 #error "Unknown CPU type - This kernel doesn't seem to be configured properly"
 101 #endif
 102
 103 #endif                          /* __MACH_BF538_H__  */