arch/blackfin/mach-bf538/include/mach/blackfin.h

   1 /*
   2  * Copyright 2008-2009 Analog Devices Inc.
   3  *
   4  * Licensed under the GPL-2 or later.
   5  */
   6
   7 #ifndef _MACH_BLACKFIN_H_
   8 #define _MACH_BLACKFIN_H_
   9
  10 #define BF538_FAMILY
  11
  12 #include "bf538.h"
  13 #include "defBF539.h"
  14 #include "anomaly.h"
  15
  16
  17 #if !defined(__ASSEMBLY__)
  18 #include "cdefBF538.h"
  19
  20 #if defined(CONFIG_BF539)
  21 #include "cdefBF539.h"
  22 #endif
  23 #endif
  24
  25 #define BFIN_UART_NR_PORTS      3
  26
  27 #define OFFSET_THR              0x00    /* Transmit Holding register            */
  28 #define OFFSET_RBR              0x00    /* Receive Buffer register              */
  29 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
  30 #define OFFSET_IER              0x04    /* Interrupt Enable Register            */
  31 #define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
  32 #define OFFSET_IIR              0x08    /* Interrupt Identification Register    */
  33 #define OFFSET_LCR              0x0C    /* Line Control Register                */
  34 #define OFFSET_MCR              0x10    /* Modem Control Register               */
  35 #define OFFSET_LSR              0x14    /* Line Status Register                 */
  36 #define OFFSET_MSR              0x18    /* Modem Status Register                */
  37 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
  38 #define OFFSET_GCTL             0x24    /* Global Control Register              */
  39
  40 /* PLL_DIV Masks                                                                                                        */
  41 #define CCLK_DIV1 CSEL_DIV1     /*          CCLK = VCO / 1                                  */
  42 #define CCLK_DIV2 CSEL_DIV2     /*          CCLK = VCO / 2                                  */
  43 #define CCLK_DIV4 CSEL_DIV4     /*          CCLK = VCO / 4                                  */
  44 #define CCLK_DIV8 CSEL_DIV8     /*          CCLK = VCO / 8                                  */
  45
  46 #endif