arch/mips/alchemy/common/gpiolib-au1000.c

   1 /*
   2  *  Copyright (C) 2007-2009, OpenWrt.org, Florian Fainelli <florian@openwrt.org>
   3  *      GPIOLIB support for Au1000, Au1500, Au1100, Au1550 and Au12x0.
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  11  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  13  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  14  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  16  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  18  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20  *
  21  *  You should have received a copy of the  GNU General Public License along
  22  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  23  *  675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  *  Notes :
  26  *      au1000 SoC have only one GPIO block : GPIO1
  27  *      Au1100, Au15x0, Au12x0 have a second one : GPIO2
  28  */
  29
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/types.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/gpio.h>
  35
  36 #include <asm/mach-au1x00/au1000.h>
  37 #include <asm/mach-au1x00/gpio.h>
  38
  39 #if !defined(CONFIG_SOC_AU1000)
  40 static int gpio2_get(struct gpio_chip *chip, unsigned offset)
  41 {
  42         return alchemy_gpio2_get_value(offset + ALCHEMY_GPIO2_BASE);
  43 }
  44
  45 static void gpio2_set(struct gpio_chip *chip, unsigned offset, int value)
  46 {
  47         alchemy_gpio2_set_value(offset + ALCHEMY_GPIO2_BASE, value);
  48 }
  49
  50 static int gpio2_direction_input(struct gpio_chip *chip, unsigned offset)
  51 {
  52         return alchemy_gpio2_direction_input(offset + ALCHEMY_GPIO2_BASE);
  53 }
  54
  55 static int gpio2_direction_output(struct gpio_chip *chip, unsigned offset,
  56                                   int value)
  57 {
  58         return alchemy_gpio2_direction_output(offset + ALCHEMY_GPIO2_BASE,
  59                                                 value);
  60 }
  61
  62 static int gpio2_to_irq(struct gpio_chip *chip, unsigned offset)
  63 {
  64         return alchemy_gpio2_to_irq(offset + ALCHEMY_GPIO2_BASE);
  65 }
  66 #endif /* !defined(CONFIG_SOC_AU1000) */
  67
  68 static int gpio1_get(struct gpio_chip *chip, unsigned offset)
  69 {
  70         return alchemy_gpio1_get_value(offset + ALCHEMY_GPIO1_BASE);
  71 }
  72
  73 static void gpio1_set(struct gpio_chip *chip,
  74                                 unsigned offset, int value)
  75 {
  76         alchemy_gpio1_set_value(offset + ALCHEMY_GPIO1_BASE, value);
  77 }
  78
  79 static int gpio1_direction_input(struct gpio_chip *chip, unsigned offset)
  80 {
  81         return alchemy_gpio1_direction_input(offset + ALCHEMY_GPIO1_BASE);
  82 }
  83
  84 static int gpio1_direction_output(struct gpio_chip *chip,
  85                                         unsigned offset, int value)
  86 {
  87         return alchemy_gpio1_direction_output(offset + ALCHEMY_GPIO1_BASE,
  88                                              value);
  89 }
  90
  91 static int gpio1_to_irq(struct gpio_chip *chip, unsigned offset)
  92 {
  93         return alchemy_gpio1_to_irq(offset + ALCHEMY_GPIO1_BASE);
  94 }
  95
  96 struct gpio_chip alchemy_gpio_chip[] = {
  97         [0] = {
  98                 .label                  = "alchemy-gpio1",
  99                 .direction_input        = gpio1_direction_input,
 100                 .direction_output       = gpio1_direction_output,
 101                 .get                    = gpio1_get,
 102                 .set                    = gpio1_set,
 103                 .to_irq                 = gpio1_to_irq,
 104                 .base                   = ALCHEMY_GPIO1_BASE,
 105                 .ngpio                  = ALCHEMY_GPIO1_NUM,
 106         },
 107 #if !defined(CONFIG_SOC_AU1000)
 108         [1] = {
 109                 .label                  = "alchemy-gpio2",
 110                 .direction_input        = gpio2_direction_input,
 111                 .direction_output       = gpio2_direction_output,
 112                 .get                    = gpio2_get,
 113                 .set                    = gpio2_set,
 114                 .to_irq                 = gpio2_to_irq,
 115                 .base                   = ALCHEMY_GPIO2_BASE,
 116                 .ngpio                  = ALCHEMY_GPIO2_NUM,
 117         },
 118 #endif
 119 };
 120
 121 static int __init alchemy_gpiolib_init(void)
 122 {
 123         gpiochip_add(&alchemy_gpio_chip[0]);
 124 #if !defined(CONFIG_SOC_AU1000)
 125         gpiochip_add(&alchemy_gpio_chip[1]);
 126 #endif
 127
 128         return 0;
 129 }
 130 arch_initcall(alchemy_gpiolib_init);