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[linux-ginger.git] / arch / powerpc / platforms / cell / interrupt.c
blob882e47080e74f493523399a0b1e7703c09b7b999
1 /*
2 * Cell Internal Interrupt Controller
4 * Copyright (C) 2006 Benjamin Herrenschmidt (benh@kernel.crashing.org)
5 * IBM, Corp.
7 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
9 * Author: Arnd Bergmann <arndb@de.ibm.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
14 * any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 * TODO:
26 * - Fix various assumptions related to HW CPU numbers vs. linux CPU numbers
27 * vs node numbers in the setup code
28 * - Implement proper handling of maxcpus=1/2 (that is, routing of irqs from
29 * a non-active node to the active node)
32 #include <linux/interrupt.h>
33 #include <linux/irq.h>
34 #include <linux/module.h>
35 #include <linux/percpu.h>
36 #include <linux/types.h>
37 #include <linux/ioport.h>
38 #include <linux/kernel_stat.h>
40 #include <asm/io.h>
41 #include <asm/pgtable.h>
42 #include <asm/prom.h>
43 #include <asm/ptrace.h>
44 #include <asm/machdep.h>
45 #include <asm/cell-regs.h>
47 #include "interrupt.h"
49 struct iic {
50 struct cbe_iic_thread_regs __iomem *regs;
51 u8 target_id;
52 u8 eoi_stack[16];
53 int eoi_ptr;
54 struct device_node *node;
57 static DEFINE_PER_CPU(struct iic, iic);
58 #define IIC_NODE_COUNT 2
59 static struct irq_host *iic_host;
61 /* Convert between "pending" bits and hw irq number */
62 static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)
64 unsigned char unit = bits.source & 0xf;
65 unsigned char node = bits.source >> 4;
66 unsigned char class = bits.class & 3;
68 /* Decode IPIs */
69 if (bits.flags & CBE_IIC_IRQ_IPI)
70 return IIC_IRQ_TYPE_IPI | (bits.prio >> 4);
71 else
72 return (node << IIC_IRQ_NODE_SHIFT) | (class << 4) | unit;
75 static void iic_mask(unsigned int irq)
79 static void iic_unmask(unsigned int irq)
83 static void iic_eoi(unsigned int irq)
85 struct iic *iic = &__get_cpu_var(iic);
86 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
87 BUG_ON(iic->eoi_ptr < 0);
90 static struct irq_chip iic_chip = {
91 .typename = " CELL-IIC ",
92 .mask = iic_mask,
93 .unmask = iic_unmask,
94 .eoi = iic_eoi,
98 static void iic_ioexc_eoi(unsigned int irq)
102 static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
104 struct cbe_iic_regs __iomem *node_iic = (void __iomem *)desc->handler_data;
105 unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
106 unsigned long bits, ack;
107 int cascade;
109 for (;;) {
110 bits = in_be64(&node_iic->iic_is);
111 if (bits == 0)
112 break;
113 /* pre-ack edge interrupts */
114 ack = bits & IIC_ISR_EDGE_MASK;
115 if (ack)
116 out_be64(&node_iic->iic_is, ack);
117 /* handle them */
118 for (cascade = 63; cascade >= 0; cascade--)
119 if (bits & (0x8000000000000000UL >> cascade)) {
120 unsigned int cirq =
121 irq_linear_revmap(iic_host,
122 base | cascade);
123 if (cirq != NO_IRQ)
124 generic_handle_irq(cirq);
126 /* post-ack level interrupts */
127 ack = bits & ~IIC_ISR_EDGE_MASK;
128 if (ack)
129 out_be64(&node_iic->iic_is, ack);
131 desc->chip->eoi(irq);
135 static struct irq_chip iic_ioexc_chip = {
136 .typename = " CELL-IOEX",
137 .mask = iic_mask,
138 .unmask = iic_unmask,
139 .eoi = iic_ioexc_eoi,
142 /* Get an IRQ number from the pending state register of the IIC */
143 static unsigned int iic_get_irq(void)
145 struct cbe_iic_pending_bits pending;
146 struct iic *iic;
147 unsigned int virq;
149 iic = &__get_cpu_var(iic);
150 *(unsigned long *) &pending =
151 in_be64((u64 __iomem *) &iic->regs->pending_destr);
152 if (!(pending.flags & CBE_IIC_IRQ_VALID))
153 return NO_IRQ;
154 virq = irq_linear_revmap(iic_host, iic_pending_to_hwnum(pending));
155 if (virq == NO_IRQ)
156 return NO_IRQ;
157 iic->eoi_stack[++iic->eoi_ptr] = pending.prio;
158 BUG_ON(iic->eoi_ptr > 15);
159 return virq;
162 void iic_setup_cpu(void)
164 out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
167 u8 iic_get_target_id(int cpu)
169 return per_cpu(iic, cpu).target_id;
172 EXPORT_SYMBOL_GPL(iic_get_target_id);
174 #ifdef CONFIG_SMP
176 /* Use the highest interrupt priorities for IPI */
177 static inline int iic_ipi_to_irq(int ipi)
179 return IIC_IRQ_TYPE_IPI + 0xf - ipi;
182 void iic_cause_IPI(int cpu, int mesg)
184 out_be64(&per_cpu(iic, cpu).regs->generate, (0xf - mesg) << 4);
187 struct irq_host *iic_get_irq_host(int node)
189 return iic_host;
191 EXPORT_SYMBOL_GPL(iic_get_irq_host);
193 static irqreturn_t iic_ipi_action(int irq, void *dev_id)
195 int ipi = (int)(long)dev_id;
197 smp_message_recv(ipi);
199 return IRQ_HANDLED;
201 static void iic_request_ipi(int ipi, const char *name)
203 int virq;
205 virq = irq_create_mapping(iic_host, iic_ipi_to_irq(ipi));
206 if (virq == NO_IRQ) {
207 printk(KERN_ERR
208 "iic: failed to map IPI %s\n", name);
209 return;
211 if (request_irq(virq, iic_ipi_action, IRQF_DISABLED, name,
212 (void *)(long)ipi))
213 printk(KERN_ERR
214 "iic: failed to request IPI %s\n", name);
217 void iic_request_IPIs(void)
219 iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
220 iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
221 iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE, "IPI-call-single");
222 #ifdef CONFIG_DEBUGGER
223 iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
224 #endif /* CONFIG_DEBUGGER */
227 #endif /* CONFIG_SMP */
230 static int iic_host_match(struct irq_host *h, struct device_node *node)
232 return of_device_is_compatible(node,
233 "IBM,CBEA-Internal-Interrupt-Controller");
236 extern int noirqdebug;
238 static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
240 spin_lock(&desc->lock);
242 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
245 * If we're currently running this IRQ, or its disabled,
246 * we shouldn't process the IRQ. Mark it pending, handle
247 * the necessary masking and go out
249 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
250 !desc->action)) {
251 desc->status |= IRQ_PENDING;
252 goto out_eoi;
255 kstat_incr_irqs_this_cpu(irq, desc);
257 /* Mark the IRQ currently in progress.*/
258 desc->status |= IRQ_INPROGRESS;
260 do {
261 struct irqaction *action = desc->action;
262 irqreturn_t action_ret;
264 if (unlikely(!action))
265 goto out_eoi;
267 desc->status &= ~IRQ_PENDING;
268 spin_unlock(&desc->lock);
269 action_ret = handle_IRQ_event(irq, action);
270 if (!noirqdebug)
271 note_interrupt(irq, desc, action_ret);
272 spin_lock(&desc->lock);
274 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
276 desc->status &= ~IRQ_INPROGRESS;
277 out_eoi:
278 desc->chip->eoi(irq);
279 spin_unlock(&desc->lock);
282 static int iic_host_map(struct irq_host *h, unsigned int virq,
283 irq_hw_number_t hw)
285 switch (hw & IIC_IRQ_TYPE_MASK) {
286 case IIC_IRQ_TYPE_IPI:
287 set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
288 break;
289 case IIC_IRQ_TYPE_IOEXC:
290 set_irq_chip_and_handler(virq, &iic_ioexc_chip,
291 handle_iic_irq);
292 break;
293 default:
294 set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
296 return 0;
299 static int iic_host_xlate(struct irq_host *h, struct device_node *ct,
300 u32 *intspec, unsigned int intsize,
301 irq_hw_number_t *out_hwirq, unsigned int *out_flags)
304 unsigned int node, ext, unit, class;
305 const u32 *val;
307 if (!of_device_is_compatible(ct,
308 "IBM,CBEA-Internal-Interrupt-Controller"))
309 return -ENODEV;
310 if (intsize != 1)
311 return -ENODEV;
312 val = of_get_property(ct, "#interrupt-cells", NULL);
313 if (val == NULL || *val != 1)
314 return -ENODEV;
316 node = intspec[0] >> 24;
317 ext = (intspec[0] >> 16) & 0xff;
318 class = (intspec[0] >> 8) & 0xff;
319 unit = intspec[0] & 0xff;
321 /* Check if node is in supported range */
322 if (node > 1)
323 return -EINVAL;
325 /* Build up interrupt number, special case for IO exceptions */
326 *out_hwirq = (node << IIC_IRQ_NODE_SHIFT);
327 if (unit == IIC_UNIT_IIC && class == 1)
328 *out_hwirq |= IIC_IRQ_TYPE_IOEXC | ext;
329 else
330 *out_hwirq |= IIC_IRQ_TYPE_NORMAL |
331 (class << IIC_IRQ_CLASS_SHIFT) | unit;
333 /* Dummy flags, ignored by iic code */
334 *out_flags = IRQ_TYPE_EDGE_RISING;
336 return 0;
339 static struct irq_host_ops iic_host_ops = {
340 .match = iic_host_match,
341 .map = iic_host_map,
342 .xlate = iic_host_xlate,
345 static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr,
346 struct device_node *node)
348 /* XXX FIXME: should locate the linux CPU number from the HW cpu
349 * number properly. We are lucky for now
351 struct iic *iic = &per_cpu(iic, hw_cpu);
353 iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs));
354 BUG_ON(iic->regs == NULL);
356 iic->target_id = ((hw_cpu & 2) << 3) | ((hw_cpu & 1) ? 0xf : 0xe);
357 iic->eoi_stack[0] = 0xff;
358 iic->node = of_node_get(node);
359 out_be64(&iic->regs->prio, 0);
361 printk(KERN_INFO "IIC for CPU %d target id 0x%x : %s\n",
362 hw_cpu, iic->target_id, node->full_name);
365 static int __init setup_iic(void)
367 struct device_node *dn;
368 struct resource r0, r1;
369 unsigned int node, cascade, found = 0;
370 struct cbe_iic_regs __iomem *node_iic;
371 const u32 *np;
373 for (dn = NULL;
374 (dn = of_find_node_by_name(dn,"interrupt-controller")) != NULL;) {
375 if (!of_device_is_compatible(dn,
376 "IBM,CBEA-Internal-Interrupt-Controller"))
377 continue;
378 np = of_get_property(dn, "ibm,interrupt-server-ranges", NULL);
379 if (np == NULL) {
380 printk(KERN_WARNING "IIC: CPU association not found\n");
381 of_node_put(dn);
382 return -ENODEV;
384 if (of_address_to_resource(dn, 0, &r0) ||
385 of_address_to_resource(dn, 1, &r1)) {
386 printk(KERN_WARNING "IIC: Can't resolve addresses\n");
387 of_node_put(dn);
388 return -ENODEV;
390 found++;
391 init_one_iic(np[0], r0.start, dn);
392 init_one_iic(np[1], r1.start, dn);
394 /* Setup cascade for IO exceptions. XXX cleanup tricks to get
395 * node vs CPU etc...
396 * Note that we configure the IIC_IRR here with a hard coded
397 * priority of 1. We might want to improve that later.
399 node = np[0] >> 1;
400 node_iic = cbe_get_cpu_iic_regs(np[0]);
401 cascade = node << IIC_IRQ_NODE_SHIFT;
402 cascade |= 1 << IIC_IRQ_CLASS_SHIFT;
403 cascade |= IIC_UNIT_IIC;
404 cascade = irq_create_mapping(iic_host, cascade);
405 if (cascade == NO_IRQ)
406 continue;
408 * irq_data is a generic pointer that gets passed back
409 * to us later, so the forced cast is fine.
411 set_irq_data(cascade, (void __force *)node_iic);
412 set_irq_chained_handler(cascade , iic_ioexc_cascade);
413 out_be64(&node_iic->iic_ir,
414 (1 << 12) /* priority */ |
415 (node << 4) /* dest node */ |
416 IIC_UNIT_THREAD_0 /* route them to thread 0 */);
417 /* Flush pending (make sure it triggers if there is
418 * anything pending
420 out_be64(&node_iic->iic_is, 0xfffffffffffffffful);
423 if (found)
424 return 0;
425 else
426 return -ENODEV;
429 void __init iic_init_IRQ(void)
431 /* Setup an irq host data structure */
432 iic_host = irq_alloc_host(NULL, IRQ_HOST_MAP_LINEAR, IIC_SOURCE_COUNT,
433 &iic_host_ops, IIC_IRQ_INVALID);
434 BUG_ON(iic_host == NULL);
435 irq_set_default_host(iic_host);
437 /* Discover and initialize iics */
438 if (setup_iic() < 0)
439 panic("IIC: Failed to initialize !\n");
441 /* Set master interrupt handling function */
442 ppc_md.get_irq = iic_get_irq;
444 /* Enable on current CPU */
445 iic_setup_cpu();
448 void iic_set_interrupt_routing(int cpu, int thread, int priority)
450 struct cbe_iic_regs __iomem *iic_regs = cbe_get_cpu_iic_regs(cpu);
451 u64 iic_ir = 0;
452 int node = cpu >> 1;
454 /* Set which node and thread will handle the next interrupt */
455 iic_ir |= CBE_IIC_IR_PRIO(priority) |
456 CBE_IIC_IR_DEST_NODE(node);
457 if (thread == 0)
458 iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_0);
459 else
460 iic_ir |= CBE_IIC_IR_DEST_UNIT(CBE_IIC_IR_PT_1);
461 out_be64(&iic_regs->iic_ir, iic_ir);