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First Support on Ginger and OMAP TI
[linux-ginger.git] / drivers / staging / slicoss / slicoss.c
blobe67a130f9e46eab61d3e1d571e1dca7b7a798eb2
1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define KLUDGE_FOR_4GB_BOUNDARY 1
59 #define DEBUG_MICROCODE 1
60 #define DBG 1
61 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
62 #define SLIC_OFFLOAD_IP_CHECKSUM 1
63 #define STATS_TIMER_INTERVAL 2
64 #define PING_TIMER_INTERVAL 1
65
66 #include <linux/kernel.h>
67 #include <linux/string.h>
68 #include <linux/errno.h>
69 #include <linux/ioport.h>
70 #include <linux/slab.h>
71 #include <linux/interrupt.h>
72 #include <linux/timer.h>
73 #include <linux/pci.h>
74 #include <linux/spinlock.h>
75 #include <linux/init.h>
76 #include <linux/bitops.h>
77 #include <linux/io.h>
78 #include <linux/netdevice.h>
79 #include <linux/etherdevice.h>
80 #include <linux/skbuff.h>
81 #include <linux/delay.h>
82 #include <linux/debugfs.h>
83 #include <linux/seq_file.h>
84 #include <linux/kthread.h>
85 #include <linux/module.h>
86 #include <linux/moduleparam.h>
87
88 #include <linux/firmware.h>
89 #include <linux/types.h>
90 #include <linux/dma-mapping.h>
91 #include <linux/mii.h>
92 #include <linux/if_vlan.h>
93 #include <asm/unaligned.h>
94
95 #include <linux/ethtool.h>
96 #include <linux/uaccess.h>
97 #include "slichw.h"
98 #include "slic.h"
99
100 static struct net_device_stats *slic_get_stats(struct net_device *dev);
101 static int slic_entry_open(struct net_device *dev);
102 static int slic_entry_halt(struct net_device *dev);
103 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
104 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev);
105 static void slic_xmit_fail(struct adapter *adapter, struct sk_buff *skb,
106 void *cmd, u32 skbtype, u32 status);
107 static void slic_config_pci(struct pci_dev *pcidev);
108 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter);
109 static int slic_mac_set_address(struct net_device *dev, void *ptr);
110 static void slic_link_event_handler(struct adapter *adapter);
111 static void slic_upr_request_complete(struct adapter *adapter, u32 isr);
112 static int slic_rspqueue_init(struct adapter *adapter);
113 static void slic_rspqueue_free(struct adapter *adapter);
114 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter);
115 static int slic_cmdq_init(struct adapter *adapter);
116 static void slic_cmdq_free(struct adapter *adapter);
117 static void slic_cmdq_reset(struct adapter *adapter);
118 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page);
119 static void slic_cmdq_getdone(struct adapter *adapter);
120 static void slic_cmdq_putdone_irq(struct adapter *adapter,
121 struct slic_hostcmd *cmd);
122 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter);
123 static int slic_rcvqueue_init(struct adapter *adapter);
124 static int slic_rcvqueue_fill(struct adapter *adapter);
125 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb);
126 static void slic_rcvqueue_free(struct adapter *adapter);
127 static void slic_adapter_set_hwaddr(struct adapter *adapter);
128 static int slic_card_init(struct sliccard *card, struct adapter *adapter);
129 static void slic_intagg_set(struct adapter *adapter, u32 value);
130 static int slic_card_download(struct adapter *adapter);
131 static u32 slic_card_locate(struct adapter *adapter);
132 static int slic_if_init(struct adapter *adapter);
133 static int slic_adapter_allocresources(struct adapter *adapter);
134 static void slic_adapter_freeresources(struct adapter *adapter);
135 static void slic_link_config(struct adapter *adapter, u32 linkspeed,
136 u32 linkduplex);
137 static void slic_unmap_mmio_space(struct adapter *adapter);
138 static void slic_card_cleanup(struct sliccard *card);
139 static void slic_soft_reset(struct adapter *adapter);
140 static bool slic_mac_filter(struct adapter *adapter,
141 struct ether_header *ether_frame);
142 static void slic_mac_address_config(struct adapter *adapter);
143 static void slic_mac_config(struct adapter *adapter);
144 static void slic_mcast_set_mask(struct adapter *adapter);
145 static void slic_config_set(struct adapter *adapter, bool linkchange);
146 static void slic_config_clear(struct adapter *adapter);
147 static void slic_config_get(struct adapter *adapter, u32 config,
148 u32 configh);
149 static void slic_timer_load_check(ulong context);
150 static void slic_assert_fail(void);
151 static ushort slic_eeprom_cksum(char *m, int len);
152 static void slic_upr_start(struct adapter *adapter);
153 static void slic_link_upr_complete(struct adapter *adapter, u32 Isr);
154 static int slic_upr_request(struct adapter *adapter, u32 upr_request,
155 u32 upr_data, u32 upr_data_h, u32 upr_buffer,
156 u32 upr_buffer_h);
157 static void slic_mcast_set_list(struct net_device *dev);
158
159
160 static uint slic_first_init = 1;
161 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
162 "and Storage Accelerator (Non-Accelerated)";
163
164 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
165 static char *slic_product_name = "SLIC Technology(tm) Server "\
166 "and Storage Accelerator (Non-Accelerated)";
167 static char *slic_vendor = "Alacritech, Inc.";
168
169 static int slic_debug = 1;
170 static int debug = -1;
171 static struct net_device *head_netdevice;
172
173 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
174 static int intagg_delay = 100;
175 static u32 dynamic_intagg;
176 static unsigned int rcv_count;
177 static struct dentry *slic_debugfs;
178
179 #define DRV_NAME "slicoss"
180 #define DRV_VERSION "2.0.1"
181 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
182 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
183 "Non-Accelerated Driver"
184 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
185 "All rights reserved."
186 #define PFX DRV_NAME " "
187
188 MODULE_AUTHOR(DRV_AUTHOR);
189 MODULE_DESCRIPTION(DRV_DESCRIPTION);
190 MODULE_LICENSE("Dual BSD/GPL");
191
192 module_param(dynamic_intagg, int, 0);
193 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
194 module_param(intagg_delay, int, 0);
195 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
196
197 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
198 {PCI_VENDOR_ID_ALACRITECH,
199 SLIC_1GB_DEVICE_ID,
200 PCI_ANY_ID, PCI_ANY_ID,},
201 {PCI_VENDOR_ID_ALACRITECH,
202 SLIC_2GB_DEVICE_ID,
203 PCI_ANY_ID, PCI_ANY_ID,},
204 {0,}
205 };
206
207 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
208
209 #ifdef ASSERT
210 #undef ASSERT
211 #endif
212
213 #ifndef ASSERT
214 #define ASSERT(a) do { \
215 if (!(a)) { \
216 printk(KERN_ERR "slicoss ASSERT() Failure: function %s" \
217 "line %d\n", __func__, __LINE__); \
218 slic_assert_fail(); \
219 } \
220 } while (0)
221 #endif
222
223
224 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
225 { \
226 spin_lock_irqsave(&_adapter->handle_lock.lock, \
227 _adapter->handle_lock.flags); \
228 _pslic_handle = _adapter->pfree_slic_handles; \
229 if (_pslic_handle) { \
230 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
231 _adapter->pfree_slic_handles = _pslic_handle->next; \
232 } \
233 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
234 _adapter->handle_lock.flags); \
235 }
236
237 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
238 { \
239 _pslic_handle->type = SLIC_HANDLE_FREE; \
240 spin_lock_irqsave(&_adapter->handle_lock.lock, \
241 _adapter->handle_lock.flags); \
242 _pslic_handle->next = _adapter->pfree_slic_handles; \
243 _adapter->pfree_slic_handles = _pslic_handle; \
244 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
245 _adapter->handle_lock.flags); \
246 }
247
248 static void slic_debug_init(void);
249 static void slic_debug_cleanup(void);
250 static void slic_debug_adapter_create(struct adapter *adapter);
251 static void slic_debug_adapter_destroy(struct adapter *adapter);
252 static void slic_debug_card_create(struct sliccard *card);
253 static void slic_debug_card_destroy(struct sliccard *card);
254
255 static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
256 {
257 writel(value, reg);
258 if (flush)
259 mb();
260 }
261
262 static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
263 u32 value, void __iomem *regh, u32 paddrh,
264 bool flush)
265 {
266 spin_lock_irqsave(&adapter->bit64reglock.lock,
267 adapter->bit64reglock.flags);
268 if (paddrh != adapter->curaddrupper) {
269 adapter->curaddrupper = paddrh;
270 writel(paddrh, regh);
271 }
272 writel(value, reg);
273 if (flush)
274 mb();
275 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
276 adapter->bit64reglock.flags);
277 }
278
279 static void slic_init_driver(void)
280 {
281 if (slic_first_init) {
282 slic_first_init = 0;
283 spin_lock_init(&slic_global.driver_lock.lock);
284 slic_debug_init();
285 }
286 }
287
288 static void slic_init_adapter(struct net_device *netdev,
289 struct pci_dev *pcidev,
290 const struct pci_device_id *pci_tbl_entry,
291 void __iomem *memaddr, int chip_idx)
292 {
293 ushort index;
294 struct slic_handle *pslic_handle;
295 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
296
297 /* adapter->pcidev = pcidev;*/
298 adapter->vendid = pci_tbl_entry->vendor;
299 adapter->devid = pci_tbl_entry->device;
300 adapter->subsysid = pci_tbl_entry->subdevice;
301 adapter->busnumber = pcidev->bus->number;
302 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
303 adapter->functionnumber = (pcidev->devfn & 0x7);
304 adapter->memorylength = pci_resource_len(pcidev, 0);
305 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
306 adapter->irq = pcidev->irq;
307 /* adapter->netdev = netdev;*/
308 adapter->next_netdevice = head_netdevice;
309 head_netdevice = netdev;
310 adapter->chipid = chip_idx;
311 adapter->port = 0; /*adapter->functionnumber;*/
312 adapter->cardindex = adapter->port;
313 adapter->memorybase = memaddr;
314 spin_lock_init(&adapter->upr_lock.lock);
315 spin_lock_init(&adapter->bit64reglock.lock);
316 spin_lock_init(&adapter->adapter_lock.lock);
317 spin_lock_init(&adapter->reset_lock.lock);
318 spin_lock_init(&adapter->handle_lock.lock);
319
320 adapter->card_size = 1;
321 /*
322 Initialize slic_handle array
323 */
324 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
325 /*
326 Start with 1. 0 is an invalid host handle.
327 */
328 for (index = 1, pslic_handle = &adapter->slic_handles[1];
329 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
330
331 pslic_handle->token.handle_index = index;
332 pslic_handle->type = SLIC_HANDLE_FREE;
333 pslic_handle->next = adapter->pfree_slic_handles;
334 adapter->pfree_slic_handles = pslic_handle;
335 }
336 adapter->pshmem = (struct slic_shmem *)
337 pci_alloc_consistent(adapter->pcidev,
338 sizeof(struct slic_shmem),
339 &adapter->
340 phys_shmem);
341 ASSERT(adapter->pshmem);
342
343 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
344
345 return;
346 }
347
348 static const struct net_device_ops slic_netdev_ops = {
349 .ndo_open = slic_entry_open,
350 .ndo_stop = slic_entry_halt,
351 .ndo_start_xmit = slic_xmit_start,
352 .ndo_do_ioctl = slic_ioctl,
353 .ndo_set_mac_address = slic_mac_set_address,
354 .ndo_get_stats = slic_get_stats,
355 .ndo_set_multicast_list = slic_mcast_set_list,
356 .ndo_validate_addr = eth_validate_addr,
357 .ndo_set_mac_address = eth_mac_addr,
358 .ndo_change_mtu = eth_change_mtu,
359 };
360
361 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
362 const struct pci_device_id *pci_tbl_entry)
363 {
364 static int cards_found;
365 static int did_version;
366 int err = -ENODEV;
367 struct net_device *netdev;
368 struct adapter *adapter;
369 void __iomem *memmapped_ioaddr = NULL;
370 u32 status = 0;
371 ulong mmio_start = 0;
372 ulong mmio_len = 0;
373 struct sliccard *card = NULL;
374
375 slic_global.dynamic_intagg = dynamic_intagg;
376
377 err = pci_enable_device(pcidev);
378
379 if (err)
380 return err;
381
382 if (slic_debug > 0 && did_version++ == 0) {
383 printk(KERN_DEBUG "%s\n", slic_banner);
384 printk(KERN_DEBUG "%s\n", slic_proc_version);
385 }
386
387 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
388 if (err) {
389 err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
390 if (err)
391 goto err_out_disable_pci;
392 }
393
394 err = pci_request_regions(pcidev, DRV_NAME);
395 if (err)
396 goto err_out_disable_pci;
397
398 pci_set_master(pcidev);
399
400 netdev = alloc_etherdev(sizeof(struct adapter));
401 if (!netdev) {
402 err = -ENOMEM;
403 goto err_out_exit_slic_probe;
404 }
405
406 SET_NETDEV_DEV(netdev, &pcidev->dev);
407
408 pci_set_drvdata(pcidev, netdev);
409 adapter = netdev_priv(netdev);
410 adapter->netdev = netdev;
411 adapter->pcidev = pcidev;
412
413 mmio_start = pci_resource_start(pcidev, 0);
414 mmio_len = pci_resource_len(pcidev, 0);
415
416
417 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
418 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
419 if (!memmapped_ioaddr) {
420 dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n",
421 mmio_len, mmio_start);
422 goto err_out_free_netdev;
423 }
424
425 slic_config_pci(pcidev);
426
427 slic_init_driver();
428
429 slic_init_adapter(netdev,
430 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
431
432 status = slic_card_locate(adapter);
433 if (status) {
434 dev_err(&pcidev->dev, "cannot locate card\n");
435 goto err_out_free_mmio_region;
436 }
437
438 card = adapter->card;
439
440 if (!adapter->allocated) {
441 card->adapters_allocated++;
442 adapter->allocated = 1;
443 }
444
445 status = slic_card_init(card, adapter);
446
447 if (status != STATUS_SUCCESS) {
448 card->state = CARD_FAIL;
449 adapter->state = ADAPT_FAIL;
450 adapter->linkstate = LINK_DOWN;
451 dev_err(&pcidev->dev, "FAILED status[%x]\n", status);
452 } else {
453 slic_adapter_set_hwaddr(adapter);
454 }
455
456 netdev->base_addr = (unsigned long)adapter->memorybase;
457 netdev->irq = adapter->irq;
458 netdev->netdev_ops = &slic_netdev_ops;
459
460 slic_debug_adapter_create(adapter);
461
462 strcpy(netdev->name, "eth%d");
463 err = register_netdev(netdev);
464 if (err) {
465 dev_err(&pcidev->dev, "Cannot register net device, aborting.\n");
466 goto err_out_unmap;
467 }
468
469 cards_found++;
470
471 return status;
472
473 err_out_unmap:
474 iounmap(memmapped_ioaddr);
475 err_out_free_mmio_region:
476 release_mem_region(mmio_start, mmio_len);
477 err_out_free_netdev:
478 free_netdev(netdev);
479 err_out_exit_slic_probe:
480 pci_release_regions(pcidev);
481 err_out_disable_pci:
482 pci_disable_device(pcidev);
483 return err;
484 }
485
486 static int slic_entry_open(struct net_device *dev)
487 {
488 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
489 struct sliccard *card = adapter->card;
490 u32 locked = 0;
491 int status;
492
493 ASSERT(adapter);
494 ASSERT(card);
495
496 netif_stop_queue(adapter->netdev);
497
498 spin_lock_irqsave(&slic_global.driver_lock.lock,
499 slic_global.driver_lock.flags);
500 locked = 1;
501 if (!adapter->activated) {
502 card->adapters_activated++;
503 slic_global.num_slic_ports_active++;
504 adapter->activated = 1;
505 }
506 status = slic_if_init(adapter);
507
508 if (status != STATUS_SUCCESS) {
509 if (adapter->activated) {
510 card->adapters_activated--;
511 slic_global.num_slic_ports_active--;
512 adapter->activated = 0;
513 }
514 if (locked) {
515 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
516 slic_global.driver_lock.flags);
517 locked = 0;
518 }
519 return status;
520 }
521 if (!card->master)
522 card->master = adapter;
523
524 if (locked) {
525 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
526 slic_global.driver_lock.flags);
527 locked = 0;
528 }
529
530 return STATUS_SUCCESS;
531 }
532
533 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
534 {
535 struct net_device *dev = pci_get_drvdata(pcidev);
536 u32 mmio_start = 0;
537 uint mmio_len = 0;
538 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
539 struct sliccard *card;
540 struct mcast_address *mcaddr, *mlist;
541
542 ASSERT(adapter);
543 slic_adapter_freeresources(adapter);
544 slic_unmap_mmio_space(adapter);
545 unregister_netdev(dev);
546
547 mmio_start = pci_resource_start(pcidev, 0);
548 mmio_len = pci_resource_len(pcidev, 0);
549
550 release_mem_region(mmio_start, mmio_len);
551
552 iounmap((void __iomem *)dev->base_addr);
553 /* free multicast addresses */
554 mlist = adapter->mcastaddrs;
555 while (mlist) {
556 mcaddr = mlist;
557 mlist = mlist->next;
558 kfree(mcaddr);
559 }
560 ASSERT(adapter->card);
561 card = adapter->card;
562 ASSERT(card->adapters_allocated);
563 card->adapters_allocated--;
564 adapter->allocated = 0;
565 if (!card->adapters_allocated) {
566 struct sliccard *curr_card = slic_global.slic_card;
567 if (curr_card == card) {
568 slic_global.slic_card = card->next;
569 } else {
570 while (curr_card->next != card)
571 curr_card = curr_card->next;
572 ASSERT(curr_card);
573 curr_card->next = card->next;
574 }
575 ASSERT(slic_global.num_slic_cards);
576 slic_global.num_slic_cards--;
577 slic_card_cleanup(card);
578 }
579 kfree(dev);
580 pci_release_regions(pcidev);
581 }
582
583 static int slic_entry_halt(struct net_device *dev)
584 {
585 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
586 struct sliccard *card = adapter->card;
587 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
588
589 spin_lock_irqsave(&slic_global.driver_lock.lock,
590 slic_global.driver_lock.flags);
591 ASSERT(card);
592 netif_stop_queue(adapter->netdev);
593 adapter->state = ADAPT_DOWN;
594 adapter->linkstate = LINK_DOWN;
595 adapter->upr_list = NULL;
596 adapter->upr_busy = 0;
597 adapter->devflags_prev = 0;
598 ASSERT(card->adapter[adapter->cardindex] == adapter);
599 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
600 adapter->all_reg_writes++;
601 adapter->icr_reg_writes++;
602 slic_config_clear(adapter);
603 if (adapter->activated) {
604 card->adapters_activated--;
605 slic_global.num_slic_ports_active--;
606 adapter->activated = 0;
607 }
608 #ifdef AUTOMATIC_RESET
609 slic_reg32_write(&slic_regs->slic_reset_iface, 0, FLUSH);
610 #endif
611 /*
612 * Reset the adapter's cmd queues
613 */
614 slic_cmdq_reset(adapter);
615
616 #ifdef AUTOMATIC_RESET
617 if (!card->adapters_activated)
618 slic_card_init(card, adapter);
619 #endif
620
621 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
622 slic_global.driver_lock.flags);
623 return STATUS_SUCCESS;
624 }
625
626 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
627 {
628 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
629 struct ethtool_cmd edata;
630 struct ethtool_cmd ecmd;
631 u32 data[7];
632 u32 intagg;
633
634 ASSERT(rq);
635 switch (cmd) {
636 case SIOCSLICSETINTAGG:
637 if (copy_from_user(data, rq->ifr_data, 28))
638 return -EFAULT;
639 intagg = data[0];
640 dev_err(&dev->dev, "%s: set interrupt aggregation to %d\n",
641 __func__, intagg);
642 slic_intagg_set(adapter, intagg);
643 return 0;
644
645 #ifdef SLIC_TRACE_DUMP_ENABLED
646 case SIOCSLICTRACEDUMP:
647 {
648 u32 value;
649 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
650
651 if (copy_from_user(data, rq->ifr_data, 28)) {
652 PRINT_ERROR
653 ("slic: copy_from_user FAILED getting \
654 initial simba param\n");
655 return -EFAULT;
656 }
657
658 value = data[0];
659 if (tracemon_request == SLIC_DUMP_DONE) {
660 PRINT_ERROR
661 ("ATK Diagnostic Trace Dump Requested\n");
662 tracemon_request = SLIC_DUMP_REQUESTED;
663 tracemon_request_type = value;
664 tracemon_timestamp = jiffies;
665 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
666 (tracemon_request ==
667 SLIC_DUMP_IN_PROGRESS)) {
668 PRINT_ERROR
669 ("ATK Diagnostic Trace Dump Requested but \
670 already in progress... ignore\n");
671 } else {
672 PRINT_ERROR
673 ("ATK Diagnostic Trace Dump Requested\n");
674 tracemon_request = SLIC_DUMP_REQUESTED;
675 tracemon_request_type = value;
676 tracemon_timestamp = jiffies;
677 }
678 return 0;
679 }
680 #endif
681 case SIOCETHTOOL:
682 ASSERT(adapter);
683 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
684 return -EFAULT;
685
686 if (ecmd.cmd == ETHTOOL_GSET) {
687 edata.supported = (SUPPORTED_10baseT_Half |
688 SUPPORTED_10baseT_Full |
689 SUPPORTED_100baseT_Half |
690 SUPPORTED_100baseT_Full |
691 SUPPORTED_Autoneg | SUPPORTED_MII);
692 edata.port = PORT_MII;
693 edata.transceiver = XCVR_INTERNAL;
694 edata.phy_address = 0;
695 if (adapter->linkspeed == LINK_100MB)
696 edata.speed = SPEED_100;
697 else if (adapter->linkspeed == LINK_10MB)
698 edata.speed = SPEED_10;
699 else
700 edata.speed = 0;
701
702 if (adapter->linkduplex == LINK_FULLD)
703 edata.duplex = DUPLEX_FULL;
704 else
705 edata.duplex = DUPLEX_HALF;
706
707 edata.autoneg = AUTONEG_ENABLE;
708 edata.maxtxpkt = 1;
709 edata.maxrxpkt = 1;
710 if (copy_to_user(rq->ifr_data, &edata, sizeof(edata)))
711 return -EFAULT;
712
713 } else if (ecmd.cmd == ETHTOOL_SSET) {
714 if (!capable(CAP_NET_ADMIN))
715 return -EPERM;
716
717 if (adapter->linkspeed == LINK_100MB)
718 edata.speed = SPEED_100;
719 else if (adapter->linkspeed == LINK_10MB)
720 edata.speed = SPEED_10;
721 else
722 edata.speed = 0;
723
724 if (adapter->linkduplex == LINK_FULLD)
725 edata.duplex = DUPLEX_FULL;
726 else
727 edata.duplex = DUPLEX_HALF;
728
729 edata.autoneg = AUTONEG_ENABLE;
730 edata.maxtxpkt = 1;
731 edata.maxrxpkt = 1;
732 if ((ecmd.speed != edata.speed) ||
733 (ecmd.duplex != edata.duplex)) {
734 u32 speed;
735 u32 duplex;
736
737 if (ecmd.speed == SPEED_10)
738 speed = 0;
739 else
740 speed = PCR_SPEED_100;
741 if (ecmd.duplex == DUPLEX_FULL)
742 duplex = PCR_DUPLEX_FULL;
743 else
744 duplex = 0;
745 slic_link_config(adapter, speed, duplex);
746 slic_link_event_handler(adapter);
747 }
748 }
749 return 0;
750 default:
751 return -EOPNOTSUPP;
752 }
753 }
754
755 #define XMIT_FAIL_LINK_STATE 1
756 #define XMIT_FAIL_ZERO_LENGTH 2
757 #define XMIT_FAIL_HOSTCMD_FAIL 3
758
759 static void slic_xmit_build_request(struct adapter *adapter,
760 struct slic_hostcmd *hcmd, struct sk_buff *skb)
761 {
762 struct slic_host64_cmd *ihcmd;
763 ulong phys_addr;
764
765 ihcmd = &hcmd->cmd64;
766
767 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
768 ihcmd->command = IHCMD_XMT_REQ;
769 ihcmd->u.slic_buffers.totlen = skb->len;
770 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
771 PCI_DMA_TODEVICE);
772 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
773 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
774 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
775 #if defined(CONFIG_X86_64)
776 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
777 (u64) hcmd) + 31) >> 5);
778 #elif defined(CONFIG_X86)
779 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
780 (u32) hcmd) + 31) >> 5);
781 #else
782 Stop Compilation;
783 #endif
784 }
785
786 #define NORMAL_ETHFRAME 0
787
788 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
789 {
790 struct sliccard *card;
791 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
792 struct slic_hostcmd *hcmd = NULL;
793 u32 status = 0;
794 u32 skbtype = NORMAL_ETHFRAME;
795 void *offloadcmd = NULL;
796
797 card = adapter->card;
798 ASSERT(card);
799 if ((adapter->linkstate != LINK_UP) ||
800 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
801 status = XMIT_FAIL_LINK_STATE;
802 goto xmit_fail;
803
804 } else if (skb->len == 0) {
805 status = XMIT_FAIL_ZERO_LENGTH;
806 goto xmit_fail;
807 }
808
809 if (skbtype == NORMAL_ETHFRAME) {
810 hcmd = slic_cmdq_getfree(adapter);
811 if (!hcmd) {
812 adapter->xmitq_full = 1;
813 status = XMIT_FAIL_HOSTCMD_FAIL;
814 goto xmit_fail;
815 }
816 ASSERT(hcmd->pslic_handle);
817 ASSERT(hcmd->cmd64.hosthandle ==
818 hcmd->pslic_handle->token.handle_token);
819 hcmd->skb = skb;
820 hcmd->busy = 1;
821 hcmd->type = SLIC_CMD_DUMB;
822 if (skbtype == NORMAL_ETHFRAME)
823 slic_xmit_build_request(adapter, hcmd, skb);
824 }
825 adapter->stats.tx_packets++;
826 adapter->stats.tx_bytes += skb->len;
827
828 #ifdef DEBUG_DUMP
829 if (adapter->kill_card) {
830 struct slic_host64_cmd ihcmd;
831
832 ihcmd = &hcmd->cmd64;
833
834 ihcmd->flags |= 0x40;
835 adapter->kill_card = 0; /* only do this once */
836 }
837 #endif
838 if (hcmd->paddrh == 0) {
839 slic_reg32_write(&adapter->slic_regs->slic_cbar,
840 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
841 } else {
842 slic_reg64_write(adapter, &adapter->slic_regs->slic_cbar64,
843 (hcmd->paddrl | hcmd->cmdsize),
844 &adapter->slic_regs->slic_addr_upper,
845 hcmd->paddrh, DONT_FLUSH);
846 }
847 xmit_done:
848 return NETDEV_TX_OK;
849 xmit_fail:
850 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
851 goto xmit_done;
852 }
853
854 static void slic_xmit_fail(struct adapter *adapter,
855 struct sk_buff *skb,
856 void *cmd, u32 skbtype, u32 status)
857 {
858 if (adapter->xmitq_full)
859 netif_stop_queue(adapter->netdev);
860 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
861 switch (status) {
862 case XMIT_FAIL_LINK_STATE:
863 dev_err(&adapter->netdev->dev,
864 "reject xmit skb[%p: %x] linkstate[%s] "
865 "adapter[%s:%d] card[%s:%d]\n",
866 skb, skb->pkt_type,
867 SLIC_LINKSTATE(adapter->linkstate),
868 SLIC_ADAPTER_STATE(adapter->state),
869 adapter->state,
870 SLIC_CARD_STATE(adapter->card->state),
871 adapter->card->state);
872 break;
873 case XMIT_FAIL_ZERO_LENGTH:
874 dev_err(&adapter->netdev->dev,
875 "xmit_start skb->len == 0 skb[%p] type[%x]\n",
876 skb, skb->pkt_type);
877 break;
878 case XMIT_FAIL_HOSTCMD_FAIL:
879 dev_err(&adapter->netdev->dev,
880 "xmit_start skb[%p] type[%x] No host commands "
881 "available\n", skb, skb->pkt_type);
882 break;
883 default:
884 ASSERT(0);
885 }
886 }
887 dev_kfree_skb(skb);
888 adapter->stats.tx_dropped++;
889 }
890
891 static void slic_rcv_handle_error(struct adapter *adapter,
892 struct slic_rcvbuf *rcvbuf)
893 {
894 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
895
896 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
897 if (hdr->frame_status14 & VRHSTAT_802OE)
898 adapter->if_events.oflow802++;
899 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
900 adapter->if_events.Tprtoflow++;
901 if (hdr->frame_status_b14 & VRHSTATB_802UE)
902 adapter->if_events.uflow802++;
903 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
904 adapter->if_events.rcvearly++;
905 adapter->stats.rx_fifo_errors++;
906 }
907 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
908 adapter->if_events.Bufov++;
909 adapter->stats.rx_over_errors++;
910 }
911 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
912 adapter->if_events.Carre++;
913 adapter->stats.tx_carrier_errors++;
914 }
915 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
916 adapter->if_events.Longe++;
917 if (hdr->frame_status_b14 & VRHSTATB_PREA)
918 adapter->if_events.Invp++;
919 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
920 adapter->if_events.Crc++;
921 adapter->stats.rx_crc_errors++;
922 }
923 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
924 adapter->if_events.Drbl++;
925 if (hdr->frame_status_b14 & VRHSTATB_CODE)
926 adapter->if_events.Code++;
927 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
928 adapter->if_events.TpCsum++;
929 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
930 adapter->if_events.TpHlen++;
931 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
932 adapter->if_events.IpCsum++;
933 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
934 adapter->if_events.IpLen++;
935 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
936 adapter->if_events.IpHlen++;
937 } else {
938 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
939 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
940
941 if (xerr == VGBSTAT_XCSERR)
942 adapter->if_events.TpCsum++;
943 if (xerr == VGBSTAT_XUFLOW)
944 adapter->if_events.Tprtoflow++;
945 if (xerr == VGBSTAT_XHLEN)
946 adapter->if_events.TpHlen++;
947 }
948 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
949 u32 nerr =
950 (hdr->
951 frame_statusGB >> VGBSTAT_NERRSHFT) &
952 VGBSTAT_NERRMSK;
953 if (nerr == VGBSTAT_NCSERR)
954 adapter->if_events.IpCsum++;
955 if (nerr == VGBSTAT_NUFLOW)
956 adapter->if_events.IpLen++;
957 if (nerr == VGBSTAT_NHLEN)
958 adapter->if_events.IpHlen++;
959 }
960 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
961 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
962
963 if (lerr == VGBSTAT_LDEARLY)
964 adapter->if_events.rcvearly++;
965 if (lerr == VGBSTAT_LBOFLO)
966 adapter->if_events.Bufov++;
967 if (lerr == VGBSTAT_LCODERR)
968 adapter->if_events.Code++;
969 if (lerr == VGBSTAT_LDBLNBL)
970 adapter->if_events.Drbl++;
971 if (lerr == VGBSTAT_LCRCERR)
972 adapter->if_events.Crc++;
973 if (lerr == VGBSTAT_LOFLO)
974 adapter->if_events.oflow802++;
975 if (lerr == VGBSTAT_LUFLO)
976 adapter->if_events.uflow802++;
977 }
978 }
979 return;
980 }
981
982 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
983 #define M_FAST_PATH 0x0040
984
985 static void slic_rcv_handler(struct adapter *adapter)
986 {
987 struct sk_buff *skb;
988 struct slic_rcvbuf *rcvbuf;
989 u32 frames = 0;
990
991 while ((skb = slic_rcvqueue_getnext(adapter))) {
992 u32 rx_bytes;
993
994 ASSERT(skb->head);
995 rcvbuf = (struct slic_rcvbuf *)skb->head;
996 adapter->card->events++;
997 if (rcvbuf->status & IRHDDR_ERR) {
998 adapter->rx_errors++;
999 slic_rcv_handle_error(adapter, rcvbuf);
1000 slic_rcvqueue_reinsert(adapter, skb);
1001 continue;
1002 }
1003
1004 if (!slic_mac_filter(adapter, (struct ether_header *)
1005 rcvbuf->data)) {
1006 slic_rcvqueue_reinsert(adapter, skb);
1007 continue;
1008 }
1009 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1010 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1011 skb_put(skb, rx_bytes);
1012 adapter->stats.rx_packets++;
1013 adapter->stats.rx_bytes += rx_bytes;
1014 #if SLIC_OFFLOAD_IP_CHECKSUM
1015 skb->ip_summed = CHECKSUM_UNNECESSARY;
1016 #endif
1017
1018 skb->dev = adapter->netdev;
1019 skb->protocol = eth_type_trans(skb, skb->dev);
1020 netif_rx(skb);
1021
1022 ++frames;
1023 #if SLIC_INTERRUPT_PROCESS_LIMIT
1024 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1025 adapter->rcv_interrupt_yields++;
1026 break;
1027 }
1028 #endif
1029 }
1030 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1031 }
1032
1033 static void slic_xmit_complete(struct adapter *adapter)
1034 {
1035 struct slic_hostcmd *hcmd;
1036 struct slic_rspbuf *rspbuf;
1037 u32 frames = 0;
1038 struct slic_handle_word slic_handle_word;
1039
1040 do {
1041 rspbuf = slic_rspqueue_getnext(adapter);
1042 if (!rspbuf)
1043 break;
1044 adapter->xmit_completes++;
1045 adapter->card->events++;
1046 /*
1047 Get the complete host command buffer
1048 */
1049 slic_handle_word.handle_token = rspbuf->hosthandle;
1050 ASSERT(slic_handle_word.handle_index);
1051 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1052 hcmd =
1053 (struct slic_hostcmd *)
1054 adapter->slic_handles[slic_handle_word.handle_index].
1055 address;
1056 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1057 ASSERT(hcmd);
1058 ASSERT(hcmd->pslic_handle ==
1059 &adapter->slic_handles[slic_handle_word.handle_index]);
1060 if (hcmd->type == SLIC_CMD_DUMB) {
1061 if (hcmd->skb)
1062 dev_kfree_skb_irq(hcmd->skb);
1063 slic_cmdq_putdone_irq(adapter, hcmd);
1064 }
1065 rspbuf->status = 0;
1066 rspbuf->hosthandle = 0;
1067 frames++;
1068 } while (1);
1069 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1070 }
1071
1072 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1073 {
1074 struct net_device *dev = (struct net_device *)dev_id;
1075 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1076 u32 isr;
1077
1078 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1079 slic_reg32_write(&adapter->slic_regs->slic_icr,
1080 ICR_INT_MASK, FLUSH);
1081 isr = adapter->isrcopy = adapter->pshmem->isr;
1082 adapter->pshmem->isr = 0;
1083 adapter->num_isrs++;
1084 switch (adapter->card->state) {
1085 case CARD_UP:
1086 if (isr & ~ISR_IO) {
1087 if (isr & ISR_ERR) {
1088 adapter->error_interrupts++;
1089 if (isr & ISR_RMISS) {
1090 int count;
1091 int pre_count;
1092 int errors;
1093
1094 struct slic_rcvqueue *rcvq =
1095 &adapter->rcvqueue;
1096
1097 adapter->
1098 error_rmiss_interrupts++;
1099 if (!rcvq->errors)
1100 rcv_count = rcvq->count;
1101 pre_count = rcvq->count;
1102 errors = rcvq->errors;
1103
1104 while (rcvq->count <
1105 SLIC_RCVQ_FILLTHRESH) {
1106 count =
1107 slic_rcvqueue_fill
1108 (adapter);
1109 if (!count)
1110 break;
1111 }
1112 } else if (isr & ISR_XDROP) {
1113 dev_err(&dev->dev,
1114 "isr & ISR_ERR [%x] "
1115 "ISR_XDROP \n", isr);
1116 } else {
1117 dev_err(&dev->dev,
1118 "isr & ISR_ERR [%x]\n",
1119 isr);
1120 }
1121 }
1122
1123 if (isr & ISR_LEVENT) {
1124 adapter->linkevent_interrupts++;
1125 slic_link_event_handler(adapter);
1126 }
1127
1128 if ((isr & ISR_UPC) ||
1129 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1130 adapter->upr_interrupts++;
1131 slic_upr_request_complete(adapter, isr);
1132 }
1133 }
1134
1135 if (isr & ISR_RCV) {
1136 adapter->rcv_interrupts++;
1137 slic_rcv_handler(adapter);
1138 }
1139
1140 if (isr & ISR_CMD) {
1141 adapter->xmit_interrupts++;
1142 slic_xmit_complete(adapter);
1143 }
1144 break;
1145
1146 case CARD_DOWN:
1147 if ((isr & ISR_UPC) ||
1148 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1149 adapter->upr_interrupts++;
1150 slic_upr_request_complete(adapter, isr);
1151 }
1152 break;
1153
1154 default:
1155 break;
1156 }
1157
1158 adapter->isrcopy = 0;
1159 adapter->all_reg_writes += 2;
1160 adapter->isr_reg_writes++;
1161 slic_reg32_write(&adapter->slic_regs->slic_isr, 0, FLUSH);
1162 } else {
1163 adapter->false_interrupts++;
1164 }
1165 return IRQ_HANDLED;
1166 }
1167
1168 /*
1169 * slic_link_event_handler -
1170 *
1171 * Initiate a link configuration sequence. The link configuration begins
1172 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1173 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1174 * routine will follow it up witha UP configuration write command, which
1175 * will also complete asynchronously.
1176 *
1177 */
1178 static void slic_link_event_handler(struct adapter *adapter)
1179 {
1180 int status;
1181 struct slic_shmem *pshmem;
1182
1183 if (adapter->state != ADAPT_UP) {
1184 /* Adapter is not operational. Ignore. */
1185 return;
1186 }
1187
1188 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1189
1190 #if defined(CONFIG_X86_64)
1191 status = slic_upr_request(adapter,
1192 SLIC_UPR_RLSR,
1193 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1194 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1195 0, 0);
1196 #elif defined(CONFIG_X86)
1197 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1198 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1199 0, 0, 0);
1200 #else
1201 Stop compilation;
1202 #endif
1203 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1204 }
1205
1206 static void slic_init_cleanup(struct adapter *adapter)
1207 {
1208 if (adapter->intrregistered) {
1209 adapter->intrregistered = 0;
1210 free_irq(adapter->netdev->irq, adapter->netdev);
1211
1212 }
1213 if (adapter->pshmem) {
1214 pci_free_consistent(adapter->pcidev,
1215 sizeof(struct slic_shmem),
1216 adapter->pshmem, adapter->phys_shmem);
1217 adapter->pshmem = NULL;
1218 adapter->phys_shmem = (dma_addr_t) NULL;
1219 }
1220
1221 if (adapter->pingtimerset) {
1222 adapter->pingtimerset = 0;
1223 del_timer(&adapter->pingtimer);
1224 }
1225
1226 slic_rspqueue_free(adapter);
1227 slic_cmdq_free(adapter);
1228 slic_rcvqueue_free(adapter);
1229 }
1230
1231 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1232 {
1233 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1234 struct net_device_stats *stats;
1235
1236 ASSERT(adapter);
1237 stats = &adapter->stats;
1238 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1239 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1240 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1241 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1242 stats->tx_heartbeat_errors = 0;
1243 stats->tx_aborted_errors = 0;
1244 stats->tx_window_errors = 0;
1245 stats->tx_fifo_errors = 0;
1246 stats->rx_frame_errors = 0;
1247 stats->rx_length_errors = 0;
1248 return &adapter->stats;
1249 }
1250
1251 /*
1252 * Allocate a mcast_address structure to hold the multicast address.
1253 * Link it in.
1254 */
1255 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1256 {
1257 struct mcast_address *mcaddr, *mlist;
1258 bool equaladdr;
1259
1260 /* Check to see if it already exists */
1261 mlist = adapter->mcastaddrs;
1262 while (mlist) {
1263 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1264 if (equaladdr)
1265 return STATUS_SUCCESS;
1266 mlist = mlist->next;
1267 }
1268
1269 /* Doesn't already exist. Allocate a structure to hold it */
1270 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1271 if (mcaddr == NULL)
1272 return 1;
1273
1274 memcpy(mcaddr->address, address, 6);
1275
1276 mcaddr->next = adapter->mcastaddrs;
1277 adapter->mcastaddrs = mcaddr;
1278
1279 return STATUS_SUCCESS;
1280 }
1281
1282 /*
1283 * Functions to obtain the CRC corresponding to the destination mac address.
1284 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1285 * the polynomial:
1286 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1287 * x^4 + x^2 + x^1.
1288 *
1289 * After the CRC for the 6 bytes is generated (but before the value is
1290 * complemented),
1291 * we must then transpose the value and return bits 30-23.
1292 *
1293 */
1294 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1295 static u32 slic_crc_init; /* Is table initialized */
1296
1297 /*
1298 * Contruct the CRC32 table
1299 */
1300 static void slic_mcast_init_crc32(void)
1301 {
1302 u32 c; /* CRC shit reg */
1303 u32 e = 0; /* Poly X-or pattern */
1304 int i; /* counter */
1305 int k; /* byte being shifted into crc */
1306
1307 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1308
1309 for (i = 0; i < ARRAY_SIZE(p); i++)
1310 e |= 1L << (31 - p[i]);
1311
1312 for (i = 1; i < 256; i++) {
1313 c = i;
1314 for (k = 8; k; k--)
1315 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1316 slic_crc_table[i] = c;
1317 }
1318 }
1319
1320 /*
1321 * Return the MAC hast as described above.
1322 */
1323 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1324 {
1325 u32 crc;
1326 char *p;
1327 int i;
1328 unsigned char machash = 0;
1329
1330 if (!slic_crc_init) {
1331 slic_mcast_init_crc32();
1332 slic_crc_init = 1;
1333 }
1334
1335 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1336 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1337 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1338
1339 /* Return bits 1-8, transposed */
1340 for (i = 1; i < 9; i++)
1341 machash |= (((crc >> i) & 1) << (8 - i));
1342
1343 return machash;
1344 }
1345
1346 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1347 {
1348 unsigned char crcpoly;
1349
1350 /* Get the CRC polynomial for the mac address */
1351 crcpoly = slic_mcast_get_mac_hash(address);
1352
1353 /* We only have space on the SLIC for 64 entries. Lop
1354 * off the top two bits. (2^6 = 64)
1355 */
1356 crcpoly &= 0x3F;
1357
1358 /* OR in the new bit into our 64 bit mask. */
1359 adapter->mcastmask |= (u64) 1 << crcpoly;
1360 }
1361
1362 static void slic_mcast_set_list(struct net_device *dev)
1363 {
1364 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1365 int status = STATUS_SUCCESS;
1366 int i;
1367 char *addresses;
1368 struct dev_mc_list *mc_list = dev->mc_list;
1369 int mc_count = dev->mc_count;
1370
1371 ASSERT(adapter);
1372
1373 for (i = 1; i <= mc_count; i++) {
1374 addresses = (char *) &mc_list->dmi_addr;
1375 if (mc_list->dmi_addrlen == 6) {
1376 status = slic_mcast_add_list(adapter, addresses);
1377 if (status != STATUS_SUCCESS)
1378 break;
1379 } else {
1380 status = -EINVAL;
1381 break;
1382 }
1383 slic_mcast_set_bit(adapter, addresses);
1384 mc_list = mc_list->next;
1385 }
1386
1387 if (adapter->devflags_prev != dev->flags) {
1388 adapter->macopts = MAC_DIRECTED;
1389 if (dev->flags) {
1390 if (dev->flags & IFF_BROADCAST)
1391 adapter->macopts |= MAC_BCAST;
1392 if (dev->flags & IFF_PROMISC)
1393 adapter->macopts |= MAC_PROMISC;
1394 if (dev->flags & IFF_ALLMULTI)
1395 adapter->macopts |= MAC_ALLMCAST;
1396 if (dev->flags & IFF_MULTICAST)
1397 adapter->macopts |= MAC_MCAST;
1398 }
1399 adapter->devflags_prev = dev->flags;
1400 slic_config_set(adapter, true);
1401 } else {
1402 if (status == STATUS_SUCCESS)
1403 slic_mcast_set_mask(adapter);
1404 }
1405 return;
1406 }
1407
1408 static void slic_mcast_set_mask(struct adapter *adapter)
1409 {
1410 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1411
1412 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1413 /* Turn on all multicast addresses. We have to do this for
1414 * promiscuous mode as well as ALLMCAST mode. It saves the
1415 * Microcode from having to keep state about the MAC
1416 * configuration.
1417 */
1418 slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1419 slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
1420 FLUSH);
1421 } else {
1422 /* Commit our multicast mast to the SLIC by writing to the
1423 * multicast address mask registers
1424 */
1425 slic_reg32_write(&slic_regs->slic_mcastlow,
1426 (u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1427 slic_reg32_write(&slic_regs->slic_mcasthigh,
1428 (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
1429 }
1430 }
1431
1432 static void slic_timer_ping(ulong dev)
1433 {
1434 struct adapter *adapter;
1435 struct sliccard *card;
1436
1437 ASSERT(dev);
1438 adapter = netdev_priv((struct net_device *)dev);
1439 ASSERT(adapter);
1440 card = adapter->card;
1441 ASSERT(card);
1442
1443 adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
1444 add_timer(&adapter->pingtimer);
1445 }
1446
1447 /*
1448 * slic_if_init
1449 *
1450 * Perform initialization of our slic interface.
1451 *
1452 */
1453 static int slic_if_init(struct adapter *adapter)
1454 {
1455 struct sliccard *card = adapter->card;
1456 struct net_device *dev = adapter->netdev;
1457 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1458 struct slic_shmem *pshmem;
1459 int status = 0;
1460
1461 ASSERT(card);
1462
1463 /* adapter should be down at this point */
1464 if (adapter->state != ADAPT_DOWN) {
1465 dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n",
1466 __func__);
1467 return -EIO;
1468 }
1469 ASSERT(adapter->linkstate == LINK_DOWN);
1470
1471 adapter->devflags_prev = dev->flags;
1472 adapter->macopts = MAC_DIRECTED;
1473 if (dev->flags) {
1474 if (dev->flags & IFF_BROADCAST)
1475 adapter->macopts |= MAC_BCAST;
1476 if (dev->flags & IFF_PROMISC)
1477 adapter->macopts |= MAC_PROMISC;
1478 if (dev->flags & IFF_ALLMULTI)
1479 adapter->macopts |= MAC_ALLMCAST;
1480 if (dev->flags & IFF_MULTICAST)
1481 adapter->macopts |= MAC_MCAST;
1482 }
1483 status = slic_adapter_allocresources(adapter);
1484 if (status != STATUS_SUCCESS) {
1485 dev_err(&dev->dev,
1486 "%s: slic_adapter_allocresources FAILED %x\n",
1487 __func__, status);
1488 slic_adapter_freeresources(adapter);
1489 return status;
1490 }
1491
1492 if (!adapter->queues_initialized) {
1493 if (slic_rspqueue_init(adapter))
1494 return -ENOMEM;
1495 if (slic_cmdq_init(adapter))
1496 return -ENOMEM;
1497 if (slic_rcvqueue_init(adapter))
1498 return -ENOMEM;
1499 adapter->queues_initialized = 1;
1500 }
1501
1502 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1503 mdelay(1);
1504
1505 if (!adapter->isp_initialized) {
1506 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1507
1508 spin_lock_irqsave(&adapter->bit64reglock.lock,
1509 adapter->bit64reglock.flags);
1510
1511 #if defined(CONFIG_X86_64)
1512 slic_reg32_write(&slic_regs->slic_addr_upper,
1513 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1514 slic_reg32_write(&slic_regs->slic_isp,
1515 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1516 #elif defined(CONFIG_X86)
1517 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1518 slic_reg32_write(&slic_regs->slic_isp, (u32)&pshmem->isr, FLUSH);
1519 #else
1520 Stop Compilations
1521 #endif
1522 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1523 adapter->bit64reglock.flags);
1524 adapter->isp_initialized = 1;
1525 }
1526
1527 adapter->state = ADAPT_UP;
1528 if (!card->loadtimerset) {
1529 init_timer(&card->loadtimer);
1530 card->loadtimer.expires =
1531 jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
1532 card->loadtimer.data = (ulong) card;
1533 card->loadtimer.function = &slic_timer_load_check;
1534 add_timer(&card->loadtimer);
1535
1536 card->loadtimerset = 1;
1537 }
1538
1539 if (!adapter->pingtimerset) {
1540 init_timer(&adapter->pingtimer);
1541 adapter->pingtimer.expires =
1542 jiffies + (PING_TIMER_INTERVAL * HZ);
1543 adapter->pingtimer.data = (ulong) dev;
1544 adapter->pingtimer.function = &slic_timer_ping;
1545 add_timer(&adapter->pingtimer);
1546 adapter->pingtimerset = 1;
1547 adapter->card->pingstatus = ISR_PINGMASK;
1548 }
1549
1550 /*
1551 * clear any pending events, then enable interrupts
1552 */
1553 adapter->isrcopy = 0;
1554 adapter->pshmem->isr = 0;
1555 slic_reg32_write(&slic_regs->slic_isr, 0, FLUSH);
1556 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1557
1558 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1559 slic_link_event_handler(adapter);
1560
1561 return STATUS_SUCCESS;
1562 }
1563
1564 static void slic_unmap_mmio_space(struct adapter *adapter)
1565 {
1566 if (adapter->slic_regs)
1567 iounmap(adapter->slic_regs);
1568 adapter->slic_regs = NULL;
1569 }
1570
1571 static int slic_adapter_allocresources(struct adapter *adapter)
1572 {
1573 if (!adapter->intrregistered) {
1574 int retval;
1575
1576 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1577 slic_global.driver_lock.flags);
1578
1579 retval = request_irq(adapter->netdev->irq,
1580 &slic_interrupt,
1581 IRQF_SHARED,
1582 adapter->netdev->name, adapter->netdev);
1583
1584 spin_lock_irqsave(&slic_global.driver_lock.lock,
1585 slic_global.driver_lock.flags);
1586
1587 if (retval) {
1588 dev_err(&adapter->netdev->dev,
1589 "request_irq (%s) FAILED [%x]\n",
1590 adapter->netdev->name, retval);
1591 return retval;
1592 }
1593 adapter->intrregistered = 1;
1594 }
1595 return STATUS_SUCCESS;
1596 }
1597
1598 static void slic_config_pci(struct pci_dev *pcidev)
1599 {
1600 u16 pci_command;
1601 u16 new_command;
1602
1603 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1604
1605 new_command = pci_command | PCI_COMMAND_MASTER
1606 | PCI_COMMAND_MEMORY
1607 | PCI_COMMAND_INVALIDATE
1608 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1609 if (pci_command != new_command)
1610 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1611 }
1612
1613 static void slic_adapter_freeresources(struct adapter *adapter)
1614 {
1615 slic_init_cleanup(adapter);
1616 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1617 adapter->error_interrupts = 0;
1618 adapter->rcv_interrupts = 0;
1619 adapter->xmit_interrupts = 0;
1620 adapter->linkevent_interrupts = 0;
1621 adapter->upr_interrupts = 0;
1622 adapter->num_isrs = 0;
1623 adapter->xmit_completes = 0;
1624 adapter->rcv_broadcasts = 0;
1625 adapter->rcv_multicasts = 0;
1626 adapter->rcv_unicasts = 0;
1627 }
1628
1629 /*
1630 * slic_link_config
1631 *
1632 * Write phy control to configure link duplex/speed
1633 *
1634 */
1635 static void slic_link_config(struct adapter *adapter,
1636 u32 linkspeed, u32 linkduplex)
1637 {
1638 u32 __iomem *wphy;
1639 u32 speed;
1640 u32 duplex;
1641 u32 phy_config;
1642 u32 phy_advreg;
1643 u32 phy_gctlreg;
1644
1645 if (adapter->state != ADAPT_UP)
1646 return;
1647
1648 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1649 || (adapter->devid == SLIC_2GB_DEVICE_ID));
1650
1651 if (linkspeed > LINK_1000MB)
1652 linkspeed = LINK_AUTOSPEED;
1653 if (linkduplex > LINK_AUTOD)
1654 linkduplex = LINK_AUTOD;
1655
1656 wphy = &adapter->slic_regs->slic_wphy;
1657
1658 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
1659 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
1660 /* We've got a fiber gigabit interface, and register
1661 * 4 is different in fiber mode than in copper mode
1662 */
1663
1664 /* advertise FD only @1000 Mb */
1665 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
1666 /* enable PAUSE frames */
1667 phy_advreg |= PAR_ASYMPAUSE_FIBER;
1668 slic_reg32_write(wphy, phy_advreg, FLUSH);
1669
1670 if (linkspeed == LINK_AUTOSPEED) {
1671 /* reset phy, enable auto-neg */
1672 phy_config =
1673 (MIICR_REG_PCR |
1674 (PCR_RESET | PCR_AUTONEG |
1675 PCR_AUTONEG_RST));
1676 slic_reg32_write(wphy, phy_config, FLUSH);
1677 } else { /* forced 1000 Mb FD*/
1678 /* power down phy to break link
1679 this may not work) */
1680 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
1681 slic_reg32_write(wphy, phy_config, FLUSH);
1682 /* wait, Marvell says 1 sec,
1683 try to get away with 10 ms */
1684 mdelay(10);
1685
1686 /* disable auto-neg, set speed/duplex,
1687 soft reset phy, powerup */
1688 phy_config =
1689 (MIICR_REG_PCR |
1690 (PCR_RESET | PCR_SPEED_1000 |
1691 PCR_DUPLEX_FULL));
1692 slic_reg32_write(wphy, phy_config, FLUSH);
1693 }
1694 } else { /* copper gigabit */
1695
1696 /* Auto-Negotiate or 1000 Mb must be auto negotiated
1697 * We've got a copper gigabit interface, and
1698 * register 4 is different in copper mode than
1699 * in fiber mode
1700 */
1701 if (linkspeed == LINK_AUTOSPEED) {
1702 /* advertise 10/100 Mb modes */
1703 phy_advreg =
1704 (MIICR_REG_4 |
1705 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
1706 | PAR_ADV10HD));
1707 } else {
1708 /* linkspeed == LINK_1000MB -
1709 don't advertise 10/100 Mb modes */
1710 phy_advreg = MIICR_REG_4;
1711 }
1712 /* enable PAUSE frames */
1713 phy_advreg |= PAR_ASYMPAUSE;
1714 /* required by the Cicada PHY */
1715 phy_advreg |= PAR_802_3;
1716 slic_reg32_write(wphy, phy_advreg, FLUSH);
1717 /* advertise FD only @1000 Mb */
1718 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
1719 slic_reg32_write(wphy, phy_gctlreg, FLUSH);
1720
1721 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1722 /* if a Marvell PHY
1723 enable auto crossover */
1724 phy_config =
1725 (MIICR_REG_16 | (MRV_REG16_XOVERON));
1726 slic_reg32_write(wphy, phy_config, FLUSH);
1727
1728 /* reset phy, enable auto-neg */
1729 phy_config =
1730 (MIICR_REG_PCR |
1731 (PCR_RESET | PCR_AUTONEG |
1732 PCR_AUTONEG_RST));
1733 slic_reg32_write(wphy, phy_config, FLUSH);
1734 } else { /* it's a Cicada PHY */
1735 /* enable and restart auto-neg (don't reset) */
1736 phy_config =
1737 (MIICR_REG_PCR |
1738 (PCR_AUTONEG | PCR_AUTONEG_RST));
1739 slic_reg32_write(wphy, phy_config, FLUSH);
1740 }
1741 }
1742 } else {
1743 /* Forced 10/100 */
1744 if (linkspeed == LINK_10MB)
1745 speed = 0;
1746 else
1747 speed = PCR_SPEED_100;
1748 if (linkduplex == LINK_HALFD)
1749 duplex = 0;
1750 else
1751 duplex = PCR_DUPLEX_FULL;
1752
1753 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1754 /* if a Marvell PHY
1755 disable auto crossover */
1756 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
1757 slic_reg32_write(wphy, phy_config, FLUSH);
1758 }
1759
1760 /* power down phy to break link (this may not work) */
1761 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
1762 slic_reg32_write(wphy, phy_config, FLUSH);
1763
1764 /* wait, Marvell says 1 sec, try to get away with 10 ms */
1765 mdelay(10);
1766
1767 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
1768 /* if a Marvell PHY
1769 disable auto-neg, set speed,
1770 soft reset phy, powerup */
1771 phy_config =
1772 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
1773 slic_reg32_write(wphy, phy_config, FLUSH);
1774 } else { /* it's a Cicada PHY */
1775 /* disable auto-neg, set speed, powerup */
1776 phy_config = (MIICR_REG_PCR | (speed | duplex));
1777 slic_reg32_write(wphy, phy_config, FLUSH);
1778 }
1779 }
1780 }
1781
1782 static void slic_card_cleanup(struct sliccard *card)
1783 {
1784 if (card->loadtimerset) {
1785 card->loadtimerset = 0;
1786 del_timer(&card->loadtimer);
1787 }
1788
1789 slic_debug_card_destroy(card);
1790
1791 kfree(card);
1792 }
1793
1794 static int slic_card_download_gbrcv(struct adapter *adapter)
1795 {
1796 const struct firmware *fw;
1797 const char *file = "";
1798 int ret;
1799 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1800 u32 codeaddr;
1801 u32 instruction;
1802 int index = 0;
1803 u32 rcvucodelen = 0;
1804
1805 switch (adapter->devid) {
1806 case SLIC_2GB_DEVICE_ID:
1807 file = "slicoss/oasisrcvucode.sys";
1808 break;
1809 case SLIC_1GB_DEVICE_ID:
1810 file = "slicoss/gbrcvucode.sys";
1811 break;
1812 default:
1813 ASSERT(0);
1814 break;
1815 }
1816
1817 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1818 if (ret) {
1819 dev_err(&adapter->pcidev->dev,
1820 "SLICOSS: Failed to load firmware %s\n", file);
1821 return ret;
1822 }
1823
1824 rcvucodelen = *(u32 *)(fw->data + index);
1825 index += 4;
1826 switch (adapter->devid) {
1827 case SLIC_2GB_DEVICE_ID:
1828 if (rcvucodelen != OasisRcvUCodeLen)
1829 return -EINVAL;
1830 break;
1831 case SLIC_1GB_DEVICE_ID:
1832 if (rcvucodelen != GBRcvUCodeLen)
1833 return -EINVAL;
1834 break;
1835 default:
1836 ASSERT(0);
1837 break;
1838 }
1839 /* start download */
1840 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
1841 /* download the rcv sequencer ucode */
1842 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
1843 /* write out instruction address */
1844 slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
1845
1846 instruction = *(u32 *)(fw->data + index);
1847 index += 4;
1848 /* write out the instruction data low addr */
1849 slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
1850
1851 instruction = *(u8 *)(fw->data + index);
1852 index++;
1853 /* write out the instruction data high addr */
1854 slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
1855 FLUSH);
1856 }
1857
1858 /* download finished */
1859 release_firmware(fw);
1860 slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
1861 return 0;
1862 }
1863
1864 static int slic_card_download(struct adapter *adapter)
1865 {
1866 const struct firmware *fw;
1867 const char *file = "";
1868 int ret;
1869 u32 section;
1870 int thissectionsize;
1871 int codeaddr;
1872 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1873 u32 instruction;
1874 u32 baseaddress;
1875 u32 i;
1876 u32 numsects = 0;
1877 u32 sectsize[3];
1878 u32 sectstart[3];
1879 int ucode_start, index = 0;
1880
1881 switch (adapter->devid) {
1882 case SLIC_2GB_DEVICE_ID:
1883 file = "slicoss/oasisdownload.sys";
1884 break;
1885 case SLIC_1GB_DEVICE_ID:
1886 file = "slicoss/gbdownload.sys";
1887 break;
1888 default:
1889 ASSERT(0);
1890 break;
1891 }
1892 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
1893 if (ret) {
1894 dev_err(&adapter->pcidev->dev,
1895 "SLICOSS: Failed to load firmware %s\n", file);
1896 return ret;
1897 }
1898 numsects = *(u32 *)(fw->data + index);
1899 index += 4;
1900 ASSERT(numsects <= 3);
1901 for (i = 0; i < numsects; i++) {
1902 sectsize[i] = *(u32 *)(fw->data + index);
1903 index += 4;
1904 }
1905 for (i = 0; i < numsects; i++) {
1906 sectstart[i] = *(u32 *)(fw->data + index);
1907 index += 4;
1908 }
1909 ucode_start = index;
1910 instruction = *(u32 *)(fw->data + index);
1911 index += 4;
1912 for (section = 0; section < numsects; section++) {
1913 baseaddress = sectstart[section];
1914 thissectionsize = sectsize[section] >> 3;
1915
1916 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1917 /* Write out instruction address */
1918 slic_reg32_write(&slic_regs->slic_wcs,
1919 baseaddress + codeaddr, FLUSH);
1920 /* Write out instruction to low addr */
1921 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1922 instruction = *(u32 *)(fw->data + index);
1923 index += 4;
1924
1925 /* Write out instruction to high addr */
1926 slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
1927 instruction = *(u32 *)(fw->data + index);
1928 index += 4;
1929 }
1930 }
1931 index = ucode_start;
1932 for (section = 0; section < numsects; section++) {
1933 instruction = *(u32 *)(fw->data + index);
1934 baseaddress = sectstart[section];
1935 if (baseaddress < 0x8000)
1936 continue;
1937 thissectionsize = sectsize[section] >> 3;
1938
1939 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
1940 /* Write out instruction address */
1941 slic_reg32_write(&slic_regs->slic_wcs,
1942 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
1943 FLUSH);
1944 /* Write out instruction to low addr */
1945 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1946 FLUSH);
1947 instruction = *(u32 *)(fw->data + index);
1948 index += 4;
1949 /* Write out instruction to high addr */
1950 slic_reg32_write(&slic_regs->slic_wcs, instruction,
1951 FLUSH);
1952 instruction = *(u32 *)(fw->data + index);
1953 index += 4;
1954
1955 /* Check SRAM location zero. If it is non-zero. Abort.*/
1956 /* failure = readl((u32 __iomem *)&slic_regs->slic_reset);
1957 if (failure) {
1958 release_firmware(fw);
1959 return -EIO;
1960 }*/
1961 }
1962 }
1963 release_firmware(fw);
1964 /* Everything OK, kick off the card */
1965 mdelay(10);
1966 slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
1967
1968 /* stall for 20 ms, long enough for ucode to init card
1969 and reach mainloop */
1970 mdelay(20);
1971
1972 return STATUS_SUCCESS;
1973 }
1974
1975 static void slic_adapter_set_hwaddr(struct adapter *adapter)
1976 {
1977 struct sliccard *card = adapter->card;
1978
1979 if ((adapter->card) && (card->config_set)) {
1980 memcpy(adapter->macaddr,
1981 card->config.MacInfo[adapter->functionnumber].macaddrA,
1982 sizeof(struct slic_config_mac));
1983 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
1984 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
1985 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
1986 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
1987 }
1988 if (adapter->netdev) {
1989 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
1990 6);
1991 }
1992 }
1993 }
1994
1995 static void slic_intagg_set(struct adapter *adapter, u32 value)
1996 {
1997 slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
1998 adapter->card->loadlevel_current = value;
1999 }
2000
2001 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2002 {
2003 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2004 struct slic_eeprom *peeprom;
2005 struct oslic_eeprom *pOeeprom;
2006 dma_addr_t phys_config;
2007 u32 phys_configh;
2008 u32 phys_configl;
2009 u32 i = 0;
2010 struct slic_shmem *pshmem;
2011 int status;
2012 uint macaddrs = card->card_size;
2013 ushort eecodesize;
2014 ushort dramsize;
2015 ushort ee_chksum;
2016 ushort calc_chksum;
2017 struct slic_config_mac *pmac;
2018 unsigned char fruformat;
2019 unsigned char oemfruformat;
2020 struct atk_fru *patkfru;
2021 union oemfru *poemfru;
2022
2023 /* Reset everything except PCI configuration space */
2024 slic_soft_reset(adapter);
2025
2026 /* Download the microcode */
2027 status = slic_card_download(adapter);
2028
2029 if (status != STATUS_SUCCESS) {
2030 dev_err(&adapter->pcidev->dev,
2031 "download failed bus %d slot %d\n",
2032 adapter->busnumber, adapter->slotnumber);
2033 return status;
2034 }
2035
2036 if (!card->config_set) {
2037 peeprom = pci_alloc_consistent(adapter->pcidev,
2038 sizeof(struct slic_eeprom),
2039 &phys_config);
2040
2041 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2042 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2043
2044 if (!peeprom) {
2045 dev_err(&adapter->pcidev->dev,
2046 "eeprom read failed to get memory "
2047 "bus %d slot %d\n", adapter->busnumber,
2048 adapter->slotnumber);
2049 return -ENOMEM;
2050 } else {
2051 memset(peeprom, 0, sizeof(struct slic_eeprom));
2052 }
2053 slic_reg32_write(&slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2054 mdelay(1);
2055 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2056
2057 spin_lock_irqsave(&adapter->bit64reglock.lock,
2058 adapter->bit64reglock.flags);
2059 slic_reg32_write(&slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2060 slic_reg32_write(&slic_regs->slic_isp,
2061 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2062 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2063 adapter->bit64reglock.flags);
2064
2065 slic_config_get(adapter, phys_configl, phys_configh);
2066
2067 for (;;) {
2068 if (adapter->pshmem->isr) {
2069 if (adapter->pshmem->isr & ISR_UPC) {
2070 adapter->pshmem->isr = 0;
2071 slic_reg64_write(adapter,
2072 &slic_regs->slic_isp, 0,
2073 &slic_regs->slic_addr_upper,
2074 0, FLUSH);
2075 slic_reg32_write(&slic_regs->slic_isr,
2076 0, FLUSH);
2077
2078 slic_upr_request_complete(adapter, 0);
2079 break;
2080 } else {
2081 adapter->pshmem->isr = 0;
2082 slic_reg32_write(&slic_regs->slic_isr,
2083 0, FLUSH);
2084 }
2085 } else {
2086 mdelay(1);
2087 i++;
2088 if (i > 5000) {
2089 dev_err(&adapter->pcidev->dev,
2090 "%d config data fetch timed out!\n",
2091 adapter->port);
2092 slic_reg64_write(adapter,
2093 &slic_regs->slic_isp, 0,
2094 &slic_regs->slic_addr_upper,
2095 0, FLUSH);
2096 return -EINVAL;
2097 }
2098 }
2099 }
2100
2101 switch (adapter->devid) {
2102 /* Oasis card */
2103 case SLIC_2GB_DEVICE_ID:
2104 /* extract EEPROM data and pointers to EEPROM data */
2105 pOeeprom = (struct oslic_eeprom *) peeprom;
2106 eecodesize = pOeeprom->EecodeSize;
2107 dramsize = pOeeprom->DramSize;
2108 pmac = pOeeprom->MacInfo;
2109 fruformat = pOeeprom->FruFormat;
2110 patkfru = &pOeeprom->AtkFru;
2111 oemfruformat = pOeeprom->OemFruFormat;
2112 poemfru = &pOeeprom->OemFru;
2113 macaddrs = 2;
2114 /* Minor kludge for Oasis card
2115 get 2 MAC addresses from the
2116 EEPROM to ensure that function 1
2117 gets the Port 1 MAC address */
2118 break;
2119 default:
2120 /* extract EEPROM data and pointers to EEPROM data */
2121 eecodesize = peeprom->EecodeSize;
2122 dramsize = peeprom->DramSize;
2123 pmac = peeprom->u2.mac.MacInfo;
2124 fruformat = peeprom->FruFormat;
2125 patkfru = &peeprom->AtkFru;
2126 oemfruformat = peeprom->OemFruFormat;
2127 poemfru = &peeprom->OemFru;
2128 break;
2129 }
2130
2131 card->config.EepromValid = false;
2132
2133 /* see if the EEPROM is valid by checking it's checksum */
2134 if ((eecodesize <= MAX_EECODE_SIZE) &&
2135 (eecodesize >= MIN_EECODE_SIZE)) {
2136
2137 ee_chksum =
2138 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2139 /*
2140 calculate the EEPROM checksum
2141 */
2142 calc_chksum =
2143 ~slic_eeprom_cksum((char *) peeprom,
2144 (eecodesize - 2));
2145 /*
2146 if the ucdoe chksum flag bit worked,
2147 we wouldn't need this shit
2148 */
2149 if (ee_chksum == calc_chksum)
2150 card->config.EepromValid = true;
2151 }
2152 /* copy in the DRAM size */
2153 card->config.DramSize = dramsize;
2154
2155 /* copy in the MAC address(es) */
2156 for (i = 0; i < macaddrs; i++) {
2157 memcpy(&card->config.MacInfo[i],
2158 &pmac[i], sizeof(struct slic_config_mac));
2159 }
2160
2161 /* copy the Alacritech FRU information */
2162 card->config.FruFormat = fruformat;
2163 memcpy(&card->config.AtkFru, patkfru,
2164 sizeof(struct atk_fru));
2165
2166 pci_free_consistent(adapter->pcidev,
2167 sizeof(struct slic_eeprom),
2168 peeprom, phys_config);
2169
2170 if ((!card->config.EepromValid) &&
2171 (adapter->reg_params.fail_on_bad_eeprom)) {
2172 slic_reg64_write(adapter, &slic_regs->slic_isp, 0,
2173 &slic_regs->slic_addr_upper,
2174 0, FLUSH);
2175 dev_err(&adapter->pcidev->dev,
2176 "unsupported CONFIGURATION EEPROM invalid\n");
2177 return -EINVAL;
2178 }
2179
2180 card->config_set = 1;
2181 }
2182
2183 if (slic_card_download_gbrcv(adapter)) {
2184 dev_err(&adapter->pcidev->dev,
2185 "unable to download GB receive microcode\n");
2186 return -EINVAL;
2187 }
2188
2189 if (slic_global.dynamic_intagg)
2190 slic_intagg_set(adapter, 0);
2191 else
2192 slic_intagg_set(adapter, intagg_delay);
2193
2194 /*
2195 * Initialize ping status to "ok"
2196 */
2197 card->pingstatus = ISR_PINGMASK;
2198
2199 /*
2200 * Lastly, mark our card state as up and return success
2201 */
2202 card->state = CARD_UP;
2203 card->reset_in_progress = 0;
2204
2205 return STATUS_SUCCESS;
2206 }
2207
2208 static u32 slic_card_locate(struct adapter *adapter)
2209 {
2210 struct sliccard *card = slic_global.slic_card;
2211 struct physcard *physcard = slic_global.phys_card;
2212 ushort card_hostid;
2213 u16 __iomem *hostid_reg;
2214 uint i;
2215 uint rdhostid_offset = 0;
2216
2217 switch (adapter->devid) {
2218 case SLIC_2GB_DEVICE_ID:
2219 rdhostid_offset = SLIC_RDHOSTID_2GB;
2220 break;
2221 case SLIC_1GB_DEVICE_ID:
2222 rdhostid_offset = SLIC_RDHOSTID_1GB;
2223 break;
2224 default:
2225 ASSERT(0);
2226 break;
2227 }
2228
2229 hostid_reg =
2230 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2231 rdhostid_offset);
2232
2233 /* read the 16 bit hostid from SRAM */
2234 card_hostid = (ushort) readw(hostid_reg);
2235
2236 /* Initialize a new card structure if need be */
2237 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2238 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2239 if (card == NULL)
2240 return -ENOMEM;
2241
2242 card->next = slic_global.slic_card;
2243 slic_global.slic_card = card;
2244 card->busnumber = adapter->busnumber;
2245 card->slotnumber = adapter->slotnumber;
2246
2247 /* Find an available cardnum */
2248 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2249 if (slic_global.cardnuminuse[i] == 0) {
2250 slic_global.cardnuminuse[i] = 1;
2251 card->cardnum = i;
2252 break;
2253 }
2254 }
2255 slic_global.num_slic_cards++;
2256
2257 slic_debug_card_create(card);
2258 } else {
2259 /* Card exists, find the card this adapter belongs to */
2260 while (card) {
2261 if (card->cardnum == card_hostid)
2262 break;
2263 card = card->next;
2264 }
2265 }
2266
2267 ASSERT(card);
2268 if (!card)
2269 return STATUS_FAILURE;
2270 /* Put the adapter in the card's adapter list */
2271 ASSERT(card->adapter[adapter->port] == NULL);
2272 if (!card->adapter[adapter->port]) {
2273 card->adapter[adapter->port] = adapter;
2274 adapter->card = card;
2275 }
2276
2277 card->card_size = 1; /* one port per *logical* card */
2278
2279 while (physcard) {
2280 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2281 if (!physcard->adapter[i])
2282 continue;
2283 else
2284 break;
2285 }
2286 ASSERT(i != SLIC_MAX_PORTS);
2287 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2288 break;
2289 physcard = physcard->next;
2290 }
2291 if (!physcard) {
2292 /* no structure allocated for this physical card yet */
2293 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
2294 ASSERT(physcard);
2295
2296 physcard->next = slic_global.phys_card;
2297 slic_global.phys_card = physcard;
2298 physcard->adapters_allocd = 1;
2299 } else {
2300 physcard->adapters_allocd++;
2301 }
2302 /* Note - this is ZERO relative */
2303 adapter->physport = physcard->adapters_allocd - 1;
2304
2305 ASSERT(physcard->adapter[adapter->physport] == NULL);
2306 physcard->adapter[adapter->physport] = adapter;
2307 adapter->physcard = physcard;
2308
2309 return 0;
2310 }
2311
2312 static void slic_soft_reset(struct adapter *adapter)
2313 {
2314 if (adapter->card->state == CARD_UP) {
2315 slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
2316 mdelay(1);
2317 }
2318
2319 slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
2320 FLUSH);
2321 mdelay(1);
2322 }
2323
2324 static void slic_config_set(struct adapter *adapter, bool linkchange)
2325 {
2326 u32 value;
2327 u32 RcrReset;
2328 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2329
2330 if (linkchange) {
2331 /* Setup MAC */
2332 slic_mac_config(adapter);
2333 RcrReset = GRCR_RESET;
2334 } else {
2335 slic_mac_address_config(adapter);
2336 RcrReset = 0;
2337 }
2338
2339 if (adapter->linkduplex == LINK_FULLD) {
2340 /* setup xmtcfg */
2341 value = (GXCR_RESET | /* Always reset */
2342 GXCR_XMTEN | /* Enable transmit */
2343 GXCR_PAUSEEN); /* Enable pause */
2344
2345 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2346
2347 /* Setup rcvcfg last */
2348 value = (RcrReset | /* Reset, if linkchange */
2349 GRCR_CTLEN | /* Enable CTL frames */
2350 GRCR_ADDRAEN | /* Address A enable */
2351 GRCR_RCVBAD | /* Rcv bad frames */
2352 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2353 } else {
2354 /* setup xmtcfg */
2355 value = (GXCR_RESET | /* Always reset */
2356 GXCR_XMTEN); /* Enable transmit */
2357
2358 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2359
2360 /* Setup rcvcfg last */
2361 value = (RcrReset | /* Reset, if linkchange */
2362 GRCR_ADDRAEN | /* Address A enable */
2363 GRCR_RCVBAD | /* Rcv bad frames */
2364 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2365 }
2366
2367 if (adapter->state != ADAPT_DOWN) {
2368 /* Only enable receive if we are restarting or running */
2369 value |= GRCR_RCVEN;
2370 }
2371
2372 if (adapter->macopts & MAC_PROMISC)
2373 value |= GRCR_RCVALL;
2374
2375 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2376 }
2377
2378 /*
2379 * Turn off RCV and XMT, power down PHY
2380 */
2381 static void slic_config_clear(struct adapter *adapter)
2382 {
2383 u32 value;
2384 u32 phy_config;
2385 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2386
2387 /* Setup xmtcfg */
2388 value = (GXCR_RESET | /* Always reset */
2389 GXCR_PAUSEEN); /* Enable pause */
2390
2391 slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
2392
2393 value = (GRCR_RESET | /* Always reset */
2394 GRCR_CTLEN | /* Enable CTL frames */
2395 GRCR_ADDRAEN | /* Address A enable */
2396 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2397
2398 slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
2399
2400 /* power down phy */
2401 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2402 slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
2403 }
2404
2405 static void slic_config_get(struct adapter *adapter, u32 config,
2406 u32 config_h)
2407 {
2408 int status;
2409
2410 status = slic_upr_request(adapter,
2411 SLIC_UPR_RCONFIG,
2412 (u32) config, (u32) config_h, 0, 0);
2413 ASSERT(status == 0);
2414 }
2415
2416 static void slic_mac_address_config(struct adapter *adapter)
2417 {
2418 u32 value;
2419 u32 value2;
2420 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2421
2422 value = *(u32 *) &adapter->currmacaddr[2];
2423 value = ntohl(value);
2424 slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
2425 slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
2426
2427 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
2428 adapter->currmacaddr[1]) & 0xFFFF);
2429
2430 slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
2431 slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
2432
2433 /* Write our multicast mask out to the card. This is done */
2434 /* here in addition to the slic_mcast_addr_set routine */
2435 /* because ALL_MCAST may have been enabled or disabled */
2436 slic_mcast_set_mask(adapter);
2437 }
2438
2439 static void slic_mac_config(struct adapter *adapter)
2440 {
2441 u32 value;
2442 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2443
2444 /* Setup GMAC gaps */
2445 if (adapter->linkspeed == LINK_1000MB) {
2446 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
2447 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
2448 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
2449 } else {
2450 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
2451 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
2452 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
2453 }
2454
2455 /* enable GMII */
2456 if (adapter->linkspeed == LINK_1000MB)
2457 value |= GMCR_GBIT;
2458
2459 /* enable fullduplex */
2460 if ((adapter->linkduplex == LINK_FULLD)
2461 || (adapter->macopts & MAC_LOOPBACK)) {
2462 value |= GMCR_FULLD;
2463 }
2464
2465 /* write mac config */
2466 slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
2467
2468 /* setup mac addresses */
2469 slic_mac_address_config(adapter);
2470 }
2471
2472 static bool slic_mac_filter(struct adapter *adapter,
2473 struct ether_header *ether_frame)
2474 {
2475 u32 opts = adapter->macopts;
2476 u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
2477 u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
2478 bool equaladdr;
2479
2480 if (opts & MAC_PROMISC)
2481 return true;
2482
2483 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
2484 if (opts & MAC_BCAST) {
2485 adapter->rcv_broadcasts++;
2486 return true;
2487 } else {
2488 return false;
2489 }
2490 }
2491
2492 if (ether_frame->ether_dhost[0] & 0x01) {
2493 if (opts & MAC_ALLMCAST) {
2494 adapter->rcv_multicasts++;
2495 adapter->stats.multicast++;
2496 return true;
2497 }
2498 if (opts & MAC_MCAST) {
2499 struct mcast_address *mcaddr = adapter->mcastaddrs;
2500
2501 while (mcaddr) {
2502 ETHER_EQ_ADDR(mcaddr->address,
2503 ether_frame->ether_dhost,
2504 equaladdr);
2505 if (equaladdr) {
2506 adapter->rcv_multicasts++;
2507 adapter->stats.multicast++;
2508 return true;
2509 }
2510 mcaddr = mcaddr->next;
2511 }
2512 return false;
2513 } else {
2514 return false;
2515 }
2516 }
2517 if (opts & MAC_DIRECTED) {
2518 adapter->rcv_unicasts++;
2519 return true;
2520 }
2521 return false;
2522
2523 }
2524
2525 static int slic_mac_set_address(struct net_device *dev, void *ptr)
2526 {
2527 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
2528 struct sockaddr *addr = ptr;
2529
2530 if (netif_running(dev))
2531 return -EBUSY;
2532 if (!adapter)
2533 return -EBUSY;
2534
2535 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
2536 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
2537
2538 slic_config_set(adapter, true);
2539 return 0;
2540 }
2541
2542 static void slic_timer_load_check(ulong cardaddr)
2543 {
2544 struct sliccard *card = (struct sliccard *)cardaddr;
2545 struct adapter *adapter = card->master;
2546 u32 __iomem *intagg;
2547 u32 load = card->events;
2548 u32 level = 0;
2549
2550 intagg = &adapter->slic_regs->slic_intagg;
2551
2552 if ((adapter) && (adapter->state == ADAPT_UP) &&
2553 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
2554 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
2555 if (adapter->linkspeed == LINK_1000MB)
2556 level = 100;
2557 else {
2558 if (load > SLIC_LOAD_5)
2559 level = SLIC_INTAGG_5;
2560 else if (load > SLIC_LOAD_4)
2561 level = SLIC_INTAGG_4;
2562 else if (load > SLIC_LOAD_3)
2563 level = SLIC_INTAGG_3;
2564 else if (load > SLIC_LOAD_2)
2565 level = SLIC_INTAGG_2;
2566 else if (load > SLIC_LOAD_1)
2567 level = SLIC_INTAGG_1;
2568 else
2569 level = SLIC_INTAGG_0;
2570 }
2571 if (card->loadlevel_current != level) {
2572 card->loadlevel_current = level;
2573 slic_reg32_write(intagg, level, FLUSH);
2574 }
2575 } else {
2576 if (load > SLIC_LOAD_5)
2577 level = SLIC_INTAGG_5;
2578 else if (load > SLIC_LOAD_4)
2579 level = SLIC_INTAGG_4;
2580 else if (load > SLIC_LOAD_3)
2581 level = SLIC_INTAGG_3;
2582 else if (load > SLIC_LOAD_2)
2583 level = SLIC_INTAGG_2;
2584 else if (load > SLIC_LOAD_1)
2585 level = SLIC_INTAGG_1;
2586 else
2587 level = SLIC_INTAGG_0;
2588 if (card->loadlevel_current != level) {
2589 card->loadlevel_current = level;
2590 slic_reg32_write(intagg, level, FLUSH);
2591 }
2592 }
2593 }
2594 card->events = 0;
2595 card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
2596 add_timer(&card->loadtimer);
2597 }
2598
2599 static void slic_assert_fail(void)
2600 {
2601 u32 cpuid;
2602 u32 curr_pid;
2603 cpuid = smp_processor_id();
2604 curr_pid = current->pid;
2605
2606 printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
2607 __func__, cpuid, curr_pid);
2608 }
2609
2610 static int slic_upr_queue_request(struct adapter *adapter,
2611 u32 upr_request,
2612 u32 upr_data,
2613 u32 upr_data_h,
2614 u32 upr_buffer, u32 upr_buffer_h)
2615 {
2616 struct slic_upr *upr;
2617 struct slic_upr *uprqueue;
2618
2619 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
2620 if (!upr)
2621 return -ENOMEM;
2622
2623 upr->adapter = adapter->port;
2624 upr->upr_request = upr_request;
2625 upr->upr_data = upr_data;
2626 upr->upr_buffer = upr_buffer;
2627 upr->upr_data_h = upr_data_h;
2628 upr->upr_buffer_h = upr_buffer_h;
2629 upr->next = NULL;
2630 if (adapter->upr_list) {
2631 uprqueue = adapter->upr_list;
2632
2633 while (uprqueue->next)
2634 uprqueue = uprqueue->next;
2635 uprqueue->next = upr;
2636 } else {
2637 adapter->upr_list = upr;
2638 }
2639 return STATUS_SUCCESS;
2640 }
2641
2642 static int slic_upr_request(struct adapter *adapter,
2643 u32 upr_request,
2644 u32 upr_data,
2645 u32 upr_data_h,
2646 u32 upr_buffer, u32 upr_buffer_h)
2647 {
2648 int status;
2649
2650 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2651 status = slic_upr_queue_request(adapter,
2652 upr_request,
2653 upr_data,
2654 upr_data_h, upr_buffer, upr_buffer_h);
2655 if (status != STATUS_SUCCESS) {
2656 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2657 adapter->upr_lock.flags);
2658 return status;
2659 }
2660 slic_upr_start(adapter);
2661 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2662 adapter->upr_lock.flags);
2663 return STATUS_PENDING;
2664 }
2665
2666 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
2667 {
2668 struct sliccard *card = adapter->card;
2669 struct slic_upr *upr;
2670
2671 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
2672 upr = adapter->upr_list;
2673 if (!upr) {
2674 ASSERT(0);
2675 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2676 adapter->upr_lock.flags);
2677 return;
2678 }
2679 adapter->upr_list = upr->next;
2680 upr->next = NULL;
2681 adapter->upr_busy = 0;
2682 ASSERT(adapter->port == upr->adapter);
2683 switch (upr->upr_request) {
2684 case SLIC_UPR_STATS:
2685 {
2686 struct slic_stats *slicstats =
2687 (struct slic_stats *) &adapter->pshmem->inicstats;
2688 struct slic_stats *newstats = slicstats;
2689 struct slic_stats *old = &adapter->inicstats_prev;
2690 struct slicnet_stats *stst = &adapter->slic_stats;
2691
2692 if (isr & ISR_UPCERR) {
2693 dev_err(&adapter->netdev->dev,
2694 "SLIC_UPR_STATS command failed isr[%x]\n",
2695 isr);
2696
2697 break;
2698 }
2699 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
2700 newstats->xmit_tcp_segs_gb,
2701 old->xmit_tcp_segs_gb);
2702
2703 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
2704 newstats->xmit_tcp_bytes_gb,
2705 old->xmit_tcp_bytes_gb);
2706
2707 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
2708 newstats->rcv_tcp_segs_gb,
2709 old->rcv_tcp_segs_gb);
2710
2711 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
2712 newstats->rcv_tcp_bytes_gb,
2713 old->rcv_tcp_bytes_gb);
2714
2715 UPDATE_STATS_GB(stst->iface.xmt_bytes,
2716 newstats->xmit_bytes_gb,
2717 old->xmit_bytes_gb);
2718
2719 UPDATE_STATS_GB(stst->iface.xmt_ucast,
2720 newstats->xmit_unicasts_gb,
2721 old->xmit_unicasts_gb);
2722
2723 UPDATE_STATS_GB(stst->iface.rcv_bytes,
2724 newstats->rcv_bytes_gb,
2725 old->rcv_bytes_gb);
2726
2727 UPDATE_STATS_GB(stst->iface.rcv_ucast,
2728 newstats->rcv_unicasts_gb,
2729 old->rcv_unicasts_gb);
2730
2731 UPDATE_STATS_GB(stst->iface.xmt_errors,
2732 newstats->xmit_collisions_gb,
2733 old->xmit_collisions_gb);
2734
2735 UPDATE_STATS_GB(stst->iface.xmt_errors,
2736 newstats->xmit_excess_collisions_gb,
2737 old->xmit_excess_collisions_gb);
2738
2739 UPDATE_STATS_GB(stst->iface.xmt_errors,
2740 newstats->xmit_other_error_gb,
2741 old->xmit_other_error_gb);
2742
2743 UPDATE_STATS_GB(stst->iface.rcv_errors,
2744 newstats->rcv_other_error_gb,
2745 old->rcv_other_error_gb);
2746
2747 UPDATE_STATS_GB(stst->iface.rcv_discards,
2748 newstats->rcv_drops_gb,
2749 old->rcv_drops_gb);
2750
2751 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
2752 adapter->rcv_drops +=
2753 (newstats->rcv_drops_gb -
2754 old->rcv_drops_gb);
2755 }
2756 memcpy(old, newstats, sizeof(struct slic_stats));
2757 break;
2758 }
2759 case SLIC_UPR_RLSR:
2760 slic_link_upr_complete(adapter, isr);
2761 break;
2762 case SLIC_UPR_RCONFIG:
2763 break;
2764 case SLIC_UPR_RPHY:
2765 ASSERT(0);
2766 break;
2767 case SLIC_UPR_ENLB:
2768 ASSERT(0);
2769 break;
2770 case SLIC_UPR_ENCT:
2771 ASSERT(0);
2772 break;
2773 case SLIC_UPR_PDWN:
2774 ASSERT(0);
2775 break;
2776 case SLIC_UPR_PING:
2777 card->pingstatus |= (isr & ISR_PINGDSMASK);
2778 break;
2779 default:
2780 ASSERT(0);
2781 }
2782 kfree(upr);
2783 slic_upr_start(adapter);
2784 spin_unlock_irqrestore(&adapter->upr_lock.lock,
2785 adapter->upr_lock.flags);
2786 }
2787
2788 static void slic_upr_start(struct adapter *adapter)
2789 {
2790 struct slic_upr *upr;
2791 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2792 /*
2793 char * ptr1;
2794 char * ptr2;
2795 uint cmdoffset;
2796 */
2797 upr = adapter->upr_list;
2798 if (!upr)
2799 return;
2800 if (adapter->upr_busy)
2801 return;
2802 adapter->upr_busy = 1;
2803
2804 switch (upr->upr_request) {
2805 case SLIC_UPR_STATS:
2806 if (upr->upr_data_h == 0) {
2807 slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
2808 FLUSH);
2809 } else {
2810 slic_reg64_write(adapter, &slic_regs->slic_stats64,
2811 upr->upr_data,
2812 &slic_regs->slic_addr_upper,
2813 upr->upr_data_h, FLUSH);
2814 }
2815 break;
2816
2817 case SLIC_UPR_RLSR:
2818 slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
2819 &slic_regs->slic_addr_upper, upr->upr_data_h,
2820 FLUSH);
2821 break;
2822
2823 case SLIC_UPR_RCONFIG:
2824 slic_reg64_write(adapter, &slic_regs->slic_rconfig,
2825 upr->upr_data, &slic_regs->slic_addr_upper,
2826 upr->upr_data_h, FLUSH);
2827 break;
2828 case SLIC_UPR_PING:
2829 slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
2830 break;
2831 default:
2832 ASSERT(0);
2833 }
2834 }
2835
2836 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
2837 {
2838 u32 linkstatus = adapter->pshmem->linkstatus;
2839 uint linkup;
2840 unsigned char linkspeed;
2841 unsigned char linkduplex;
2842
2843 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
2844 struct slic_shmem *pshmem;
2845
2846 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2847 #if defined(CONFIG_X86_64)
2848 slic_upr_queue_request(adapter,
2849 SLIC_UPR_RLSR,
2850 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
2851 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
2852 0, 0);
2853 #elif defined(CONFIG_X86)
2854 slic_upr_queue_request(adapter,
2855 SLIC_UPR_RLSR,
2856 (u32) &pshmem->linkstatus,
2857 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
2858 #else
2859 Stop Compilation;
2860 #endif
2861 return;
2862 }
2863 if (adapter->state != ADAPT_UP)
2864 return;
2865
2866 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
2867 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2868
2869 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
2870 if (linkstatus & GIG_SPEED_1000)
2871 linkspeed = LINK_1000MB;
2872 else if (linkstatus & GIG_SPEED_100)
2873 linkspeed = LINK_100MB;
2874 else
2875 linkspeed = LINK_10MB;
2876
2877 if (linkstatus & GIG_FULLDUPLEX)
2878 linkduplex = LINK_FULLD;
2879 else
2880 linkduplex = LINK_HALFD;
2881
2882 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
2883 return;
2884
2885 /* link up event, but nothing has changed */
2886 if ((adapter->linkstate == LINK_UP) &&
2887 (linkup == LINK_UP) &&
2888 (adapter->linkspeed == linkspeed) &&
2889 (adapter->linkduplex == linkduplex))
2890 return;
2891
2892 /* link has changed at this point */
2893
2894 /* link has gone from up to down */
2895 if (linkup == LINK_DOWN) {
2896 adapter->linkstate = LINK_DOWN;
2897 return;
2898 }
2899
2900 /* link has gone from down to up */
2901 adapter->linkspeed = linkspeed;
2902 adapter->linkduplex = linkduplex;
2903
2904 if (adapter->linkstate != LINK_UP) {
2905 /* setup the mac */
2906 slic_config_set(adapter, true);
2907 adapter->linkstate = LINK_UP;
2908 netif_start_queue(adapter->netdev);
2909 }
2910 }
2911
2912 /*
2913 * this is here to checksum the eeprom, there is some ucode bug
2914 * which prevens us from using the ucode result.
2915 * remove this once ucode is fixed.
2916 */
2917 static ushort slic_eeprom_cksum(char *m, int len)
2918 {
2919 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
2920 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
2921 }
2922
2923 u16 *w;
2924 u32 sum = 0;
2925 u32 byte_swapped = 0;
2926 u32 w_int;
2927
2928 union {
2929 char c[2];
2930 ushort s;
2931 } s_util;
2932
2933 union {
2934 ushort s[2];
2935 int l;
2936 } l_util;
2937
2938 l_util.l = 0;
2939 s_util.s = 0;
2940
2941 w = (u16 *)m;
2942 #ifdef CONFIG_X86_64
2943 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
2944 #else
2945 w_int = (u32) (w);
2946 #endif
2947 if ((1 & w_int) && (len > 0)) {
2948 REDUCE;
2949 sum <<= 8;
2950 s_util.c[0] = *(unsigned char *)w;
2951 w = (u16 *)((char *)w + 1);
2952 len--;
2953 byte_swapped = 1;
2954 }
2955
2956 /* Unroll the loop to make overhead from branches &c small. */
2957 while ((len -= 32) >= 0) {
2958 sum += w[0];
2959 sum += w[1];
2960 sum += w[2];
2961 sum += w[3];
2962 sum += w[4];
2963 sum += w[5];
2964 sum += w[6];
2965 sum += w[7];
2966 sum += w[8];
2967 sum += w[9];
2968 sum += w[10];
2969 sum += w[11];
2970 sum += w[12];
2971 sum += w[13];
2972 sum += w[14];
2973 sum += w[15];
2974 w = (u16 *)((ulong) w + 16); /* verify */
2975 }
2976 len += 32;
2977 while ((len -= 8) >= 0) {
2978 sum += w[0];
2979 sum += w[1];
2980 sum += w[2];
2981 sum += w[3];
2982 w = (u16 *)((ulong) w + 4); /* verify */
2983 }
2984 len += 8;
2985 if (len != 0 || byte_swapped != 0) {
2986 REDUCE;
2987 while ((len -= 2) >= 0)
2988 sum += *w++; /* verify */
2989 if (byte_swapped) {
2990 REDUCE;
2991 sum <<= 8;
2992 byte_swapped = 0;
2993 if (len == -1) {
2994 s_util.c[1] = *(char *) w;
2995 sum += s_util.s;
2996 len = 0;
2997 } else {
2998 len = -1;
2999 }
3000
3001 } else if (len == -1) {
3002 s_util.c[0] = *(char *) w;
3003 }
3004
3005 if (len == -1) {
3006 s_util.c[1] = 0;
3007 sum += s_util.s;
3008 }
3009 }
3010 REDUCE;
3011 return (ushort) sum;
3012 }
3013
3014 static int slic_rspqueue_init(struct adapter *adapter)
3015 {
3016 int i;
3017 struct slic_rspqueue *rspq = &adapter->rspqueue;
3018 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3019 u32 paddrh = 0;
3020
3021 ASSERT(adapter->state == ADAPT_DOWN);
3022 memset(rspq, 0, sizeof(struct slic_rspqueue));
3023
3024 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3025
3026 for (i = 0; i < rspq->num_pages; i++) {
3027 rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
3028 PAGE_SIZE,
3029 &rspq->paddr[i]);
3030 if (!rspq->vaddr[i]) {
3031 dev_err(&adapter->pcidev->dev,
3032 "pci_alloc_consistent failed\n");
3033 slic_rspqueue_free(adapter);
3034 return STATUS_FAILURE;
3035 }
3036 #ifndef CONFIG_X86_64
3037 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3038 (u32) rspq->vaddr[i]);
3039 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3040 (u32) rspq->paddr[i]);
3041 #endif
3042 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3043
3044 if (paddrh == 0) {
3045 slic_reg32_write(&slic_regs->slic_rbar,
3046 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3047 DONT_FLUSH);
3048 } else {
3049 slic_reg64_write(adapter, &slic_regs->slic_rbar64,
3050 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3051 &slic_regs->slic_addr_upper,
3052 paddrh, DONT_FLUSH);
3053 }
3054 }
3055 rspq->offset = 0;
3056 rspq->pageindex = 0;
3057 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3058 return STATUS_SUCCESS;
3059 }
3060
3061 static void slic_rspqueue_free(struct adapter *adapter)
3062 {
3063 int i;
3064 struct slic_rspqueue *rspq = &adapter->rspqueue;
3065
3066 for (i = 0; i < rspq->num_pages; i++) {
3067 if (rspq->vaddr[i]) {
3068 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3069 rspq->vaddr[i], rspq->paddr[i]);
3070 }
3071 rspq->vaddr[i] = NULL;
3072 rspq->paddr[i] = 0;
3073 }
3074 rspq->offset = 0;
3075 rspq->pageindex = 0;
3076 rspq->rspbuf = NULL;
3077 }
3078
3079 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3080 {
3081 struct slic_rspqueue *rspq = &adapter->rspqueue;
3082 struct slic_rspbuf *buf;
3083
3084 if (!(rspq->rspbuf->status))
3085 return NULL;
3086
3087 buf = rspq->rspbuf;
3088 #ifndef CONFIG_X86_64
3089 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3090 #endif
3091 ASSERT(buf->hosthandle);
3092 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3093 rspq->rspbuf++;
3094 #ifndef CONFIG_X86_64
3095 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3096 (u32) rspq->rspbuf);
3097 #endif
3098 } else {
3099 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3100 slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
3101 (rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3102 &adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3103 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3104 rspq->offset = 0;
3105 rspq->rspbuf = (struct slic_rspbuf *)
3106 rspq->vaddr[rspq->pageindex];
3107 #ifndef CONFIG_X86_64
3108 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3109 (u32) rspq->rspbuf);
3110 #endif
3111 }
3112 #ifndef CONFIG_X86_64
3113 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3114 #endif
3115 return buf;
3116 }
3117
3118 static void slic_cmdqmem_init(struct adapter *adapter)
3119 {
3120 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3121
3122 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3123 }
3124
3125 static void slic_cmdqmem_free(struct adapter *adapter)
3126 {
3127 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3128 int i;
3129
3130 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3131 if (cmdqmem->pages[i]) {
3132 pci_free_consistent(adapter->pcidev,
3133 PAGE_SIZE,
3134 (void *) cmdqmem->pages[i],
3135 cmdqmem->dma_pages[i]);
3136 }
3137 }
3138 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3139 }
3140
3141 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3142 {
3143 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3144 u32 *pageaddr;
3145
3146 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3147 return NULL;
3148 pageaddr = pci_alloc_consistent(adapter->pcidev,
3149 PAGE_SIZE,
3150 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3151 if (!pageaddr)
3152 return NULL;
3153 #ifndef CONFIG_X86_64
3154 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3155 #endif
3156 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3157 cmdqmem->pagecnt++;
3158 return pageaddr;
3159 }
3160
3161 static int slic_cmdq_init(struct adapter *adapter)
3162 {
3163 int i;
3164 u32 *pageaddr;
3165
3166 ASSERT(adapter->state == ADAPT_DOWN);
3167 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3168 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3169 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3170 spin_lock_init(&adapter->cmdq_all.lock.lock);
3171 spin_lock_init(&adapter->cmdq_free.lock.lock);
3172 spin_lock_init(&adapter->cmdq_done.lock.lock);
3173 slic_cmdqmem_init(adapter);
3174 adapter->slic_handle_ix = 1;
3175 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3176 pageaddr = slic_cmdqmem_addpage(adapter);
3177 #ifndef CONFIG_X86_64
3178 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3179 #endif
3180 if (!pageaddr) {
3181 slic_cmdq_free(adapter);
3182 return STATUS_FAILURE;
3183 }
3184 slic_cmdq_addcmdpage(adapter, pageaddr);
3185 }
3186 adapter->slic_handle_ix = 1;
3187
3188 return STATUS_SUCCESS;
3189 }
3190
3191 static void slic_cmdq_free(struct adapter *adapter)
3192 {
3193 struct slic_hostcmd *cmd;
3194
3195 cmd = adapter->cmdq_all.head;
3196 while (cmd) {
3197 if (cmd->busy) {
3198 struct sk_buff *tempskb;
3199
3200 tempskb = cmd->skb;
3201 if (tempskb) {
3202 cmd->skb = NULL;
3203 dev_kfree_skb_irq(tempskb);
3204 }
3205 }
3206 cmd = cmd->next_all;
3207 }
3208 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3209 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3210 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3211 slic_cmdqmem_free(adapter);
3212 }
3213
3214 static void slic_cmdq_reset(struct adapter *adapter)
3215 {
3216 struct slic_hostcmd *hcmd;
3217 struct sk_buff *skb;
3218 u32 outstanding;
3219
3220 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
3221 adapter->cmdq_free.lock.flags);
3222 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
3223 adapter->cmdq_done.lock.flags);
3224 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
3225 outstanding -= adapter->cmdq_free.count;
3226 hcmd = adapter->cmdq_all.head;
3227 while (hcmd) {
3228 if (hcmd->busy) {
3229 skb = hcmd->skb;
3230 ASSERT(skb);
3231 hcmd->busy = 0;
3232 hcmd->skb = NULL;
3233 dev_kfree_skb_irq(skb);
3234 }
3235 hcmd = hcmd->next_all;
3236 }
3237 adapter->cmdq_free.count = 0;
3238 adapter->cmdq_free.head = NULL;
3239 adapter->cmdq_free.tail = NULL;
3240 adapter->cmdq_done.count = 0;
3241 adapter->cmdq_done.head = NULL;
3242 adapter->cmdq_done.tail = NULL;
3243 adapter->cmdq_free.head = adapter->cmdq_all.head;
3244 hcmd = adapter->cmdq_all.head;
3245 while (hcmd) {
3246 adapter->cmdq_free.count++;
3247 hcmd->next = hcmd->next_all;
3248 hcmd = hcmd->next_all;
3249 }
3250 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
3251 dev_err(&adapter->netdev->dev,
3252 "free_count %d != all count %d\n",
3253 adapter->cmdq_free.count, adapter->cmdq_all.count);
3254 }
3255 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
3256 adapter->cmdq_done.lock.flags);
3257 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
3258 adapter->cmdq_free.lock.flags);
3259 }
3260
3261 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
3262 {
3263 struct slic_hostcmd *cmd;
3264 struct slic_hostcmd *prev;
3265 struct slic_hostcmd *tail;
3266 struct slic_cmdqueue *cmdq;
3267 int cmdcnt;
3268 void *cmdaddr;
3269 ulong phys_addr;
3270 u32 phys_addrl;
3271 u32 phys_addrh;
3272 struct slic_handle *pslic_handle;
3273
3274 cmdaddr = page;
3275 cmd = (struct slic_hostcmd *)cmdaddr;
3276 cmdcnt = 0;
3277
3278 phys_addr = virt_to_bus((void *)page);
3279 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
3280 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
3281
3282 prev = NULL;
3283 tail = cmd;
3284 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
3285 (adapter->slic_handle_ix < 256)) {
3286 /* Allocate and initialize a SLIC_HANDLE for this command */
3287 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
3288 if (pslic_handle == NULL)
3289 ASSERT(0);
3290 ASSERT(pslic_handle ==
3291 &adapter->slic_handles[pslic_handle->token.
3292 handle_index]);
3293 pslic_handle->type = SLIC_HANDLE_CMD;
3294 pslic_handle->address = (void *) cmd;
3295 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
3296 pslic_handle->other_handle = NULL;
3297 pslic_handle->next = NULL;
3298
3299 cmd->pslic_handle = pslic_handle;
3300 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
3301 cmd->busy = false;
3302 cmd->paddrl = phys_addrl;
3303 cmd->paddrh = phys_addrh;
3304 cmd->next_all = prev;
3305 cmd->next = prev;
3306 prev = cmd;
3307 phys_addrl += SLIC_HOSTCMD_SIZE;
3308 cmdaddr += SLIC_HOSTCMD_SIZE;
3309
3310 cmd = (struct slic_hostcmd *)cmdaddr;
3311 cmdcnt++;
3312 }
3313
3314 cmdq = &adapter->cmdq_all;
3315 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3316 tail->next_all = cmdq->head;
3317 cmdq->head = prev;
3318 cmdq = &adapter->cmdq_free;
3319 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3320 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
3321 tail->next = cmdq->head;
3322 cmdq->head = prev;
3323 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3324 }
3325
3326 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
3327 {
3328 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
3329 struct slic_hostcmd *cmd = NULL;
3330
3331 lock_and_retry:
3332 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
3333 retry:
3334 cmd = cmdq->head;
3335 if (cmd) {
3336 cmdq->head = cmd->next;
3337 cmdq->count--;
3338 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
3339 } else {
3340 slic_cmdq_getdone(adapter);
3341 cmd = cmdq->head;
3342 if (cmd) {
3343 goto retry;
3344 } else {
3345 u32 *pageaddr;
3346
3347 spin_unlock_irqrestore(&cmdq->lock.lock,
3348 cmdq->lock.flags);
3349 pageaddr = slic_cmdqmem_addpage(adapter);
3350 if (pageaddr) {
3351 slic_cmdq_addcmdpage(adapter, pageaddr);
3352 goto lock_and_retry;
3353 }
3354 }
3355 }
3356 return cmd;
3357 }
3358
3359 static void slic_cmdq_getdone(struct adapter *adapter)
3360 {
3361 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
3362 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
3363
3364 ASSERT(free_cmdq->head == NULL);
3365 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3366
3367 free_cmdq->head = done_cmdq->head;
3368 free_cmdq->count = done_cmdq->count;
3369 done_cmdq->head = NULL;
3370 done_cmdq->tail = NULL;
3371 done_cmdq->count = 0;
3372 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
3373 }
3374
3375 static void slic_cmdq_putdone_irq(struct adapter *adapter,
3376 struct slic_hostcmd *cmd)
3377 {
3378 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
3379
3380 spin_lock(&cmdq->lock.lock);
3381 cmd->busy = 0;
3382 cmd->next = cmdq->head;
3383 cmdq->head = cmd;
3384 cmdq->count++;
3385 if ((adapter->xmitq_full) && (cmdq->count > 10))
3386 netif_wake_queue(adapter->netdev);
3387 spin_unlock(&cmdq->lock.lock);
3388 }
3389
3390 static int slic_rcvqueue_init(struct adapter *adapter)
3391 {
3392 int i, count;
3393 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3394
3395 ASSERT(adapter->state == ADAPT_DOWN);
3396 rcvq->tail = NULL;
3397 rcvq->head = NULL;
3398 rcvq->size = SLIC_RCVQ_ENTRIES;
3399 rcvq->errors = 0;
3400 rcvq->count = 0;
3401 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
3402 count = 0;
3403 while (i) {
3404 count += slic_rcvqueue_fill(adapter);
3405 i--;
3406 }
3407 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
3408 slic_rcvqueue_free(adapter);
3409 return STATUS_FAILURE;
3410 }
3411 return STATUS_SUCCESS;
3412 }
3413
3414 static void slic_rcvqueue_free(struct adapter *adapter)
3415 {
3416 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3417 struct sk_buff *skb;
3418
3419 while (rcvq->head) {
3420 skb = rcvq->head;
3421 rcvq->head = rcvq->head->next;
3422 dev_kfree_skb(skb);
3423 }
3424 rcvq->tail = NULL;
3425 rcvq->head = NULL;
3426 rcvq->count = 0;
3427 }
3428
3429 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
3430 {
3431 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3432 struct sk_buff *skb;
3433 struct slic_rcvbuf *rcvbuf;
3434 int count;
3435
3436 if (rcvq->count) {
3437 skb = rcvq->head;
3438 rcvbuf = (struct slic_rcvbuf *)skb->head;
3439 ASSERT(rcvbuf);
3440
3441 if (rcvbuf->status & IRHDDR_SVALID) {
3442 rcvq->head = rcvq->head->next;
3443 skb->next = NULL;
3444 rcvq->count--;
3445 } else {
3446 skb = NULL;
3447 }
3448 } else {
3449 dev_err(&adapter->netdev->dev,
3450 "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count);
3451 skb = NULL;
3452 }
3453 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
3454 count = slic_rcvqueue_fill(adapter);
3455 if (!count)
3456 break;
3457 }
3458 if (skb)
3459 rcvq->errors = 0;
3460 return skb;
3461 }
3462
3463 static int slic_rcvqueue_fill(struct adapter *adapter)
3464 {
3465 void *paddr;
3466 u32 paddrl;
3467 u32 paddrh;
3468 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3469 int i = 0;
3470 struct device *dev = &adapter->netdev->dev;
3471
3472 while (i < SLIC_RCVQ_FILLENTRIES) {
3473 struct slic_rcvbuf *rcvbuf;
3474 struct sk_buff *skb;
3475 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3476 retry_rcvqfill:
3477 #endif
3478 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
3479 if (skb) {
3480 paddr = (void *)pci_map_single(adapter->pcidev,
3481 skb->data,
3482 SLIC_RCVQ_RCVBUFSIZE,
3483 PCI_DMA_FROMDEVICE);
3484 paddrl = SLIC_GET_ADDR_LOW(paddr);
3485 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3486
3487 skb->len = SLIC_RCVBUF_HEADSIZE;
3488 rcvbuf = (struct slic_rcvbuf *)skb->head;
3489 rcvbuf->status = 0;
3490 skb->next = NULL;
3491 #ifdef KLUDGE_FOR_4GB_BOUNDARY
3492 if (paddrl == 0) {
3493 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3494 __func__);
3495 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3496 dev_err(dev, " skbdata[%p]\n", skb->data);
3497 dev_err(dev, " skblen[%x]\n", skb->len);
3498 dev_err(dev, " paddr[%p]\n", paddr);
3499 dev_err(dev, " paddrl[%x]\n", paddrl);
3500 dev_err(dev, " paddrh[%x]\n", paddrh);
3501 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3502 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3503 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3504 dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
3505 goto retry_rcvqfill;
3506 }
3507 #else
3508 if (paddrl == 0) {
3509 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3510 __func__);
3511 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3512 dev_err(dev, " skbdata[%p]\n", skb->data);
3513 dev_err(dev, " skblen[%x]\n", skb->len);
3514 dev_err(dev, " paddr[%p]\n", paddr);
3515 dev_err(dev, " paddrl[%x]\n", paddrl);
3516 dev_err(dev, " paddrh[%x]\n", paddrh);
3517 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3518 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3519 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3520 dev_err(dev, "GIVE TO CARD ANYWAY\n");
3521 }
3522 #endif
3523 if (paddrh == 0) {
3524 slic_reg32_write(&adapter->slic_regs->slic_hbar,
3525 (u32)paddrl, DONT_FLUSH);
3526 } else {
3527 slic_reg64_write(adapter,
3528 &adapter->slic_regs->slic_hbar64,
3529 paddrl,
3530 &adapter->slic_regs->slic_addr_upper,
3531 paddrh, DONT_FLUSH);
3532 }
3533 if (rcvq->head)
3534 rcvq->tail->next = skb;
3535 else
3536 rcvq->head = skb;
3537 rcvq->tail = skb;
3538 rcvq->count++;
3539 i++;
3540 } else {
3541 dev_err(&adapter->netdev->dev,
3542 "slic_rcvqueue_fill could only get [%d] skbuffs\n",
3543 i);
3544 break;
3545 }
3546 }
3547 return i;
3548 }
3549
3550 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
3551 {
3552 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
3553 void *paddr;
3554 u32 paddrl;
3555 u32 paddrh;
3556 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
3557 struct device *dev;
3558
3559 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
3560
3561 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
3562 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
3563 rcvbuf->status = 0;
3564 skb->next = NULL;
3565
3566 paddrl = SLIC_GET_ADDR_LOW(paddr);
3567 paddrh = SLIC_GET_ADDR_HIGH(paddr);
3568
3569 if (paddrl == 0) {
3570 dev = &adapter->netdev->dev;
3571 dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
3572 __func__);
3573 dev_err(dev, "skb[%p] PROBLEM\n", skb);
3574 dev_err(dev, " skbdata[%p]\n", skb->data);
3575 dev_err(dev, " skblen[%x]\n", skb->len);
3576 dev_err(dev, " paddr[%p]\n", paddr);
3577 dev_err(dev, " paddrl[%x]\n", paddrl);
3578 dev_err(dev, " paddrh[%x]\n", paddrh);
3579 dev_err(dev, " rcvq->head[%p]\n", rcvq->head);
3580 dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail);
3581 dev_err(dev, " rcvq->count[%x]\n", rcvq->count);
3582 }
3583 if (paddrh == 0) {
3584 slic_reg32_write(&adapter->slic_regs->slic_hbar, (u32)paddrl,
3585 DONT_FLUSH);
3586 } else {
3587 slic_reg64_write(adapter, &adapter->slic_regs->slic_hbar64,
3588 paddrl, &adapter->slic_regs->slic_addr_upper,
3589 paddrh, DONT_FLUSH);
3590 }
3591 if (rcvq->head)
3592 rcvq->tail->next = skb;
3593 else
3594 rcvq->head = skb;
3595 rcvq->tail = skb;
3596 rcvq->count++;
3597 return rcvq->count;
3598 }
3599
3600 static int slic_debug_card_show(struct seq_file *seq, void *v)
3601 {
3602 #ifdef MOOKTODO
3603 int i;
3604 struct sliccard *card = seq->private;
3605 struct slic_config *config = &card->config;
3606 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
3607 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
3608 #endif
3609
3610 seq_printf(seq, "driver_version : %s\n", slic_proc_version);
3611 seq_printf(seq, "Microcode versions: \n");
3612 seq_printf(seq, " Gigabit (gb) : %s %s\n",
3613 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
3614 seq_printf(seq, " Gigabit Receiver : %s %s\n",
3615 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
3616 seq_printf(seq, "Vendor : %s\n", slic_vendor);
3617 seq_printf(seq, "Product Name : %s\n", slic_product_name);
3618 #ifdef MOOKTODO
3619 seq_printf(seq, "VendorId : %4.4X\n",
3620 config->VendorId);
3621 seq_printf(seq, "DeviceId : %4.4X\n",
3622 config->DeviceId);
3623 seq_printf(seq, "RevisionId : %2.2x\n",
3624 config->RevisionId);
3625 seq_printf(seq, "Bus # : %d\n", card->busnumber);
3626 seq_printf(seq, "Device # : %d\n", card->slotnumber);
3627 seq_printf(seq, "Interfaces : %d\n", card->card_size);
3628 seq_printf(seq, " Initialized : %d\n",
3629 card->adapters_activated);
3630 seq_printf(seq, " Allocated : %d\n",
3631 card->adapters_allocated);
3632 ASSERT(card->card_size <= SLIC_NBR_MACS);
3633 for (i = 0; i < card->card_size; i++) {
3634 seq_printf(seq,
3635 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
3636 i, config->macinfo[i].macaddrA[0],
3637 config->macinfo[i].macaddrA[1],
3638 config->macinfo[i].macaddrA[2],
3639 config->macinfo[i].macaddrA[3],
3640 config->macinfo[i].macaddrA[4],
3641 config->macinfo[i].macaddrA[5]);
3642 }
3643 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
3644 seq_printf(seq, " -------------------------------\n");
3645 for (i = 0; i < card->adapters_allocated; i++) {
3646 struct adapter *adapter;
3647
3648 adapter = card->adapter[i];
3649 if (adapter) {
3650 seq_printf(seq,
3651 " %d %d %s %s %s 0x%X\n",
3652 adapter->physport, adapter->state,
3653 SLIC_LINKSTATE(adapter->linkstate),
3654 SLIC_DUPLEX(adapter->linkduplex),
3655 SLIC_SPEED(adapter->linkspeed),
3656 (uint) adapter->irq);
3657 }
3658 }
3659 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
3660 seq_printf(seq, "RcvQ max entries : %4.4X\n",
3661 SLIC_RCVQ_ENTRIES);
3662 seq_printf(seq, "Ping Status : %8.8X\n",
3663 card->pingstatus);
3664 seq_printf(seq, "Minimum grant : %2.2x\n",
3665 config->MinGrant);
3666 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
3667 seq_printf(seq, "PciStatus : %4.4x\n",
3668 config->Pcistatus);
3669 seq_printf(seq, "Debug Device Id : %4.4x\n",
3670 config->DbgDevId);
3671 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
3672 config->DramRomFn);
3673 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
3674 config->NetIntPin1);
3675 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
3676 config->NetIntPin1);
3677 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
3678 config->NetIntPin1);
3679 seq_printf(seq, "PM capabilities : %4.4X\n",
3680 config->PMECapab);
3681 seq_printf(seq, "Network Clock Controls : %4.4X\n",
3682 config->NwClkCtrls);
3683
3684 switch (config->FruFormat) {
3685 case ATK_FRU_FORMAT:
3686 {
3687 seq_printf(seq,
3688 "Vendor : Alacritech, Inc.\n");
3689 seq_printf(seq,
3690 "Assembly # : %c%c%c%c%c%c\n",
3691 fru[0], fru[1], fru[2], fru[3], fru[4],
3692 fru[5]);
3693 seq_printf(seq,
3694 "Revision # : %c%c\n",
3695 fru[6], fru[7]);
3696
3697 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
3698 seq_printf(seq,
3699 "Serial # : "
3700 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
3701 fru[8], fru[9], fru[10],
3702 fru[11], fru[12], fru[13],
3703 fru[16], fru[17], fru[18],
3704 fru[19], fru[20], fru[21]);
3705 } else {
3706 seq_printf(seq,
3707 "Serial # : "
3708 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
3709 fru[8], fru[9], fru[10],
3710 fru[11], fru[12], fru[13],
3711 fru[14], fru[15], fru[16],
3712 fru[17], fru[18], fru[19],
3713 fru[20], fru[21]);
3714 }
3715 break;
3716 }
3717
3718 default:
3719 {
3720 seq_printf(seq,
3721 "Vendor : Alacritech, Inc.\n");
3722 seq_printf(seq,
3723 "Serial # : Empty FRU\n");
3724 break;
3725 }
3726 }
3727
3728 switch (config->OEMFruFormat) {
3729 case VENDOR1_FRU_FORMAT:
3730 {
3731 seq_printf(seq, "FRU Information:\n");
3732 seq_printf(seq, " Commodity # : %c\n",
3733 oemfru[0]);
3734 seq_printf(seq,
3735 " Assembly # : %c%c%c%c\n",
3736 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
3737 seq_printf(seq,
3738 " Revision # : %c%c\n",
3739 oemfru[5], oemfru[6]);
3740 seq_printf(seq,
3741 " Supplier # : %c%c\n",
3742 oemfru[7], oemfru[8]);
3743 seq_printf(seq,
3744 " Date : %c%c\n",
3745 oemfru[9], oemfru[10]);
3746 seq_sprintf(seq,
3747 " Sequence # : %c%c%c\n",
3748 oemfru[11], oemfru[12], oemfru[13]);
3749 break;
3750 }
3751
3752 case VENDOR2_FRU_FORMAT:
3753 {
3754 seq_printf(seq, "FRU Information:\n");
3755 seq_printf(seq,
3756 " Part # : "
3757 "%c%c%c%c%c%c%c%c\n",
3758 oemfru[0], oemfru[1], oemfru[2],
3759 oemfru[3], oemfru[4], oemfru[5],
3760 oemfru[6], oemfru[7]);
3761 seq_printf(seq,
3762 " Supplier # : %c%c%c%c%c\n",
3763 oemfru[8], oemfru[9], oemfru[10],
3764 oemfru[11], oemfru[12]);
3765 seq_printf(seq,
3766 " Date : %c%c%c\n",
3767 oemfru[13], oemfru[14], oemfru[15]);
3768 seq_sprintf(seq,
3769 " Sequence # : %c%c%c%c\n",
3770 oemfru[16], oemfru[17], oemfru[18],
3771 oemfru[19]);
3772 break;
3773 }
3774
3775 case VENDOR3_FRU_FORMAT:
3776 {
3777 seq_printf(seq, "FRU Information:\n");
3778 }
3779
3780 case VENDOR4_FRU_FORMAT:
3781 {
3782 seq_printf(seq, "FRU Information:\n");
3783 seq_printf(seq,
3784 " FRU Number : "
3785 "%c%c%c%c%c%c%c%c\n",
3786 oemfru[0], oemfru[1], oemfru[2],
3787 oemfru[3], oemfru[4], oemfru[5],
3788 oemfru[6], oemfru[7]);
3789 seq_sprintf(seq,
3790 " Part Number : "
3791 "%c%c%c%c%c%c%c%c\n",
3792 oemfru[8], oemfru[9], oemfru[10],
3793 oemfru[11], oemfru[12], oemfru[13],
3794 oemfru[14], oemfru[15]);
3795 seq_printf(seq,
3796 " EC Level : "
3797 "%c%c%c%c%c%c%c%c\n",
3798 oemfru[16], oemfru[17], oemfru[18],
3799 oemfru[19], oemfru[20], oemfru[21],
3800 oemfru[22], oemfru[23]);
3801 break;
3802 }
3803
3804 default:
3805 break;
3806 }
3807 #endif
3808
3809 return 0;
3810 }
3811
3812 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
3813 {
3814 struct adapter *adapter = seq->private;
3815
3816 if ((adapter->netdev) && (adapter->netdev->name)) {
3817 seq_printf(seq, "info: interface : %s\n",
3818 adapter->netdev->name);
3819 }
3820 seq_printf(seq, "info: status : %s\n",
3821 SLIC_LINKSTATE(adapter->linkstate));
3822 seq_printf(seq, "info: port : %d\n",
3823 adapter->physport);
3824 seq_printf(seq, "info: speed : %s\n",
3825 SLIC_SPEED(adapter->linkspeed));
3826 seq_printf(seq, "info: duplex : %s\n",
3827 SLIC_DUPLEX(adapter->linkduplex));
3828 seq_printf(seq, "info: irq : 0x%X\n",
3829 (uint) adapter->irq);
3830 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
3831 adapter->card->loadlevel_current);
3832 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
3833 SLIC_RCVQ_ENTRIES);
3834 seq_printf(seq, "info: RcvQ current : %4.4X\n",
3835 adapter->rcvqueue.count);
3836 seq_printf(seq, "rx stats: packets : %8.8lX\n",
3837 adapter->stats.rx_packets);
3838 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
3839 adapter->stats.rx_bytes);
3840 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
3841 adapter->rcv_broadcasts);
3842 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
3843 adapter->rcv_multicasts);
3844 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
3845 adapter->rcv_unicasts);
3846 seq_printf(seq, "rx stats: errors : %8.8X\n",
3847 (u32) adapter->slic_stats.iface.rcv_errors);
3848 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
3849 (u32) adapter->slic_stats.iface.rcv_discards);
3850 seq_printf(seq, "rx stats: drops : %8.8X\n",
3851 (u32) adapter->rcv_drops);
3852 seq_printf(seq, "tx stats: packets : %8.8lX\n",
3853 adapter->stats.tx_packets);
3854 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
3855 adapter->stats.tx_bytes);
3856 seq_printf(seq, "tx stats: errors : %8.8X\n",
3857 (u32) adapter->slic_stats.iface.xmt_errors);
3858 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
3859 adapter->stats.multicast);
3860 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
3861 (u32) adapter->slic_stats.iface.xmit_collisions);
3862 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
3863 adapter->max_isr_rcvs);
3864 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
3865 adapter->rcv_interrupt_yields);
3866 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
3867 adapter->max_isr_xmits);
3868 seq_printf(seq, "perf: error interrupts : %8.8X\n",
3869 adapter->error_interrupts);
3870 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
3871 adapter->error_rmiss_interrupts);
3872 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
3873 adapter->rcv_interrupts);
3874 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
3875 adapter->xmit_interrupts);
3876 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
3877 adapter->linkevent_interrupts);
3878 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
3879 adapter->upr_interrupts);
3880 seq_printf(seq, "perf: interrupt count : %8.8X\n",
3881 adapter->num_isrs);
3882 seq_printf(seq, "perf: false interrupts : %8.8X\n",
3883 adapter->false_interrupts);
3884 seq_printf(seq, "perf: All register writes : %8.8X\n",
3885 adapter->all_reg_writes);
3886 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
3887 adapter->icr_reg_writes);
3888 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
3889 adapter->isr_reg_writes);
3890 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
3891 adapter->if_events.oflow802);
3892 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
3893 adapter->if_events.Tprtoflow);
3894 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
3895 adapter->if_events.uflow802);
3896 seq_printf(seq, "ifevents: receive early : %8.8X\n",
3897 adapter->if_events.rcvearly);
3898 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
3899 adapter->if_events.Bufov);
3900 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
3901 adapter->if_events.Carre);
3902 seq_printf(seq, "ifevents: Long : %8.8X\n",
3903 adapter->if_events.Longe);
3904 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
3905 adapter->if_events.Invp);
3906 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
3907 adapter->if_events.Crc);
3908 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
3909 adapter->if_events.Drbl);
3910 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
3911 adapter->if_events.Code);
3912 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
3913 adapter->if_events.TpCsum);
3914 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
3915 adapter->if_events.TpHlen);
3916 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
3917 adapter->if_events.IpCsum);
3918 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
3919 adapter->if_events.IpLen);
3920 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
3921 adapter->if_events.IpHlen);
3922
3923 return 0;
3924 }
3925 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
3926 {
3927 return single_open(file, slic_debug_adapter_show, inode->i_private);
3928 }
3929
3930 static int slic_debug_card_open(struct inode *inode, struct file *file)
3931 {
3932 return single_open(file, slic_debug_card_show, inode->i_private);
3933 }
3934
3935 static const struct file_operations slic_debug_adapter_fops = {
3936 .owner = THIS_MODULE,
3937 .open = slic_debug_adapter_open,
3938 .read = seq_read,
3939 .llseek = seq_lseek,
3940 .release = single_release,
3941 };
3942
3943 static const struct file_operations slic_debug_card_fops = {
3944 .owner = THIS_MODULE,
3945 .open = slic_debug_card_open,
3946 .read = seq_read,
3947 .llseek = seq_lseek,
3948 .release = single_release,
3949 };
3950
3951 static void slic_debug_adapter_create(struct adapter *adapter)
3952 {
3953 struct dentry *d;
3954 char name[7];
3955 struct sliccard *card = adapter->card;
3956
3957 if (!card->debugfs_dir)
3958 return;
3959
3960 sprintf(name, "port%d", adapter->port);
3961 d = debugfs_create_file(name, S_IRUGO,
3962 card->debugfs_dir, adapter,
3963 &slic_debug_adapter_fops);
3964 if (!d || IS_ERR(d))
3965 pr_info(PFX "%s: debugfs create failed\n", name);
3966 else
3967 adapter->debugfs_entry = d;
3968 }
3969
3970 static void slic_debug_adapter_destroy(struct adapter *adapter)
3971 {
3972 if (adapter->debugfs_entry) {
3973 debugfs_remove(adapter->debugfs_entry);
3974 adapter->debugfs_entry = NULL;
3975 }
3976 }
3977
3978 static void slic_debug_card_create(struct sliccard *card)
3979 {
3980 struct dentry *d;
3981 char name[IFNAMSIZ];
3982
3983 snprintf(name, sizeof(name), "slic%d", card->cardnum);
3984 d = debugfs_create_dir(name, slic_debugfs);
3985 if (!d || IS_ERR(d))
3986 pr_info(PFX "%s: debugfs create dir failed\n",
3987 name);
3988 else {
3989 card->debugfs_dir = d;
3990 d = debugfs_create_file("cardinfo", S_IRUGO,
3991 slic_debugfs, card,
3992 &slic_debug_card_fops);
3993 if (!d || IS_ERR(d))
3994 pr_info(PFX "%s: debugfs create failed\n",
3995 name);
3996 else
3997 card->debugfs_cardinfo = d;
3998 }
3999 }
4000
4001 static void slic_debug_card_destroy(struct sliccard *card)
4002 {
4003 int i;
4004
4005 for (i = 0; i < card->card_size; i++) {
4006 struct adapter *adapter;
4007
4008 adapter = card->adapter[i];
4009 if (adapter)
4010 slic_debug_adapter_destroy(adapter);
4011 }
4012 if (card->debugfs_cardinfo) {
4013 debugfs_remove(card->debugfs_cardinfo);
4014 card->debugfs_cardinfo = NULL;
4015 }
4016 if (card->debugfs_dir) {
4017 debugfs_remove(card->debugfs_dir);
4018 card->debugfs_dir = NULL;
4019 }
4020 }
4021
4022 static void slic_debug_init(void)
4023 {
4024 struct dentry *ent;
4025
4026 ent = debugfs_create_dir("slic", NULL);
4027 if (!ent || IS_ERR(ent)) {
4028 pr_info(PFX "debugfs create directory failed\n");
4029 return;
4030 }
4031
4032 slic_debugfs = ent;
4033 }
4034
4035 static void slic_debug_cleanup(void)
4036 {
4037 if (slic_debugfs) {
4038 debugfs_remove(slic_debugfs);
4039 slic_debugfs = NULL;
4040 }
4041 }
4042
4043 /******************************************************************************/
4044 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
4045 /******************************************************************************/
4046
4047 static struct pci_driver slic_driver = {
4048 .name = DRV_NAME,
4049 .id_table = slic_pci_tbl,
4050 .probe = slic_entry_probe,
4051 .remove = __devexit_p(slic_entry_remove),
4052 };
4053
4054 static int __init slic_module_init(void)
4055 {
4056 slic_init_driver();
4057
4058 if (debug >= 0 && slic_debug != debug)
4059 printk(KERN_DEBUG KBUILD_MODNAME ": debug level is %d.\n",
4060 debug);
4061 if (debug >= 0)
4062 slic_debug = debug;
4063
4064 return pci_register_driver(&slic_driver);
4065 }
4066
4067 static void __exit slic_module_cleanup(void)
4068 {
4069 pci_unregister_driver(&slic_driver);
4070 slic_debug_cleanup();
4071 }
4072
4073 module_init(slic_module_init);
4074 module_exit(slic_module_cleanup);
Linux for Ginger Game Console