2 * wm8350.c -- WM8350 ALSA SoC audio driver
4 * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/wm8350/audio.h>
20 #include <linux/mfd/wm8350/core.h>
21 #include <linux/regulator/consumer.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
32 #define WM8350_OUTn_0dB 0x39
34 #define WM8350_RAMP_NONE 0
35 #define WM8350_RAMP_UP 1
36 #define WM8350_RAMP_DOWN 2
38 /* We only include the analogue supplies here; the digital supplies
39 * need to be available well before this driver can be probed.
41 static const char *supply_names
[] = {
46 struct wm8350_output
{
54 struct wm8350_jack_data
{
55 struct snd_soc_jack
*jack
;
60 struct snd_soc_codec codec
;
61 struct wm8350_output out1
;
62 struct wm8350_output out2
;
63 struct wm8350_jack_data hpl
;
64 struct wm8350_jack_data hpr
;
65 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
70 static unsigned int wm8350_codec_cache_read(struct snd_soc_codec
*codec
,
73 struct wm8350
*wm8350
= codec
->control_data
;
74 return wm8350
->reg_cache
[reg
];
77 static unsigned int wm8350_codec_read(struct snd_soc_codec
*codec
,
80 struct wm8350
*wm8350
= codec
->control_data
;
81 return wm8350_reg_read(wm8350
, reg
);
84 static int wm8350_codec_write(struct snd_soc_codec
*codec
, unsigned int reg
,
87 struct wm8350
*wm8350
= codec
->control_data
;
88 return wm8350_reg_write(wm8350
, reg
, value
);
92 * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
94 static inline int wm8350_out1_ramp_step(struct snd_soc_codec
*codec
)
96 struct wm8350_data
*wm8350_data
= codec
->private_data
;
97 struct wm8350_output
*out1
= &wm8350_data
->out1
;
98 struct wm8350
*wm8350
= codec
->control_data
;
99 int left_complete
= 0, right_complete
= 0;
103 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
);
104 val
= (reg
& WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
106 if (out1
->ramp
== WM8350_RAMP_UP
) {
108 if (val
< out1
->left_vol
) {
110 reg
&= ~WM8350_OUT1L_VOL_MASK
;
111 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
112 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
115 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
119 reg
&= ~WM8350_OUT1L_VOL_MASK
;
120 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
121 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
128 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
);
129 val
= (reg
& WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
130 if (out1
->ramp
== WM8350_RAMP_UP
) {
132 if (val
< out1
->right_vol
) {
134 reg
&= ~WM8350_OUT1R_VOL_MASK
;
135 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
136 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
139 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
143 reg
&= ~WM8350_OUT1R_VOL_MASK
;
144 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
145 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
150 /* only hit the update bit if either volume has changed this step */
151 if (!left_complete
|| !right_complete
)
152 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
, WM8350_OUT1_VU
);
154 return left_complete
& right_complete
;
158 * Ramp OUT2 PGA volume to minimise pops at stream startup and shutdown.
160 static inline int wm8350_out2_ramp_step(struct snd_soc_codec
*codec
)
162 struct wm8350_data
*wm8350_data
= codec
->private_data
;
163 struct wm8350_output
*out2
= &wm8350_data
->out2
;
164 struct wm8350
*wm8350
= codec
->control_data
;
165 int left_complete
= 0, right_complete
= 0;
169 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
);
170 val
= (reg
& WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
171 if (out2
->ramp
== WM8350_RAMP_UP
) {
173 if (val
< out2
->left_vol
) {
175 reg
&= ~WM8350_OUT2L_VOL_MASK
;
176 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
177 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
180 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
184 reg
&= ~WM8350_OUT2L_VOL_MASK
;
185 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
186 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
193 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
);
194 val
= (reg
& WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
195 if (out2
->ramp
== WM8350_RAMP_UP
) {
197 if (val
< out2
->right_vol
) {
199 reg
&= ~WM8350_OUT2R_VOL_MASK
;
200 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
201 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
204 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
208 reg
&= ~WM8350_OUT2R_VOL_MASK
;
209 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
210 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
215 /* only hit the update bit if either volume has changed this step */
216 if (!left_complete
|| !right_complete
)
217 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
, WM8350_OUT2_VU
);
219 return left_complete
& right_complete
;
223 * This work ramps both output PGAs at stream start/stop time to
224 * minimise pop associated with DAPM power switching.
225 * It's best to enable Zero Cross when ramping occurs to minimise any
228 static void wm8350_pga_work(struct work_struct
*work
)
230 struct snd_soc_codec
*codec
=
231 container_of(work
, struct snd_soc_codec
, delayed_work
.work
);
232 struct wm8350_data
*wm8350_data
= codec
->private_data
;
233 struct wm8350_output
*out1
= &wm8350_data
->out1
,
234 *out2
= &wm8350_data
->out2
;
235 int i
, out1_complete
, out2_complete
;
237 /* do we need to ramp at all ? */
238 if (out1
->ramp
== WM8350_RAMP_NONE
&& out2
->ramp
== WM8350_RAMP_NONE
)
241 /* PGA volumes have 6 bits of resolution to ramp */
242 for (i
= 0; i
<= 63; i
++) {
243 out1_complete
= 1, out2_complete
= 1;
244 if (out1
->ramp
!= WM8350_RAMP_NONE
)
245 out1_complete
= wm8350_out1_ramp_step(codec
);
246 if (out2
->ramp
!= WM8350_RAMP_NONE
)
247 out2_complete
= wm8350_out2_ramp_step(codec
);
249 /* ramp finished ? */
250 if (out1_complete
&& out2_complete
)
253 /* we need to delay longer on the up ramp */
254 if (out1
->ramp
== WM8350_RAMP_UP
||
255 out2
->ramp
== WM8350_RAMP_UP
) {
256 /* delay is longer over 0dB as increases are larger */
257 if (i
>= WM8350_OUTn_0dB
)
258 schedule_timeout_interruptible(msecs_to_jiffies
261 schedule_timeout_interruptible(msecs_to_jiffies
264 udelay(50); /* doesn't matter if we delay longer */
267 out1
->ramp
= WM8350_RAMP_NONE
;
268 out2
->ramp
= WM8350_RAMP_NONE
;
275 static int pga_event(struct snd_soc_dapm_widget
*w
,
276 struct snd_kcontrol
*kcontrol
, int event
)
278 struct snd_soc_codec
*codec
= w
->codec
;
279 struct wm8350_data
*wm8350_data
= codec
->private_data
;
280 struct wm8350_output
*out
;
285 out
= &wm8350_data
->out1
;
289 out
= &wm8350_data
->out2
;
298 case SND_SOC_DAPM_POST_PMU
:
299 out
->ramp
= WM8350_RAMP_UP
;
302 if (!delayed_work_pending(&codec
->delayed_work
))
303 schedule_delayed_work(&codec
->delayed_work
,
304 msecs_to_jiffies(1));
307 case SND_SOC_DAPM_PRE_PMD
:
308 out
->ramp
= WM8350_RAMP_DOWN
;
311 if (!delayed_work_pending(&codec
->delayed_work
))
312 schedule_delayed_work(&codec
->delayed_work
,
313 msecs_to_jiffies(1));
320 static int wm8350_put_volsw_2r_vu(struct snd_kcontrol
*kcontrol
,
321 struct snd_ctl_elem_value
*ucontrol
)
323 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
324 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
325 struct wm8350_output
*out
= NULL
;
326 struct soc_mixer_control
*mc
=
327 (struct soc_mixer_control
*)kcontrol
->private_value
;
329 unsigned int reg
= mc
->reg
;
332 /* For OUT1 and OUT2 we shadow the values and only actually write
333 * them out when active in order to ensure the amplifier comes on
334 * as quietly as possible. */
336 case WM8350_LOUT1_VOLUME
:
337 out
= &wm8350_priv
->out1
;
339 case WM8350_LOUT2_VOLUME
:
340 out
= &wm8350_priv
->out2
;
347 out
->left_vol
= ucontrol
->value
.integer
.value
[0];
348 out
->right_vol
= ucontrol
->value
.integer
.value
[1];
353 ret
= snd_soc_put_volsw_2r(kcontrol
, ucontrol
);
357 /* now hit the volume update bits (always bit 8) */
358 val
= wm8350_codec_read(codec
, reg
);
359 wm8350_codec_write(codec
, reg
, val
| WM8350_OUT1_VU
);
363 static int wm8350_get_volsw_2r(struct snd_kcontrol
*kcontrol
,
364 struct snd_ctl_elem_value
*ucontrol
)
366 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
367 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
368 struct wm8350_output
*out1
= &wm8350_priv
->out1
;
369 struct wm8350_output
*out2
= &wm8350_priv
->out2
;
370 struct soc_mixer_control
*mc
=
371 (struct soc_mixer_control
*)kcontrol
->private_value
;
372 unsigned int reg
= mc
->reg
;
374 /* If these are cached registers use the cache */
376 case WM8350_LOUT1_VOLUME
:
377 ucontrol
->value
.integer
.value
[0] = out1
->left_vol
;
378 ucontrol
->value
.integer
.value
[1] = out1
->right_vol
;
381 case WM8350_LOUT2_VOLUME
:
382 ucontrol
->value
.integer
.value
[0] = out2
->left_vol
;
383 ucontrol
->value
.integer
.value
[1] = out2
->right_vol
;
390 return snd_soc_get_volsw_2r(kcontrol
, ucontrol
);
393 /* double control with volume update */
394 #define SOC_WM8350_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, \
395 xinvert, tlv_array) \
396 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
397 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
398 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
399 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
400 .tlv.p = (tlv_array), \
401 .info = snd_soc_info_volsw_2r, \
402 .get = wm8350_get_volsw_2r, .put = wm8350_put_volsw_2r_vu, \
403 .private_value = (unsigned long)&(struct soc_mixer_control) \
404 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
405 .rshift = xshift, .max = xmax, .invert = xinvert}, }
407 static const char *wm8350_deemp
[] = { "None", "32kHz", "44.1kHz", "48kHz" };
408 static const char *wm8350_pol
[] = { "Normal", "Inv R", "Inv L", "Inv L & R" };
409 static const char *wm8350_dacmutem
[] = { "Normal", "Soft" };
410 static const char *wm8350_dacmutes
[] = { "Fast", "Slow" };
411 static const char *wm8350_adcfilter
[] = { "None", "High Pass" };
412 static const char *wm8350_adchp
[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
413 static const char *wm8350_lr
[] = { "Left", "Right" };
415 static const struct soc_enum wm8350_enum
[] = {
416 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 4, 4, wm8350_deemp
),
417 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 0, 4, wm8350_pol
),
418 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 14, 2, wm8350_dacmutem
),
419 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 13, 2, wm8350_dacmutes
),
420 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 15, 2, wm8350_adcfilter
),
421 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 8, 4, wm8350_adchp
),
422 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 0, 4, wm8350_pol
),
423 SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME
, 15, 2, wm8350_lr
),
426 static DECLARE_TLV_DB_LINEAR(pre_amp_tlv
, -1200, 3525);
427 static DECLARE_TLV_DB_LINEAR(out_pga_tlv
, -5700, 600);
428 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv
, -7163, 36, 1);
429 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv
, -12700, 50, 1);
430 static DECLARE_TLV_DB_SCALE(out_mix_tlv
, -1500, 300, 1);
432 static const unsigned int capture_sd_tlv
[] = {
433 TLV_DB_RANGE_HEAD(2),
434 0, 12, TLV_DB_SCALE_ITEM(-3600, 300, 1),
435 13, 15, TLV_DB_SCALE_ITEM(0, 0, 0),
438 static const struct snd_kcontrol_new wm8350_snd_controls
[] = {
439 SOC_ENUM("Playback Deemphasis", wm8350_enum
[0]),
440 SOC_ENUM("Playback DAC Inversion", wm8350_enum
[1]),
441 SOC_WM8350_DOUBLE_R_TLV("Playback PCM Volume",
442 WM8350_DAC_DIGITAL_VOLUME_L
,
443 WM8350_DAC_DIGITAL_VOLUME_R
,
444 0, 255, 0, dac_pcm_tlv
),
445 SOC_ENUM("Playback PCM Mute Function", wm8350_enum
[2]),
446 SOC_ENUM("Playback PCM Mute Speed", wm8350_enum
[3]),
447 SOC_ENUM("Capture PCM Filter", wm8350_enum
[4]),
448 SOC_ENUM("Capture PCM HP Filter", wm8350_enum
[5]),
449 SOC_ENUM("Capture ADC Inversion", wm8350_enum
[6]),
450 SOC_WM8350_DOUBLE_R_TLV("Capture PCM Volume",
451 WM8350_ADC_DIGITAL_VOLUME_L
,
452 WM8350_ADC_DIGITAL_VOLUME_R
,
453 0, 255, 0, adc_pcm_tlv
),
454 SOC_DOUBLE_TLV("Capture Sidetone Volume",
456 8, 4, 15, 1, capture_sd_tlv
),
457 SOC_WM8350_DOUBLE_R_TLV("Capture Volume",
458 WM8350_LEFT_INPUT_VOLUME
,
459 WM8350_RIGHT_INPUT_VOLUME
,
460 2, 63, 0, pre_amp_tlv
),
461 SOC_DOUBLE_R("Capture ZC Switch",
462 WM8350_LEFT_INPUT_VOLUME
,
463 WM8350_RIGHT_INPUT_VOLUME
, 13, 1, 0),
464 SOC_SINGLE_TLV("Left Input Left Sidetone Volume",
465 WM8350_OUTPUT_LEFT_MIXER_VOLUME
, 1, 7, 0, out_mix_tlv
),
466 SOC_SINGLE_TLV("Left Input Right Sidetone Volume",
467 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
468 5, 7, 0, out_mix_tlv
),
469 SOC_SINGLE_TLV("Left Input Bypass Volume",
470 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
471 9, 7, 0, out_mix_tlv
),
472 SOC_SINGLE_TLV("Right Input Left Sidetone Volume",
473 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
474 1, 7, 0, out_mix_tlv
),
475 SOC_SINGLE_TLV("Right Input Right Sidetone Volume",
476 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
477 5, 7, 0, out_mix_tlv
),
478 SOC_SINGLE_TLV("Right Input Bypass Volume",
479 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
480 13, 7, 0, out_mix_tlv
),
481 SOC_SINGLE("Left Input Mixer +20dB Switch",
482 WM8350_INPUT_MIXER_VOLUME_L
, 0, 1, 0),
483 SOC_SINGLE("Right Input Mixer +20dB Switch",
484 WM8350_INPUT_MIXER_VOLUME_R
, 0, 1, 0),
485 SOC_SINGLE_TLV("Out4 Capture Volume",
486 WM8350_INPUT_MIXER_VOLUME
,
487 1, 7, 0, out_mix_tlv
),
488 SOC_WM8350_DOUBLE_R_TLV("Out1 Playback Volume",
491 2, 63, 0, out_pga_tlv
),
492 SOC_DOUBLE_R("Out1 Playback ZC Switch",
494 WM8350_ROUT1_VOLUME
, 13, 1, 0),
495 SOC_WM8350_DOUBLE_R_TLV("Out2 Playback Volume",
498 2, 63, 0, out_pga_tlv
),
499 SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8350_LOUT2_VOLUME
,
500 WM8350_ROUT2_VOLUME
, 13, 1, 0),
501 SOC_SINGLE("Out2 Right Invert Switch", WM8350_ROUT2_VOLUME
, 10, 1, 0),
502 SOC_SINGLE_TLV("Out2 Beep Volume", WM8350_BEEP_VOLUME
,
503 5, 7, 0, out_mix_tlv
),
505 SOC_DOUBLE_R("Out1 Playback Switch",
509 SOC_DOUBLE_R("Out2 Playback Switch",
519 /* Left Playback Mixer */
520 static const struct snd_kcontrol_new wm8350_left_play_mixer_controls
[] = {
521 SOC_DAPM_SINGLE("Playback Switch",
522 WM8350_LEFT_MIXER_CONTROL
, 11, 1, 0),
523 SOC_DAPM_SINGLE("Left Bypass Switch",
524 WM8350_LEFT_MIXER_CONTROL
, 2, 1, 0),
525 SOC_DAPM_SINGLE("Right Playback Switch",
526 WM8350_LEFT_MIXER_CONTROL
, 12, 1, 0),
527 SOC_DAPM_SINGLE("Left Sidetone Switch",
528 WM8350_LEFT_MIXER_CONTROL
, 0, 1, 0),
529 SOC_DAPM_SINGLE("Right Sidetone Switch",
530 WM8350_LEFT_MIXER_CONTROL
, 1, 1, 0),
533 /* Right Playback Mixer */
534 static const struct snd_kcontrol_new wm8350_right_play_mixer_controls
[] = {
535 SOC_DAPM_SINGLE("Playback Switch",
536 WM8350_RIGHT_MIXER_CONTROL
, 12, 1, 0),
537 SOC_DAPM_SINGLE("Right Bypass Switch",
538 WM8350_RIGHT_MIXER_CONTROL
, 3, 1, 0),
539 SOC_DAPM_SINGLE("Left Playback Switch",
540 WM8350_RIGHT_MIXER_CONTROL
, 11, 1, 0),
541 SOC_DAPM_SINGLE("Left Sidetone Switch",
542 WM8350_RIGHT_MIXER_CONTROL
, 0, 1, 0),
543 SOC_DAPM_SINGLE("Right Sidetone Switch",
544 WM8350_RIGHT_MIXER_CONTROL
, 1, 1, 0),
548 static const struct snd_kcontrol_new wm8350_out4_mixer_controls
[] = {
549 SOC_DAPM_SINGLE("Right Playback Switch",
550 WM8350_OUT4_MIXER_CONTROL
, 12, 1, 0),
551 SOC_DAPM_SINGLE("Left Playback Switch",
552 WM8350_OUT4_MIXER_CONTROL
, 11, 1, 0),
553 SOC_DAPM_SINGLE("Right Capture Switch",
554 WM8350_OUT4_MIXER_CONTROL
, 9, 1, 0),
555 SOC_DAPM_SINGLE("Out3 Playback Switch",
556 WM8350_OUT4_MIXER_CONTROL
, 2, 1, 0),
557 SOC_DAPM_SINGLE("Right Mixer Switch",
558 WM8350_OUT4_MIXER_CONTROL
, 1, 1, 0),
559 SOC_DAPM_SINGLE("Left Mixer Switch",
560 WM8350_OUT4_MIXER_CONTROL
, 0, 1, 0),
564 static const struct snd_kcontrol_new wm8350_out3_mixer_controls
[] = {
565 SOC_DAPM_SINGLE("Left Playback Switch",
566 WM8350_OUT3_MIXER_CONTROL
, 11, 1, 0),
567 SOC_DAPM_SINGLE("Left Capture Switch",
568 WM8350_OUT3_MIXER_CONTROL
, 8, 1, 0),
569 SOC_DAPM_SINGLE("Out4 Playback Switch",
570 WM8350_OUT3_MIXER_CONTROL
, 3, 1, 0),
571 SOC_DAPM_SINGLE("Left Mixer Switch",
572 WM8350_OUT3_MIXER_CONTROL
, 0, 1, 0),
575 /* Left Input Mixer */
576 static const struct snd_kcontrol_new wm8350_left_capt_mixer_controls
[] = {
577 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
578 WM8350_INPUT_MIXER_VOLUME_L
, 1, 7, 0, out_mix_tlv
),
579 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
580 WM8350_INPUT_MIXER_VOLUME_L
, 9, 7, 0, out_mix_tlv
),
581 SOC_DAPM_SINGLE("PGA Capture Switch",
582 WM8350_LEFT_INPUT_VOLUME
, 14, 1, 1),
585 /* Right Input Mixer */
586 static const struct snd_kcontrol_new wm8350_right_capt_mixer_controls
[] = {
587 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
588 WM8350_INPUT_MIXER_VOLUME_R
, 5, 7, 0, out_mix_tlv
),
589 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
590 WM8350_INPUT_MIXER_VOLUME_R
, 13, 7, 0, out_mix_tlv
),
591 SOC_DAPM_SINGLE("PGA Capture Switch",
592 WM8350_RIGHT_INPUT_VOLUME
, 14, 1, 1),
596 static const struct snd_kcontrol_new wm8350_left_mic_mixer_controls
[] = {
597 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 1, 1, 0),
598 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 0, 1, 0),
599 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 2, 1, 0),
602 /* Right Mic Mixer */
603 static const struct snd_kcontrol_new wm8350_right_mic_mixer_controls
[] = {
604 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 9, 1, 0),
605 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 8, 1, 0),
606 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 10, 1, 0),
610 static const struct snd_kcontrol_new wm8350_beep_switch_controls
=
611 SOC_DAPM_SINGLE("Switch", WM8350_BEEP_VOLUME
, 15, 1, 1);
613 /* Out4 Capture Mux */
614 static const struct snd_kcontrol_new wm8350_out4_capture_controls
=
615 SOC_DAPM_ENUM("Route", wm8350_enum
[7]);
617 static const struct snd_soc_dapm_widget wm8350_dapm_widgets
[] = {
619 SND_SOC_DAPM_PGA("IN3R PGA", WM8350_POWER_MGMT_2
, 11, 0, NULL
, 0),
620 SND_SOC_DAPM_PGA("IN3L PGA", WM8350_POWER_MGMT_2
, 10, 0, NULL
, 0),
621 SND_SOC_DAPM_PGA_E("Right Out2 PGA", WM8350_POWER_MGMT_3
, 3, 0, NULL
,
623 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
624 SND_SOC_DAPM_PGA_E("Left Out2 PGA", WM8350_POWER_MGMT_3
, 2, 0, NULL
, 0,
626 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
627 SND_SOC_DAPM_PGA_E("Right Out1 PGA", WM8350_POWER_MGMT_3
, 1, 0, NULL
,
629 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
630 SND_SOC_DAPM_PGA_E("Left Out1 PGA", WM8350_POWER_MGMT_3
, 0, 0, NULL
, 0,
632 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
634 SND_SOC_DAPM_MIXER("Right Capture Mixer", WM8350_POWER_MGMT_2
,
635 7, 0, &wm8350_right_capt_mixer_controls
[0],
636 ARRAY_SIZE(wm8350_right_capt_mixer_controls
)),
638 SND_SOC_DAPM_MIXER("Left Capture Mixer", WM8350_POWER_MGMT_2
,
639 6, 0, &wm8350_left_capt_mixer_controls
[0],
640 ARRAY_SIZE(wm8350_left_capt_mixer_controls
)),
642 SND_SOC_DAPM_MIXER("Out4 Mixer", WM8350_POWER_MGMT_2
, 5, 0,
643 &wm8350_out4_mixer_controls
[0],
644 ARRAY_SIZE(wm8350_out4_mixer_controls
)),
646 SND_SOC_DAPM_MIXER("Out3 Mixer", WM8350_POWER_MGMT_2
, 4, 0,
647 &wm8350_out3_mixer_controls
[0],
648 ARRAY_SIZE(wm8350_out3_mixer_controls
)),
650 SND_SOC_DAPM_MIXER("Right Playback Mixer", WM8350_POWER_MGMT_2
, 1, 0,
651 &wm8350_right_play_mixer_controls
[0],
652 ARRAY_SIZE(wm8350_right_play_mixer_controls
)),
654 SND_SOC_DAPM_MIXER("Left Playback Mixer", WM8350_POWER_MGMT_2
, 0, 0,
655 &wm8350_left_play_mixer_controls
[0],
656 ARRAY_SIZE(wm8350_left_play_mixer_controls
)),
658 SND_SOC_DAPM_MIXER("Left Mic Mixer", WM8350_POWER_MGMT_2
, 8, 0,
659 &wm8350_left_mic_mixer_controls
[0],
660 ARRAY_SIZE(wm8350_left_mic_mixer_controls
)),
662 SND_SOC_DAPM_MIXER("Right Mic Mixer", WM8350_POWER_MGMT_2
, 9, 0,
663 &wm8350_right_mic_mixer_controls
[0],
664 ARRAY_SIZE(wm8350_right_mic_mixer_controls
)),
666 /* virtual mixer for Beep and Out2R */
667 SND_SOC_DAPM_MIXER("Out2 Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
669 SND_SOC_DAPM_SWITCH("Beep", WM8350_POWER_MGMT_3
, 7, 0,
670 &wm8350_beep_switch_controls
),
672 SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
673 WM8350_POWER_MGMT_4
, 3, 0),
674 SND_SOC_DAPM_ADC("Left ADC", "Left Capture",
675 WM8350_POWER_MGMT_4
, 2, 0),
676 SND_SOC_DAPM_DAC("Right DAC", "Right Playback",
677 WM8350_POWER_MGMT_4
, 5, 0),
678 SND_SOC_DAPM_DAC("Left DAC", "Left Playback",
679 WM8350_POWER_MGMT_4
, 4, 0),
681 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8350_POWER_MGMT_1
, 4, 0),
683 SND_SOC_DAPM_MUX("Out4 Capture Channel", SND_SOC_NOPM
, 0, 0,
684 &wm8350_out4_capture_controls
),
686 SND_SOC_DAPM_OUTPUT("OUT1R"),
687 SND_SOC_DAPM_OUTPUT("OUT1L"),
688 SND_SOC_DAPM_OUTPUT("OUT2R"),
689 SND_SOC_DAPM_OUTPUT("OUT2L"),
690 SND_SOC_DAPM_OUTPUT("OUT3"),
691 SND_SOC_DAPM_OUTPUT("OUT4"),
693 SND_SOC_DAPM_INPUT("IN1RN"),
694 SND_SOC_DAPM_INPUT("IN1RP"),
695 SND_SOC_DAPM_INPUT("IN2R"),
696 SND_SOC_DAPM_INPUT("IN1LP"),
697 SND_SOC_DAPM_INPUT("IN1LN"),
698 SND_SOC_DAPM_INPUT("IN2L"),
699 SND_SOC_DAPM_INPUT("IN3R"),
700 SND_SOC_DAPM_INPUT("IN3L"),
703 static const struct snd_soc_dapm_route audio_map
[] = {
705 /* left playback mixer */
706 {"Left Playback Mixer", "Playback Switch", "Left DAC"},
707 {"Left Playback Mixer", "Left Bypass Switch", "IN3L PGA"},
708 {"Left Playback Mixer", "Right Playback Switch", "Right DAC"},
709 {"Left Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
710 {"Left Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
712 /* right playback mixer */
713 {"Right Playback Mixer", "Playback Switch", "Right DAC"},
714 {"Right Playback Mixer", "Right Bypass Switch", "IN3R PGA"},
715 {"Right Playback Mixer", "Left Playback Switch", "Left DAC"},
716 {"Right Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
717 {"Right Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
719 /* out4 playback mixer */
720 {"Out4 Mixer", "Right Playback Switch", "Right DAC"},
721 {"Out4 Mixer", "Left Playback Switch", "Left DAC"},
722 {"Out4 Mixer", "Right Capture Switch", "Right Capture Mixer"},
723 {"Out4 Mixer", "Out3 Playback Switch", "Out3 Mixer"},
724 {"Out4 Mixer", "Right Mixer Switch", "Right Playback Mixer"},
725 {"Out4 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
726 {"OUT4", NULL
, "Out4 Mixer"},
728 /* out3 playback mixer */
729 {"Out3 Mixer", "Left Playback Switch", "Left DAC"},
730 {"Out3 Mixer", "Left Capture Switch", "Left Capture Mixer"},
731 {"Out3 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
732 {"Out3 Mixer", "Out4 Playback Switch", "Out4 Mixer"},
733 {"OUT3", NULL
, "Out3 Mixer"},
736 {"Right Out2 PGA", NULL
, "Right Playback Mixer"},
737 {"Left Out2 PGA", NULL
, "Left Playback Mixer"},
738 {"OUT2L", NULL
, "Left Out2 PGA"},
739 {"OUT2R", NULL
, "Right Out2 PGA"},
742 {"Right Out1 PGA", NULL
, "Right Playback Mixer"},
743 {"Left Out1 PGA", NULL
, "Left Playback Mixer"},
744 {"OUT1L", NULL
, "Left Out1 PGA"},
745 {"OUT1R", NULL
, "Right Out1 PGA"},
748 {"Left ADC", NULL
, "Left Capture Mixer"},
749 {"Right ADC", NULL
, "Right Capture Mixer"},
751 /* Left capture mixer */
752 {"Left Capture Mixer", "L2 Capture Volume", "IN2L"},
753 {"Left Capture Mixer", "L3 Capture Volume", "IN3L PGA"},
754 {"Left Capture Mixer", "PGA Capture Switch", "Left Mic Mixer"},
755 {"Left Capture Mixer", NULL
, "Out4 Capture Channel"},
757 /* Right capture mixer */
758 {"Right Capture Mixer", "L2 Capture Volume", "IN2R"},
759 {"Right Capture Mixer", "L3 Capture Volume", "IN3R PGA"},
760 {"Right Capture Mixer", "PGA Capture Switch", "Right Mic Mixer"},
761 {"Right Capture Mixer", NULL
, "Out4 Capture Channel"},
764 {"IN3L PGA", NULL
, "IN3L"},
765 {"IN3R PGA", NULL
, "IN3R"},
768 {"Left Mic Mixer", "INN Capture Switch", "IN1LN"},
769 {"Left Mic Mixer", "INP Capture Switch", "IN1LP"},
770 {"Left Mic Mixer", "IN2 Capture Switch", "IN2L"},
772 /* Right Mic mixer */
773 {"Right Mic Mixer", "INN Capture Switch", "IN1RN"},
774 {"Right Mic Mixer", "INP Capture Switch", "IN1RP"},
775 {"Right Mic Mixer", "IN2 Capture Switch", "IN2R"},
778 {"Out4 Capture Channel", NULL
, "Out4 Mixer"},
781 {"Beep", NULL
, "IN3R PGA"},
784 static int wm8350_add_widgets(struct snd_soc_codec
*codec
)
788 ret
= snd_soc_dapm_new_controls(codec
,
790 ARRAY_SIZE(wm8350_dapm_widgets
));
792 dev_err(codec
->dev
, "dapm control register failed\n");
796 /* set up audio paths */
797 ret
= snd_soc_dapm_add_routes(codec
, audio_map
, ARRAY_SIZE(audio_map
));
799 dev_err(codec
->dev
, "DAPM route register failed\n");
803 return snd_soc_dapm_new_widgets(codec
);
806 static int wm8350_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
807 int clk_id
, unsigned int freq
, int dir
)
809 struct snd_soc_codec
*codec
= codec_dai
->codec
;
810 struct wm8350
*wm8350
= codec
->control_data
;
814 case WM8350_MCLK_SEL_MCLK
:
815 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
818 case WM8350_MCLK_SEL_PLL_MCLK
:
819 case WM8350_MCLK_SEL_PLL_DAC
:
820 case WM8350_MCLK_SEL_PLL_ADC
:
821 case WM8350_MCLK_SEL_PLL_32K
:
822 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
824 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
825 ~WM8350_FLL_CLK_SRC_MASK
;
826 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
, fll_4
| clk_id
);
831 if (dir
== WM8350_MCLK_DIR_OUT
)
832 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
835 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
841 static int wm8350_set_clkdiv(struct snd_soc_dai
*codec_dai
, int div_id
, int div
)
843 struct snd_soc_codec
*codec
= codec_dai
->codec
;
847 case WM8350_ADC_CLKDIV
:
848 val
= wm8350_codec_read(codec
, WM8350_ADC_DIVIDER
) &
849 ~WM8350_ADC_CLKDIV_MASK
;
850 wm8350_codec_write(codec
, WM8350_ADC_DIVIDER
, val
| div
);
852 case WM8350_DAC_CLKDIV
:
853 val
= wm8350_codec_read(codec
, WM8350_DAC_CLOCK_CONTROL
) &
854 ~WM8350_DAC_CLKDIV_MASK
;
855 wm8350_codec_write(codec
, WM8350_DAC_CLOCK_CONTROL
, val
| div
);
857 case WM8350_BCLK_CLKDIV
:
858 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
859 ~WM8350_BCLK_DIV_MASK
;
860 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
862 case WM8350_OPCLK_CLKDIV
:
863 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
864 ~WM8350_OPCLK_DIV_MASK
;
865 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
867 case WM8350_SYS_CLKDIV
:
868 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
869 ~WM8350_MCLK_DIV_MASK
;
870 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
872 case WM8350_DACLR_CLKDIV
:
873 val
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
874 ~WM8350_DACLRC_RATE_MASK
;
875 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, val
| div
);
877 case WM8350_ADCLR_CLKDIV
:
878 val
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
879 ~WM8350_ADCLRC_RATE_MASK
;
880 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, val
| div
);
889 static int wm8350_set_dai_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
891 struct snd_soc_codec
*codec
= codec_dai
->codec
;
892 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
893 ~(WM8350_AIF_BCLK_INV
| WM8350_AIF_LRCLK_INV
| WM8350_AIF_FMT_MASK
);
894 u16 master
= wm8350_codec_read(codec
, WM8350_AI_DAC_CONTROL
) &
896 u16 dac_lrc
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
898 u16 adc_lrc
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
901 /* set master/slave audio interface */
902 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
903 case SND_SOC_DAIFMT_CBM_CFM
:
904 master
|= WM8350_BCLK_MSTR
;
905 dac_lrc
|= WM8350_DACLRC_ENA
;
906 adc_lrc
|= WM8350_ADCLRC_ENA
;
908 case SND_SOC_DAIFMT_CBS_CFS
:
914 /* interface format */
915 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
916 case SND_SOC_DAIFMT_I2S
:
919 case SND_SOC_DAIFMT_RIGHT_J
:
921 case SND_SOC_DAIFMT_LEFT_J
:
924 case SND_SOC_DAIFMT_DSP_A
:
927 case SND_SOC_DAIFMT_DSP_B
:
928 iface
|= 0x3 << 8; /* lg not sure which mode */
934 /* clock inversion */
935 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
936 case SND_SOC_DAIFMT_NB_NF
:
938 case SND_SOC_DAIFMT_IB_IF
:
939 iface
|= WM8350_AIF_LRCLK_INV
| WM8350_AIF_BCLK_INV
;
941 case SND_SOC_DAIFMT_IB_NF
:
942 iface
|= WM8350_AIF_BCLK_INV
;
944 case SND_SOC_DAIFMT_NB_IF
:
945 iface
|= WM8350_AIF_LRCLK_INV
;
951 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
952 wm8350_codec_write(codec
, WM8350_AI_DAC_CONTROL
, master
);
953 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, dac_lrc
);
954 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, adc_lrc
);
958 static int wm8350_pcm_trigger(struct snd_pcm_substream
*substream
,
959 int cmd
, struct snd_soc_dai
*codec_dai
)
961 struct snd_soc_codec
*codec
= codec_dai
->codec
;
962 int master
= wm8350_codec_cache_read(codec
, WM8350_AI_DAC_CONTROL
) &
966 /* Check that the DACs or ADCs are enabled since they are
967 * required for LRC in master mode. The DACs or ADCs need a
968 * valid audio path i.e. pin -> ADC or DAC -> pin before
969 * the LRC will be enabled in master mode. */
970 if (!master
|| cmd
!= SNDRV_PCM_TRIGGER_START
)
973 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
) {
974 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
975 (WM8350_ADCR_ENA
| WM8350_ADCL_ENA
);
977 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
978 (WM8350_DACR_ENA
| WM8350_DACL_ENA
);
983 "%s: invalid audio path - no clocks available\n",
990 static int wm8350_pcm_hw_params(struct snd_pcm_substream
*substream
,
991 struct snd_pcm_hw_params
*params
,
992 struct snd_soc_dai
*codec_dai
)
994 struct snd_soc_codec
*codec
= codec_dai
->codec
;
995 struct wm8350
*wm8350
= codec
->control_data
;
996 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
1000 switch (params_format(params
)) {
1001 case SNDRV_PCM_FORMAT_S16_LE
:
1003 case SNDRV_PCM_FORMAT_S20_3LE
:
1006 case SNDRV_PCM_FORMAT_S24_LE
:
1009 case SNDRV_PCM_FORMAT_S32_LE
:
1014 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
1016 /* The sloping stopband filter is recommended for use with
1017 * lower sample rates to improve performance.
1019 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
1020 if (params_rate(params
) < 24000)
1021 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
1022 WM8350_DAC_SB_FILT
);
1024 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
1025 WM8350_DAC_SB_FILT
);
1031 static int wm8350_mute(struct snd_soc_dai
*dai
, int mute
)
1033 struct snd_soc_codec
*codec
= dai
->codec
;
1034 struct wm8350
*wm8350
= codec
->control_data
;
1037 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1039 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1045 int div
; /* FLL_OUTDIV */
1048 int ratio
; /* FLL_FRATIO */
1051 /* The size in bits of the fll divide multiplied by 10
1052 * to allow rounding later */
1053 #define FIXED_FLL_SIZE ((1 << 16) * 10)
1055 static inline int fll_factors(struct _fll_div
*fll_div
, unsigned int input
,
1056 unsigned int output
)
1059 unsigned int t1
, t2
, K
, Nmod
;
1061 if (output
>= 2815250 && output
<= 3125000)
1063 else if (output
>= 5625000 && output
<= 6250000)
1065 else if (output
>= 11250000 && output
<= 12500000)
1067 else if (output
>= 22500000 && output
<= 25000000)
1070 printk(KERN_ERR
"wm8350: fll freq %d out of range\n", output
);
1079 t1
= output
* (1 << (fll_div
->div
+ 1));
1080 t2
= input
* fll_div
->ratio
;
1082 fll_div
->n
= t1
/ t2
;
1086 Kpart
= FIXED_FLL_SIZE
* (long long)Nmod
;
1088 K
= Kpart
& 0xFFFFFFFF;
1090 /* Check if we need to round */
1094 /* Move down to proper range now rounding is done */
1103 static int wm8350_set_fll(struct snd_soc_dai
*codec_dai
,
1104 int pll_id
, unsigned int freq_in
,
1105 unsigned int freq_out
)
1107 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1108 struct wm8350
*wm8350
= codec
->control_data
;
1109 struct wm8350_data
*priv
= codec
->private_data
;
1110 struct _fll_div fll_div
;
1114 if (freq_in
== priv
->fll_freq_in
&& freq_out
== priv
->fll_freq_out
)
1117 /* power down FLL - we need to do this for reconfiguration */
1118 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1119 WM8350_FLL_ENA
| WM8350_FLL_OSC_ENA
);
1121 if (freq_out
== 0 || freq_in
== 0)
1124 ret
= fll_factors(&fll_div
, freq_in
, freq_out
);
1127 dev_dbg(wm8350
->dev
,
1128 "FLL in %u FLL out %u N 0x%x K 0x%x div %d ratio %d",
1129 freq_in
, freq_out
, fll_div
.n
, fll_div
.k
, fll_div
.div
,
1132 /* set up N.K & dividers */
1133 fll_1
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_1
) &
1134 ~(WM8350_FLL_OUTDIV_MASK
| WM8350_FLL_RSP_RATE_MASK
| 0xc000);
1135 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_1
,
1136 fll_1
| (fll_div
.div
<< 8) | 0x50);
1137 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_2
,
1138 (fll_div
.ratio
<< 11) | (fll_div
.
1139 n
& WM8350_FLL_N_MASK
));
1140 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_3
, fll_div
.k
);
1141 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
1142 ~(WM8350_FLL_FRAC
| WM8350_FLL_SLOW_LOCK_REF
);
1143 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
,
1144 fll_4
| (fll_div
.k
? WM8350_FLL_FRAC
: 0) |
1145 (fll_div
.ratio
== 8 ? WM8350_FLL_SLOW_LOCK_REF
: 0));
1148 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_OSC_ENA
);
1149 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_ENA
);
1151 priv
->fll_freq_out
= freq_out
;
1152 priv
->fll_freq_in
= freq_in
;
1157 static int wm8350_set_bias_level(struct snd_soc_codec
*codec
,
1158 enum snd_soc_bias_level level
)
1160 struct wm8350
*wm8350
= codec
->control_data
;
1161 struct wm8350_data
*priv
= codec
->private_data
;
1162 struct wm8350_audio_platform_data
*platform
=
1163 wm8350
->codec
.platform_data
;
1168 case SND_SOC_BIAS_ON
:
1169 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1170 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1171 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1172 pm1
| WM8350_VMID_50K
|
1173 platform
->codec_current_on
<< 14);
1176 case SND_SOC_BIAS_PREPARE
:
1177 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
);
1178 pm1
&= ~WM8350_VMID_MASK
;
1179 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1180 pm1
| WM8350_VMID_50K
);
1183 case SND_SOC_BIAS_STANDBY
:
1184 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1185 ret
= regulator_bulk_enable(ARRAY_SIZE(priv
->supplies
),
1190 /* Enable the system clock */
1191 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
,
1194 /* mute DAC & outputs */
1195 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
,
1196 WM8350_DAC_MUTE_ENA
);
1198 /* discharge cap memory */
1199 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1200 platform
->dis_out1
|
1201 (platform
->dis_out2
<< 2) |
1202 (platform
->dis_out3
<< 4) |
1203 (platform
->dis_out4
<< 6));
1205 /* wait for discharge */
1206 schedule_timeout_interruptible(msecs_to_jiffies
1208 cap_discharge_msecs
));
1210 /* enable antipop */
1211 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1212 (platform
->vmid_s_curve
<< 8));
1215 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1217 codec_current_charge
<< 14) |
1218 WM8350_VMID_5K
| WM8350_VMIDEN
|
1222 schedule_timeout_interruptible(msecs_to_jiffies
1224 vmid_charge_msecs
));
1226 /* turn on vmid 300k */
1227 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1228 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1229 pm1
|= WM8350_VMID_300K
|
1230 (platform
->codec_current_standby
<< 14);
1231 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1235 /* enable analogue bias */
1236 pm1
|= WM8350_BIASEN
;
1237 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1239 /* disable antipop */
1240 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1243 /* turn on vmid 300k and reduce current */
1244 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1245 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1246 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1247 pm1
| WM8350_VMID_300K
|
1249 codec_current_standby
<< 14));
1254 case SND_SOC_BIAS_OFF
:
1256 /* mute DAC & enable outputs */
1257 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1259 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_3
,
1260 WM8350_OUT1L_ENA
| WM8350_OUT1R_ENA
|
1261 WM8350_OUT2L_ENA
| WM8350_OUT2R_ENA
);
1263 /* enable anti pop S curve */
1264 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1265 (platform
->vmid_s_curve
<< 8));
1268 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1270 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1273 schedule_timeout_interruptible(msecs_to_jiffies
1275 vmid_discharge_msecs
));
1277 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1278 (platform
->vmid_s_curve
<< 8) |
1279 platform
->dis_out1
|
1280 (platform
->dis_out2
<< 2) |
1281 (platform
->dis_out3
<< 4) |
1282 (platform
->dis_out4
<< 6));
1284 /* turn off VBuf and drain */
1285 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1286 ~(WM8350_VBUFEN
| WM8350_VMID_MASK
);
1287 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1288 pm1
| WM8350_OUTPUT_DRAIN_EN
);
1291 schedule_timeout_interruptible(msecs_to_jiffies
1292 (platform
->drain_msecs
));
1294 pm1
&= ~WM8350_BIASEN
;
1295 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1297 /* disable anti-pop */
1298 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1300 wm8350_clear_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1302 wm8350_clear_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1304 wm8350_clear_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1306 wm8350_clear_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1309 /* disable clock gen */
1310 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1313 regulator_bulk_disable(ARRAY_SIZE(priv
->supplies
),
1317 codec
->bias_level
= level
;
1321 static int wm8350_suspend(struct platform_device
*pdev
, pm_message_t state
)
1323 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1324 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1326 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1330 static int wm8350_resume(struct platform_device
*pdev
)
1332 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1333 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1335 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1337 if (codec
->suspend_bias_level
== SND_SOC_BIAS_ON
)
1338 wm8350_set_bias_level(codec
, SND_SOC_BIAS_ON
);
1343 static void wm8350_hp_jack_handler(struct wm8350
*wm8350
, int irq
, void *data
)
1345 struct wm8350_data
*priv
= data
;
1349 struct wm8350_jack_data
*jack
= NULL
;
1352 case WM8350_IRQ_CODEC_JCK_DET_L
:
1354 mask
= WM8350_JACK_L_LVL
;
1357 case WM8350_IRQ_CODEC_JCK_DET_R
:
1359 mask
= WM8350_JACK_R_LVL
;
1367 dev_warn(wm8350
->dev
, "Jack interrupt called with no jack\n");
1374 reg
= wm8350_reg_read(wm8350
, WM8350_JACK_PIN_STATUS
);
1376 report
= jack
->report
;
1380 snd_soc_jack_report(jack
->jack
, report
, jack
->report
);
1384 * wm8350_hp_jack_detect - Enable headphone jack detection.
1386 * @codec: WM8350 codec
1387 * @which: left or right jack detect signal
1388 * @jack: jack to report detection events on
1389 * @report: value to report
1391 * Enables the headphone jack detection of the WM8350.
1393 int wm8350_hp_jack_detect(struct snd_soc_codec
*codec
, enum wm8350_jack which
,
1394 struct snd_soc_jack
*jack
, int report
)
1396 struct wm8350_data
*priv
= codec
->private_data
;
1397 struct wm8350
*wm8350
= codec
->control_data
;
1403 priv
->hpl
.jack
= jack
;
1404 priv
->hpl
.report
= report
;
1405 irq
= WM8350_IRQ_CODEC_JCK_DET_L
;
1406 ena
= WM8350_JDL_ENA
;
1410 priv
->hpr
.jack
= jack
;
1411 priv
->hpr
.report
= report
;
1412 irq
= WM8350_IRQ_CODEC_JCK_DET_R
;
1413 ena
= WM8350_JDR_ENA
;
1420 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1421 wm8350_set_bits(wm8350
, WM8350_JACK_DETECT
, ena
);
1424 wm8350_hp_jack_handler(wm8350
, irq
, priv
);
1426 wm8350_unmask_irq(wm8350
, irq
);
1430 EXPORT_SYMBOL_GPL(wm8350_hp_jack_detect
);
1432 static struct snd_soc_codec
*wm8350_codec
;
1434 static int wm8350_probe(struct platform_device
*pdev
)
1436 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1437 struct snd_soc_codec
*codec
;
1438 struct wm8350
*wm8350
;
1439 struct wm8350_data
*priv
;
1441 struct wm8350_output
*out1
;
1442 struct wm8350_output
*out2
;
1444 BUG_ON(!wm8350_codec
);
1446 socdev
->card
->codec
= wm8350_codec
;
1447 codec
= socdev
->card
->codec
;
1448 wm8350
= codec
->control_data
;
1449 priv
= codec
->private_data
;
1451 /* Enable the codec */
1452 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1454 /* Enable robust clocking mode in ADC */
1455 wm8350_codec_write(codec
, WM8350_SECURITY
, 0xa7);
1456 wm8350_codec_write(codec
, 0xde, 0x13);
1457 wm8350_codec_write(codec
, WM8350_SECURITY
, 0);
1459 /* read OUT1 & OUT2 volumes */
1462 out1
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
) &
1463 WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1464 out1
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
) &
1465 WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1466 out2
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
) &
1467 WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1468 out2
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
) &
1469 WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1470 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
, 0);
1471 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
, 0);
1472 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
, 0);
1473 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
, 0);
1475 /* Latch VU bits & mute */
1476 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1477 WM8350_OUT1_VU
| WM8350_OUT1L_MUTE
);
1478 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1479 WM8350_OUT2_VU
| WM8350_OUT2L_MUTE
);
1480 wm8350_set_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1481 WM8350_OUT1_VU
| WM8350_OUT1R_MUTE
);
1482 wm8350_set_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1483 WM8350_OUT2_VU
| WM8350_OUT2R_MUTE
);
1485 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1486 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1487 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
,
1488 wm8350_hp_jack_handler
, priv
);
1489 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
,
1490 wm8350_hp_jack_handler
, priv
);
1492 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1494 dev_err(&pdev
->dev
, "failed to create pcms\n");
1498 snd_soc_add_controls(codec
, wm8350_snd_controls
,
1499 ARRAY_SIZE(wm8350_snd_controls
));
1500 wm8350_add_widgets(codec
);
1502 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1504 ret
= snd_soc_init_card(socdev
);
1506 dev_err(&pdev
->dev
, "failed to register card\n");
1513 snd_soc_free_pcms(socdev
);
1514 snd_soc_dapm_free(socdev
);
1518 static int wm8350_remove(struct platform_device
*pdev
)
1520 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1521 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1522 struct wm8350
*wm8350
= codec
->control_data
;
1523 struct wm8350_data
*priv
= codec
->private_data
;
1526 wm8350_clear_bits(wm8350
, WM8350_JACK_DETECT
,
1527 WM8350_JDL_ENA
| WM8350_JDR_ENA
);
1528 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1530 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1531 wm8350_mask_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1532 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
);
1533 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
);
1535 priv
->hpl
.jack
= NULL
;
1536 priv
->hpr
.jack
= NULL
;
1538 /* cancel any work waiting to be queued. */
1539 ret
= cancel_delayed_work(&codec
->delayed_work
);
1541 /* if there was any work waiting then we run it now and
1542 * wait for its completion */
1544 schedule_delayed_work(&codec
->delayed_work
, 0);
1545 flush_scheduled_work();
1548 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1550 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1555 #define WM8350_RATES (SNDRV_PCM_RATE_8000_96000)
1557 #define WM8350_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1558 SNDRV_PCM_FMTBIT_S20_3LE |\
1559 SNDRV_PCM_FMTBIT_S24_LE)
1561 static struct snd_soc_dai_ops wm8350_dai_ops
= {
1562 .hw_params
= wm8350_pcm_hw_params
,
1563 .digital_mute
= wm8350_mute
,
1564 .trigger
= wm8350_pcm_trigger
,
1565 .set_fmt
= wm8350_set_dai_fmt
,
1566 .set_sysclk
= wm8350_set_dai_sysclk
,
1567 .set_pll
= wm8350_set_fll
,
1568 .set_clkdiv
= wm8350_set_clkdiv
,
1571 struct snd_soc_dai wm8350_dai
= {
1574 .stream_name
= "Playback",
1577 .rates
= WM8350_RATES
,
1578 .formats
= WM8350_FORMATS
,
1581 .stream_name
= "Capture",
1584 .rates
= WM8350_RATES
,
1585 .formats
= WM8350_FORMATS
,
1587 .ops
= &wm8350_dai_ops
,
1589 EXPORT_SYMBOL_GPL(wm8350_dai
);
1591 struct snd_soc_codec_device soc_codec_dev_wm8350
= {
1592 .probe
= wm8350_probe
,
1593 .remove
= wm8350_remove
,
1594 .suspend
= wm8350_suspend
,
1595 .resume
= wm8350_resume
,
1597 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8350
);
1599 static __devinit
int wm8350_codec_probe(struct platform_device
*pdev
)
1601 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1602 struct wm8350_data
*priv
;
1603 struct snd_soc_codec
*codec
;
1606 if (wm8350
->codec
.platform_data
== NULL
) {
1607 dev_err(&pdev
->dev
, "No audio platform data supplied\n");
1611 priv
= kzalloc(sizeof(struct wm8350_data
), GFP_KERNEL
);
1615 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
1616 priv
->supplies
[i
].supply
= supply_names
[i
];
1618 ret
= regulator_bulk_get(wm8350
->dev
, ARRAY_SIZE(priv
->supplies
),
1623 codec
= &priv
->codec
;
1624 wm8350
->codec
.codec
= codec
;
1626 wm8350_dai
.dev
= &pdev
->dev
;
1628 mutex_init(&codec
->mutex
);
1629 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1630 INIT_LIST_HEAD(&codec
->dapm_paths
);
1631 codec
->dev
= &pdev
->dev
;
1632 codec
->name
= "WM8350";
1633 codec
->owner
= THIS_MODULE
;
1634 codec
->read
= wm8350_codec_read
;
1635 codec
->write
= wm8350_codec_write
;
1636 codec
->bias_level
= SND_SOC_BIAS_OFF
;
1637 codec
->set_bias_level
= wm8350_set_bias_level
;
1638 codec
->dai
= &wm8350_dai
;
1640 codec
->reg_cache_size
= WM8350_MAX_REGISTER
;
1641 codec
->private_data
= priv
;
1642 codec
->control_data
= wm8350
;
1644 /* Put the codec into reset if it wasn't already */
1645 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1647 INIT_DELAYED_WORK(&codec
->delayed_work
, wm8350_pga_work
);
1648 ret
= snd_soc_register_codec(codec
);
1652 wm8350_codec
= codec
;
1654 ret
= snd_soc_register_dai(&wm8350_dai
);
1660 snd_soc_unregister_codec(codec
);
1662 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1665 wm8350_codec
= NULL
;
1669 static int __devexit
wm8350_codec_remove(struct platform_device
*pdev
)
1671 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1672 struct snd_soc_codec
*codec
= wm8350
->codec
.codec
;
1673 struct wm8350_data
*priv
= codec
->private_data
;
1675 snd_soc_unregister_dai(&wm8350_dai
);
1676 snd_soc_unregister_codec(codec
);
1677 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1679 wm8350_codec
= NULL
;
1684 static int wm8350_codec_suspend(struct platform_device
*pdev
, pm_message_t m
)
1686 return snd_soc_suspend_device(&pdev
->dev
);
1689 static int wm8350_codec_resume(struct platform_device
*pdev
)
1691 return snd_soc_resume_device(&pdev
->dev
);
1694 #define wm8350_codec_suspend NULL
1695 #define wm8350_codec_resume NULL
1698 static struct platform_driver wm8350_codec_driver
= {
1700 .name
= "wm8350-codec",
1701 .owner
= THIS_MODULE
,
1703 .probe
= wm8350_codec_probe
,
1704 .remove
= __devexit_p(wm8350_codec_remove
),
1705 .suspend
= wm8350_codec_suspend
,
1706 .resume
= wm8350_codec_resume
,
1709 static __init
int wm8350_init(void)
1711 return platform_driver_register(&wm8350_codec_driver
);
1713 module_init(wm8350_init
);
1715 static __exit
void wm8350_exit(void)
1717 platform_driver_unregister(&wm8350_codec_driver
);
1719 module_exit(wm8350_exit
);
1721 MODULE_DESCRIPTION("ASoC WM8350 driver");
1722 MODULE_AUTHOR("Liam Girdwood");
1723 MODULE_LICENSE("GPL");
1724 MODULE_ALIAS("platform:wm8350-codec");