arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <asm-generic/gpio.h>
  18
  19 #include <mach/irqs.h>
  20 #include <mach/common.h>
  21
  22 #define DAVINCI_GPIO_BASE 0x01C67000
  23
  24 /*
  25  * basic gpio routines
  26  *
  27  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  28  * initializing banks together) rather than boot loaders; kexec() won't
  29  * go through boot loaders.
  30  *
  31  * the gpio clock will be turned on when gpios are used, and you may also
  32  * need to pay attention to PINMUX registers to be sure those pins are
  33  * used as gpios, not with other peripherals.
  34  *
  35  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  36  * and maybe for later updates, code may write GPIO(N).  These may be
  37  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  38  * may not support all the GPIOs in that range.
  39  *
  40  * GPIOs can also be on external chips, numbered after the ones built-in
  41  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  42  */
  43 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  44
  45 /* Convert GPIO signal to GPIO pin number */
  46 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio))
  47
  48 struct gpio_controller {
  49         u32     dir;
  50         u32     out_data;
  51         u32     set_data;
  52         u32     clr_data;
  53         u32     in_data;
  54         u32     set_rising;
  55         u32     clr_rising;
  56         u32     set_falling;
  57         u32     clr_falling;
  58         u32     intstat;
  59 };
  60
  61 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  62  * with constant parameters; or in outlined code they execute at runtime.
  63  *
  64  * You'd access the controller directly when reading or writing more than
  65  * one gpio value at a time, and to support wired logic where the value
  66  * being driven by the cpu need not match the value read back.
  67  *
  68  * These are NOT part of the cross-platform GPIO interface
  69  */
  70 static inline struct gpio_controller *__iomem
  71 __gpio_to_controller(unsigned gpio)
  72 {
  73         void *__iomem ptr;
  74         void __iomem *base = davinci_soc_info.gpio_base;
  75
  76         if (gpio < 32 * 1)
  77                 ptr = base + 0x10;
  78         else if (gpio < 32 * 2)
  79                 ptr = base + 0x38;
  80         else if (gpio < 32 * 3)
  81                 ptr = base + 0x60;
  82         else if (gpio < 32 * 4)
  83                 ptr = base + 0x88;
  84         else if (gpio < 32 * 5)
  85                 ptr = base + 0xb0;
  86         else
  87                 ptr = NULL;
  88         return ptr;
  89 }
  90
  91 static inline u32 __gpio_mask(unsigned gpio)
  92 {
  93         return 1 << (gpio % 32);
  94 }
  95
  96 /* The get/set/clear functions will inline when called with constant
  97  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  98  *
  99  * Otherwise, calls with variable parameters or referencing external
 100  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
 101  */
 102 static inline void gpio_set_value(unsigned gpio, int value)
 103 {
 104         if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
 105                 struct gpio_controller  *__iomem g;
 106                 u32                     mask;
 107
 108                 g = __gpio_to_controller(gpio);
 109                 mask = __gpio_mask(gpio);
 110                 if (value)
 111                         __raw_writel(mask, &g->set_data);
 112                 else
 113                         __raw_writel(mask, &g->clr_data);
 114                 return;
 115         }
 116
 117         __gpio_set_value(gpio, value);
 118 }
 119
 120 /* Returns zero or nonzero; works for gpios configured as inputs OR
 121  * as outputs, at least for built-in GPIOs.
 122  *
 123  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 124  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 125  * and then immediately gpio_get_value(), where the gpio_get_value() will
 126  * return the old value until the GPIO clock ticks and the new value gets
 127  * latched.
 128  */
 129 static inline int gpio_get_value(unsigned gpio)
 130 {
 131         struct gpio_controller  *__iomem g;
 132
 133         if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
 134                 return __gpio_get_value(gpio);
 135
 136         g = __gpio_to_controller(gpio);
 137         return __gpio_mask(gpio) & __raw_readl(&g->in_data);
 138 }
 139
 140 static inline int gpio_cansleep(unsigned gpio)
 141 {
 142         if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
 143                 return 0;
 144         else
 145                 return __gpio_cansleep(gpio);
 146 }
 147
 148 static inline int gpio_to_irq(unsigned gpio)
 149 {
 150         return __gpio_to_irq(gpio);
 151 }
 152
 153 static inline int irq_to_gpio(unsigned irq)
 154 {
 155         /* don't support the reverse mapping */
 156         return -ENOSYS;
 157 }
 158
 159 #endif                          /* __DAVINCI_GPIO_H */