2 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2008 Sascha Hauer, kernel@pengutronix.de
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor,
17 * Boston, MA 02110-1301, USA.
20 #include <linux/module.h>
21 #include <linux/platform_device.h>
22 #include <linux/serial.h>
23 #include <linux/gpio.h>
24 #include <mach/hardware.h>
25 #include <mach/irqs.h>
26 #include <mach/imx-uart.h>
28 static struct resource uart0
[] = {
30 .start
= MXC91231_UART1_BASE_ADDR
,
31 .end
= MXC91231_UART1_BASE_ADDR
+ 0x0B5,
32 .flags
= IORESOURCE_MEM
,
34 .start
= MXC91231_INT_UART1_RX
,
35 .end
= MXC91231_INT_UART1_RX
,
36 .flags
= IORESOURCE_IRQ
,
38 .start
= MXC91231_INT_UART1_TX
,
39 .end
= MXC91231_INT_UART1_TX
,
40 .flags
= IORESOURCE_IRQ
,
42 .start
= MXC91231_INT_UART1_MINT
,
43 .end
= MXC91231_INT_UART1_MINT
,
44 .flags
= IORESOURCE_IRQ
,
48 struct platform_device mxc_uart_device0
= {
52 .num_resources
= ARRAY_SIZE(uart0
),
55 static struct resource uart1
[] = {
57 .start
= MXC91231_UART2_BASE_ADDR
,
58 .end
= MXC91231_UART2_BASE_ADDR
+ 0x0B5,
59 .flags
= IORESOURCE_MEM
,
61 .start
= MXC91231_INT_UART2_RX
,
62 .end
= MXC91231_INT_UART2_RX
,
63 .flags
= IORESOURCE_IRQ
,
65 .start
= MXC91231_INT_UART2_TX
,
66 .end
= MXC91231_INT_UART2_TX
,
67 .flags
= IORESOURCE_IRQ
,
69 .start
= MXC91231_INT_UART2_MINT
,
70 .end
= MXC91231_INT_UART2_MINT
,
71 .flags
= IORESOURCE_IRQ
,
75 struct platform_device mxc_uart_device1
= {
79 .num_resources
= ARRAY_SIZE(uart1
),
82 static struct resource uart2
[] = {
84 .start
= MXC91231_UART3_BASE_ADDR
,
85 .end
= MXC91231_UART3_BASE_ADDR
+ 0x0B5,
86 .flags
= IORESOURCE_MEM
,
88 .start
= MXC91231_INT_UART3_RX
,
89 .end
= MXC91231_INT_UART3_RX
,
90 .flags
= IORESOURCE_IRQ
,
92 .start
= MXC91231_INT_UART3_TX
,
93 .end
= MXC91231_INT_UART3_TX
,
94 .flags
= IORESOURCE_IRQ
,
96 .start
= MXC91231_INT_UART3_MINT
,
97 .end
= MXC91231_INT_UART3_MINT
,
98 .flags
= IORESOURCE_IRQ
,
103 struct platform_device mxc_uart_device2
= {
107 .num_resources
= ARRAY_SIZE(uart2
),
110 /* GPIO port description */
111 static struct mxc_gpio_port mxc_gpio_ports
[] = {
113 .chip
.label
= "gpio-0",
114 .base
= MXC91231_IO_ADDRESS(MXC91231_GPIO1_AP_BASE_ADDR
),
115 .irq
= MXC91231_INT_GPIO1
,
116 .virtual_irq_start
= MXC_GPIO_IRQ_START
,
119 .chip
.label
= "gpio-1",
120 .base
= MXC91231_IO_ADDRESS(MXC91231_GPIO2_AP_BASE_ADDR
),
121 .irq
= MXC91231_INT_GPIO2
,
122 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 32,
125 .chip
.label
= "gpio-2",
126 .base
= MXC91231_IO_ADDRESS(MXC91231_GPIO3_AP_BASE_ADDR
),
127 .irq
= MXC91231_INT_GPIO3
,
128 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 64,
131 .chip
.label
= "gpio-3",
132 .base
= MXC91231_IO_ADDRESS(MXC91231_GPIO4_SH_BASE_ADDR
),
133 .irq
= MXC91231_INT_GPIO4
,
134 .virtual_irq_start
= MXC_GPIO_IRQ_START
+ 96,
138 int __init
mxc_register_gpios(void)
140 return mxc_gpio_init(mxc_gpio_ports
, ARRAY_SIZE(mxc_gpio_ports
));
143 static struct resource mxc_nand_resources
[] = {
145 .start
= MXC91231_NFC_BASE_ADDR
,
146 .end
= MXC91231_NFC_BASE_ADDR
+ 0xfff,
147 .flags
= IORESOURCE_MEM
149 .start
= MXC91231_INT_NANDFC
,
150 .end
= MXC91231_INT_NANDFC
,
151 .flags
= IORESOURCE_IRQ
155 struct platform_device mxc_nand_device
= {
158 .num_resources
= ARRAY_SIZE(mxc_nand_resources
),
159 .resource
= mxc_nand_resources
,
162 static struct resource mxc_sdhc0_resources
[] = {
164 .start
= MXC91231_MMC_SDHC1_BASE_ADDR
,
165 .end
= MXC91231_MMC_SDHC1_BASE_ADDR
+ SZ_16K
- 1,
166 .flags
= IORESOURCE_MEM
,
168 .start
= MXC91231_INT_MMC_SDHC1
,
169 .end
= MXC91231_INT_MMC_SDHC1
,
170 .flags
= IORESOURCE_IRQ
,
174 static struct resource mxc_sdhc1_resources
[] = {
176 .start
= MXC91231_MMC_SDHC2_BASE_ADDR
,
177 .end
= MXC91231_MMC_SDHC2_BASE_ADDR
+ SZ_16K
- 1,
178 .flags
= IORESOURCE_MEM
,
180 .start
= MXC91231_INT_MMC_SDHC2
,
181 .end
= MXC91231_INT_MMC_SDHC2
,
182 .flags
= IORESOURCE_IRQ
,
186 struct platform_device mxc_sdhc_device0
= {
189 .num_resources
= ARRAY_SIZE(mxc_sdhc0_resources
),
190 .resource
= mxc_sdhc0_resources
,
193 struct platform_device mxc_sdhc_device1
= {
196 .num_resources
= ARRAY_SIZE(mxc_sdhc1_resources
),
197 .resource
= mxc_sdhc1_resources
,
200 static struct resource mxc_cspi0_resources
[] = {
202 .start
= MXC91231_CSPI1_BASE_ADDR
,
203 .end
= MXC91231_CSPI1_BASE_ADDR
+ 0x20,
204 .flags
= IORESOURCE_MEM
,
206 .start
= MXC91231_INT_CSPI1
,
207 .end
= MXC91231_INT_CSPI1
,
208 .flags
= IORESOURCE_IRQ
,
212 struct platform_device mxc_cspi_device0
= {
215 .num_resources
= ARRAY_SIZE(mxc_cspi0_resources
),
216 .resource
= mxc_cspi0_resources
,
219 static struct resource mxc_cspi1_resources
[] = {
221 .start
= MXC91231_CSPI2_BASE_ADDR
,
222 .end
= MXC91231_CSPI2_BASE_ADDR
+ 0x20,
223 .flags
= IORESOURCE_MEM
,
225 .start
= MXC91231_INT_CSPI2
,
226 .end
= MXC91231_INT_CSPI2
,
227 .flags
= IORESOURCE_IRQ
,
231 struct platform_device mxc_cspi_device1
= {
234 .num_resources
= ARRAY_SIZE(mxc_cspi1_resources
),
235 .resource
= mxc_cspi1_resources
,
238 static struct resource mxc_wdog0_resources
[] = {
240 .start
= MXC91231_WDOG1_BASE_ADDR
,
241 .end
= MXC91231_WDOG1_BASE_ADDR
+ 0x10,
242 .flags
= IORESOURCE_MEM
,
246 struct platform_device mxc_wdog_device0
= {
249 .num_resources
= ARRAY_SIZE(mxc_wdog0_resources
),
250 .resource
= mxc_wdog0_resources
,