arch/mips/pci/pci-emma2rh.c

   1 /*
   2  *  arch/mips/pci/pci-emma2rh.c
   3  *      This file defines the PCI configration.
   4  *
   5  *  Copyright (C) NEC Electronics Corporation 2004-2006
   6  *
   7  *  This file is based on the arch/mips/ddb5xxx/ddb5477/pci.c
   8  *
   9  *      Copyright 2001 MontaVista Software Inc.
  10  *
  11  *  This program is free software; you can redistribute it and/or modify
  12  *  it under the terms of the GNU General Public License as published by
  13  *  the Free Software Foundation; either version 2 of the License, or
  14  *  (at your option) any later version.
  15  *
  16  *  This program is distributed in the hope that it will be useful,
  17  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19  *  GNU General Public License for more details.
  20  *
  21  *  You should have received a copy of the GNU General Public License
  22  *  along with this program; if not, write to the Free Software
  23  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  24  */
  25
  26 #include <linux/kernel.h>
  27 #include <linux/init.h>
  28 #include <linux/types.h>
  29 #include <linux/pci.h>
  30
  31 #include <asm/bootinfo.h>
  32
  33 #include <asm/emma/emma2rh.h>
  34
  35 static struct resource pci_io_resource = {
  36         .name = "pci IO space",
  37         .start = EMMA2RH_PCI_IO_BASE,
  38         .end = EMMA2RH_PCI_IO_BASE + EMMA2RH_PCI_IO_SIZE - 1,
  39         .flags = IORESOURCE_IO,
  40 };
  41
  42 static struct resource pci_mem_resource = {
  43         .name = "pci memory space",
  44         .start = EMMA2RH_PCI_MEM_BASE,
  45         .end = EMMA2RH_PCI_MEM_BASE + EMMA2RH_PCI_MEM_SIZE - 1,
  46         .flags = IORESOURCE_MEM,
  47 };
  48
  49 extern struct pci_ops emma2rh_pci_ops;
  50
  51 static struct pci_controller emma2rh_pci_controller = {
  52         .pci_ops = &emma2rh_pci_ops,
  53         .mem_resource = &pci_mem_resource,
  54         .io_resource = &pci_io_resource,
  55         .mem_offset = -0x04000000,
  56         .io_offset = 0,
  57 };
  58
  59 static void __init emma2rh_pci_init(void)
  60 {
  61         /* setup PCI interface */
  62         emma2rh_out32(EMMA2RH_PCI_ARBIT_CTR, 0x70f);
  63
  64         emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x80000a18);
  65         emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_COMMAND,
  66                       PCI_STATUS_DEVSEL_MEDIUM | PCI_STATUS_CAP_LIST |
  67                       PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
  68         emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_0, 0x10000000);
  69         emma2rh_out32(EMMA2RH_PCI_CONFIG_BASE + PCI_BASE_ADDRESS_1, 0x00000000);
  70
  71         emma2rh_out32(EMMA2RH_PCI_IWIN0_CTR, 0x12000000 | 0x218);
  72         emma2rh_out32(EMMA2RH_PCI_IWIN1_CTR, 0x18000000 | 0x600);
  73         emma2rh_out32(EMMA2RH_PCI_INIT_ESWP, 0x00000200);
  74
  75         emma2rh_out32(EMMA2RH_PCI_TWIN_CTR, 0x00009200);
  76         emma2rh_out32(EMMA2RH_PCI_TWIN_BADR, 0x00000000);
  77         emma2rh_out32(EMMA2RH_PCI_TWIN0_DADR, 0x00000000);
  78         emma2rh_out32(EMMA2RH_PCI_TWIN1_DADR, 0x00000000);
  79 }
  80
  81 static int __init emma2rh_pci_setup(void)
  82 {
  83         emma2rh_pci_init();
  84         register_pci_controller(&emma2rh_pci_controller);
  85         return 0;
  86 }
  87
  88 arch_initcall(emma2rh_pci_setup);