OMAP3 SRF: Add virt clk nodes for VDD1/VDD2
[linux-ginger.git] / arch / mips / math-emu / sp_add.c
blobd8c4211bcfbe7243c1e79e36972e7c8fb1555d80
1 /* IEEE754 floating point arithmetic
2 * single precision
3 */
4 /*
5 * MIPS floating point support
6 * Copyright (C) 1994-2000 Algorithmics Ltd.
7 * http://www.algor.co.uk
9 * ########################################################################
11 * This program is free software; you can distribute it and/or modify it
12 * under the terms of the GNU General Public License (Version 2) as
13 * published by the Free Software Foundation.
15 * This program is distributed in the hope it will be useful, but WITHOUT
16 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * for more details.
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
24 * ########################################################################
28 #include "ieee754sp.h"
30 ieee754sp ieee754sp_add(ieee754sp x, ieee754sp y)
32 COMPXSP;
33 COMPYSP;
35 EXPLODEXSP;
36 EXPLODEYSP;
38 CLEARCX;
40 FLUSHXSP;
41 FLUSHYSP;
43 switch (CLPAIR(xc, yc)) {
44 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
45 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
46 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
47 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
48 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
49 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
50 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
51 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
52 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
53 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
54 case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
55 SETCX(IEEE754_INVALID_OPERATION);
56 return ieee754sp_nanxcpt(ieee754sp_indef(), "add", x, y);
58 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
59 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
60 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
61 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
62 return y;
64 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
65 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
66 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
67 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
68 case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
69 return x;
72 /* Infinity handling
75 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
76 if (xs == ys)
77 return x;
78 SETCX(IEEE754_INVALID_OPERATION);
79 return ieee754sp_xcpt(ieee754sp_indef(), "add", x, y);
81 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
82 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
83 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
84 return y;
86 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
87 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
88 case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
89 return x;
91 /* Zero handling
94 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
95 if (xs == ys)
96 return x;
97 else
98 return ieee754sp_zero(ieee754_csr.rm ==
99 IEEE754_RD);
101 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
102 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
103 return x;
105 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
106 case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
107 return y;
109 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
110 SPDNORMX;
112 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
113 SPDNORMY;
114 break;
116 case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
117 SPDNORMX;
118 break;
120 case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
121 break;
123 assert(xm & SP_HIDDEN_BIT);
124 assert(ym & SP_HIDDEN_BIT);
126 /* provide guard,round and stick bit space */
127 xm <<= 3;
128 ym <<= 3;
130 if (xe > ye) {
131 /* have to shift y fraction right to align
133 int s = xe - ye;
134 SPXSRSYn(s);
135 } else if (ye > xe) {
136 /* have to shift x fraction right to align
138 int s = ye - xe;
139 SPXSRSXn(s);
141 assert(xe == ye);
142 assert(xe <= SP_EMAX);
144 if (xs == ys) {
145 /* generate 28 bit result of adding two 27 bit numbers
146 * leaving result in xm,xs,xe
148 xm = xm + ym;
149 xe = xe;
150 xs = xs;
152 if (xm >> (SP_MBITS + 1 + 3)) { /* carry out */
153 SPXSRSX1();
155 } else {
156 if (xm >= ym) {
157 xm = xm - ym;
158 xe = xe;
159 xs = xs;
160 } else {
161 xm = ym - xm;
162 xe = xe;
163 xs = ys;
165 if (xm == 0)
166 return ieee754sp_zero(ieee754_csr.rm ==
167 IEEE754_RD);
169 /* normalize in extended single precision */
170 while ((xm >> (SP_MBITS + 3)) == 0) {
171 xm <<= 1;
172 xe--;
176 SPNORMRET2(xs, xe, xm, "add", x, y);