OMAP3 SRF: Add virt clk nodes for VDD1/VDD2
[linux-ginger.git] / arch / mips / sibyte / sb1250 / setup.c
blob0444da1e23c24e2dc675a40034a2e7adc087ba41
1 /*
2 * Copyright (C) 2000, 2001, 2002, 2003 Broadcom Corporation
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/reboot.h>
22 #include <linux/string.h>
24 #include <asm/bootinfo.h>
25 #include <asm/mipsregs.h>
26 #include <asm/io.h>
27 #include <asm/sibyte/sb1250.h>
28 #include <asm/sibyte/sb1250_regs.h>
29 #include <asm/sibyte/sb1250_scd.h>
31 unsigned int sb1_pass;
32 unsigned int soc_pass;
33 unsigned int soc_type;
34 EXPORT_SYMBOL(soc_type);
35 unsigned int periph_rev;
36 unsigned int zbbus_mhz;
37 EXPORT_SYMBOL(zbbus_mhz);
39 static char *soc_str;
40 static char *pass_str;
41 static unsigned int war_pass; /* XXXKW don't overload PASS defines? */
43 static int __init setup_bcm1250(void)
45 int ret = 0;
47 switch (soc_pass) {
48 case K_SYS_REVISION_BCM1250_PASS1:
49 periph_rev = 1;
50 pass_str = "Pass 1";
51 break;
52 case K_SYS_REVISION_BCM1250_A10:
53 periph_rev = 2;
54 pass_str = "A8/A10";
55 /* XXXKW different war_pass? */
56 war_pass = K_SYS_REVISION_BCM1250_PASS2;
57 break;
58 case K_SYS_REVISION_BCM1250_PASS2_2:
59 periph_rev = 2;
60 pass_str = "B1";
61 break;
62 case K_SYS_REVISION_BCM1250_B2:
63 periph_rev = 2;
64 pass_str = "B2";
65 war_pass = K_SYS_REVISION_BCM1250_PASS2_2;
66 break;
67 case K_SYS_REVISION_BCM1250_PASS3:
68 periph_rev = 3;
69 pass_str = "C0";
70 break;
71 case K_SYS_REVISION_BCM1250_C1:
72 periph_rev = 3;
73 pass_str = "C1";
74 break;
75 default:
76 if (soc_pass < K_SYS_REVISION_BCM1250_PASS2_2) {
77 periph_rev = 2;
78 pass_str = "A0-A6";
79 war_pass = K_SYS_REVISION_BCM1250_PASS2;
80 } else {
81 printk("Unknown BCM1250 rev %x\n", soc_pass);
82 ret = 1;
84 break;
87 return ret;
90 static int __init setup_bcm112x(void)
92 int ret = 0;
94 switch (soc_pass) {
95 case 0:
96 /* Early build didn't have revid set */
97 periph_rev = 3;
98 pass_str = "A1";
99 war_pass = K_SYS_REVISION_BCM112x_A1;
100 break;
101 case K_SYS_REVISION_BCM112x_A1:
102 periph_rev = 3;
103 pass_str = "A1";
104 break;
105 case K_SYS_REVISION_BCM112x_A2:
106 periph_rev = 3;
107 pass_str = "A2";
108 break;
109 case K_SYS_REVISION_BCM112x_A3:
110 periph_rev = 3;
111 pass_str = "A3";
112 break;
113 case K_SYS_REVISION_BCM112x_A4:
114 periph_rev = 3;
115 pass_str = "A4";
116 break;
117 case K_SYS_REVISION_BCM112x_B0:
118 periph_rev = 3;
119 pass_str = "B0";
120 break;
121 default:
122 printk("Unknown %s rev %x\n", soc_str, soc_pass);
123 ret = 1;
126 return ret;
129 /* Setup code likely to be common to all SiByte platforms */
131 static int __init sys_rev_decode(void)
133 int ret = 0;
135 war_pass = soc_pass;
136 switch (soc_type) {
137 case K_SYS_SOC_TYPE_BCM1250:
138 case K_SYS_SOC_TYPE_BCM1250_ALT:
139 case K_SYS_SOC_TYPE_BCM1250_ALT2:
140 soc_str = "BCM1250";
141 ret = setup_bcm1250();
142 break;
143 case K_SYS_SOC_TYPE_BCM1120:
144 soc_str = "BCM1120";
145 ret = setup_bcm112x();
146 break;
147 case K_SYS_SOC_TYPE_BCM1125:
148 soc_str = "BCM1125";
149 ret = setup_bcm112x();
150 break;
151 case K_SYS_SOC_TYPE_BCM1125H:
152 soc_str = "BCM1125H";
153 ret = setup_bcm112x();
154 break;
155 default:
156 printk("Unknown SOC type %x\n", soc_type);
157 ret = 1;
158 break;
161 return ret;
164 void __init sb1250_setup(void)
166 uint64_t sys_rev;
167 int plldiv;
168 int bad_config = 0;
170 sb1_pass = read_c0_prid() & 0xff;
171 sys_rev = __raw_readq(IOADDR(A_SCD_SYSTEM_REVISION));
172 soc_type = SYS_SOC_TYPE(sys_rev);
173 soc_pass = G_SYS_REVISION(sys_rev);
175 if (sys_rev_decode()) {
176 printk("Restart after failure to identify SiByte chip\n");
177 machine_restart(NULL);
180 plldiv = G_SYS_PLL_DIV(__raw_readq(IOADDR(A_SCD_SYSTEM_CFG)));
181 zbbus_mhz = ((plldiv >> 1) * 50) + ((plldiv & 1) * 25);
183 printk("Broadcom SiByte %s %s @ %d MHz (SB1 rev %d)\n",
184 soc_str, pass_str, zbbus_mhz * 2, sb1_pass);
185 printk("Board type: %s\n", get_system_type());
187 switch (war_pass) {
188 case K_SYS_REVISION_BCM1250_PASS1:
189 #ifndef CONFIG_SB1_PASS_1_WORKAROUNDS
190 printk("@@@@ This is a BCM1250 A0-A2 (Pass 1) board, "
191 "and the kernel doesn't have the proper "
192 "workarounds compiled in. @@@@\n");
193 bad_config = 1;
194 #endif
195 break;
196 case K_SYS_REVISION_BCM1250_PASS2:
197 /* Pass 2 - easiest as default for now - so many numbers */
198 #if !defined(CONFIG_SB1_PASS_2_WORKAROUNDS) || \
199 !defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS)
200 printk("@@@@ This is a BCM1250 A3-A10 board, and the "
201 "kernel doesn't have the proper workarounds "
202 "compiled in. @@@@\n");
203 bad_config = 1;
204 #endif
205 #ifdef CONFIG_CPU_HAS_PREFETCH
206 printk("@@@@ Prefetches may be enabled in this kernel, "
207 "but are buggy on this board. @@@@\n");
208 bad_config = 1;
209 #endif
210 break;
211 case K_SYS_REVISION_BCM1250_PASS2_2:
212 #ifndef CONFIG_SB1_PASS_2_WORKAROUNDS
213 printk("@@@@ This is a BCM1250 B1/B2. board, and the "
214 "kernel doesn't have the proper workarounds "
215 "compiled in. @@@@\n");
216 bad_config = 1;
217 #endif
218 #if defined(CONFIG_SB1_PASS_2_1_WORKAROUNDS) || \
219 !defined(CONFIG_CPU_HAS_PREFETCH)
220 printk("@@@@ This is a BCM1250 B1/B2, but the kernel is "
221 "conservatively configured for an 'A' stepping. "
222 "@@@@\n");
223 #endif
224 break;
225 default:
226 break;
228 if (bad_config) {
229 printk("Invalid configuration for this chip.\n");
230 machine_restart(NULL);