arch/arm/plat-s3c64xx/include/plat/dma-plat.h

   1 /* linux/arch/arm/plat-s3c64xx/include/plat/dma-plat.h
   2  *
   3  * Copyright 2009 Openmoko, Inc.
   4  * Copyright 2009 Simtec Electronics
   5  *      Ben Dooks <ben@simtec.co.uk>
   6  *      http://armlinux.simtec.co.uk/
   7  *
   8  * S3C64XX DMA core
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13 */
  14
  15 #define DMACH_LOW_LEVEL (1<<28) /* use this to specifiy hardware ch no */
  16
  17 struct s3c64xx_dma_buff;
  18
  19 /** s3c64xx_dma_buff - S3C64XX DMA buffer descriptor
  20  * @next: Pointer to next buffer in queue or ring.
  21  * @pw: Client provided identifier
  22  * @lli: Pointer to hardware descriptor this buffer is associated with.
  23  * @lli_dma: Hardare address of the descriptor.
  24  */
  25 struct s3c64xx_dma_buff {
  26         struct s3c64xx_dma_buff *next;
  27
  28         void                    *pw;
  29         struct pl080s_lli       *lli;
  30         dma_addr_t               lli_dma;
  31 };
  32
  33 struct s3c64xx_dmac;
  34
  35 struct s3c2410_dma_chan {
  36         unsigned char            number;      /* number of this dma channel */
  37         unsigned char            in_use;      /* channel allocated */
  38         unsigned char            bit;         /* bit for enable/disable/etc */
  39         unsigned char            hw_width;
  40         unsigned char            peripheral;
  41
  42         unsigned int             flags;
  43         enum s3c2410_dmasrc      source;
  44
  45
  46         dma_addr_t              dev_addr;
  47
  48         struct s3c2410_dma_client *client;
  49         struct s3c64xx_dmac     *dmac;          /* pointer to controller */
  50
  51         void __iomem            *regs;
  52
  53         /* cdriver callbacks */
  54         s3c2410_dma_cbfn_t       callback_fn;   /* buffer done callback */
  55         s3c2410_dma_opfn_t       op_fn;         /* channel op callback */
  56
  57         /* buffer list and information */
  58         struct s3c64xx_dma_buff *curr;          /* current dma buffer */
  59         struct s3c64xx_dma_buff *next;          /* next buffer to load */
  60         struct s3c64xx_dma_buff *end;           /* end of queue */
  61
  62         /* note, when channel is running in circular mode, curr is the
  63          * first buffer enqueued, end is the last and curr is where the
  64          * last buffer-done event is set-at. The buffers are not freed
  65          * and the last buffer hardware descriptor points back to the
  66          * first.
  67          */
  68 };
  69
  70 #include <plat/dma-core.h>