omap: Split OMAP2_IO_ADDRESS to L3 and L4
[linux-ginger.git] / include / linux / hardirq.h
blob6d527ee82b2b2904b2d30f978da8f31a61783d6a
1 #ifndef LINUX_HARDIRQ_H
2 #define LINUX_HARDIRQ_H
4 #include <linux/preempt.h>
5 #ifdef CONFIG_PREEMPT
6 #include <linux/smp_lock.h>
7 #endif
8 #include <linux/lockdep.h>
9 #include <linux/ftrace_irq.h>
10 #include <asm/hardirq.h>
11 #include <asm/system.h>
14 * We put the hardirq and softirq counter into the preemption
15 * counter. The bitmask has the following meaning:
17 * - bits 0-7 are the preemption count (max preemption depth: 256)
18 * - bits 8-15 are the softirq count (max # of softirqs: 256)
20 * The hardirq count can in theory reach the same as NR_IRQS.
21 * In reality, the number of nested IRQS is limited to the stack
22 * size as well. For archs with over 1000 IRQS it is not practical
23 * to expect that they will all nest. We give a max of 10 bits for
24 * hardirq nesting. An arch may choose to give less than 10 bits.
25 * m68k expects it to be 8.
27 * - bits 16-25 are the hardirq count (max # of nested hardirqs: 1024)
28 * - bit 26 is the NMI_MASK
29 * - bit 28 is the PREEMPT_ACTIVE flag
31 * PREEMPT_MASK: 0x000000ff
32 * SOFTIRQ_MASK: 0x0000ff00
33 * HARDIRQ_MASK: 0x03ff0000
34 * NMI_MASK: 0x04000000
36 #define PREEMPT_BITS 8
37 #define SOFTIRQ_BITS 8
38 #define NMI_BITS 1
40 #define MAX_HARDIRQ_BITS 10
42 #ifndef HARDIRQ_BITS
43 # define HARDIRQ_BITS MAX_HARDIRQ_BITS
44 #endif
46 #if HARDIRQ_BITS > MAX_HARDIRQ_BITS
47 #error HARDIRQ_BITS too high!
48 #endif
50 #define PREEMPT_SHIFT 0
51 #define SOFTIRQ_SHIFT (PREEMPT_SHIFT + PREEMPT_BITS)
52 #define HARDIRQ_SHIFT (SOFTIRQ_SHIFT + SOFTIRQ_BITS)
53 #define NMI_SHIFT (HARDIRQ_SHIFT + HARDIRQ_BITS)
55 #define __IRQ_MASK(x) ((1UL << (x))-1)
57 #define PREEMPT_MASK (__IRQ_MASK(PREEMPT_BITS) << PREEMPT_SHIFT)
58 #define SOFTIRQ_MASK (__IRQ_MASK(SOFTIRQ_BITS) << SOFTIRQ_SHIFT)
59 #define HARDIRQ_MASK (__IRQ_MASK(HARDIRQ_BITS) << HARDIRQ_SHIFT)
60 #define NMI_MASK (__IRQ_MASK(NMI_BITS) << NMI_SHIFT)
62 #define PREEMPT_OFFSET (1UL << PREEMPT_SHIFT)
63 #define SOFTIRQ_OFFSET (1UL << SOFTIRQ_SHIFT)
64 #define HARDIRQ_OFFSET (1UL << HARDIRQ_SHIFT)
65 #define NMI_OFFSET (1UL << NMI_SHIFT)
67 #ifndef PREEMPT_ACTIVE
68 #define PREEMPT_ACTIVE_BITS 1
69 #define PREEMPT_ACTIVE_SHIFT (NMI_SHIFT + NMI_BITS)
70 #define PREEMPT_ACTIVE (__IRQ_MASK(PREEMPT_ACTIVE_BITS) << PREEMPT_ACTIVE_SHIFT)
71 #endif
73 #if PREEMPT_ACTIVE < (1 << (NMI_SHIFT + NMI_BITS))
74 #error PREEMPT_ACTIVE is too low!
75 #endif
77 #define hardirq_count() (preempt_count() & HARDIRQ_MASK)
78 #define softirq_count() (preempt_count() & SOFTIRQ_MASK)
79 #define irq_count() (preempt_count() & (HARDIRQ_MASK | SOFTIRQ_MASK \
80 | NMI_MASK))
83 * Are we doing bottom half or hardware interrupt processing?
84 * Are we in a softirq context? Interrupt context?
86 #define in_irq() (hardirq_count())
87 #define in_softirq() (softirq_count())
88 #define in_interrupt() (irq_count())
91 * Are we in NMI context?
93 #define in_nmi() (preempt_count() & NMI_MASK)
95 #if defined(CONFIG_PREEMPT)
96 # define PREEMPT_INATOMIC_BASE kernel_locked()
97 # define PREEMPT_CHECK_OFFSET 1
98 #else
99 # define PREEMPT_INATOMIC_BASE 0
100 # define PREEMPT_CHECK_OFFSET 0
101 #endif
104 * Are we running in atomic context? WARNING: this macro cannot
105 * always detect atomic context; in particular, it cannot know about
106 * held spinlocks in non-preemptible kernels. Thus it should not be
107 * used in the general case to determine whether sleeping is possible.
108 * Do not use in_atomic() in driver code.
110 #define in_atomic() ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_INATOMIC_BASE)
113 * Check whether we were atomic before we did preempt_disable():
114 * (used by the scheduler, *after* releasing the kernel lock)
116 #define in_atomic_preempt_off() \
117 ((preempt_count() & ~PREEMPT_ACTIVE) != PREEMPT_CHECK_OFFSET)
119 #ifdef CONFIG_PREEMPT
120 # define preemptible() (preempt_count() == 0 && !irqs_disabled())
121 # define IRQ_EXIT_OFFSET (HARDIRQ_OFFSET-1)
122 #else
123 # define preemptible() 0
124 # define IRQ_EXIT_OFFSET HARDIRQ_OFFSET
125 #endif
127 #if defined(CONFIG_SMP) || defined(CONFIG_GENERIC_HARDIRQS)
128 extern void synchronize_irq(unsigned int irq);
129 #else
130 # define synchronize_irq(irq) barrier()
131 #endif
133 struct task_struct;
135 #ifndef CONFIG_VIRT_CPU_ACCOUNTING
136 static inline void account_system_vtime(struct task_struct *tsk)
139 #endif
141 #if defined(CONFIG_NO_HZ)
142 extern void rcu_irq_enter(void);
143 extern void rcu_irq_exit(void);
144 extern void rcu_nmi_enter(void);
145 extern void rcu_nmi_exit(void);
146 #else
147 # define rcu_irq_enter() do { } while (0)
148 # define rcu_irq_exit() do { } while (0)
149 # define rcu_nmi_enter() do { } while (0)
150 # define rcu_nmi_exit() do { } while (0)
151 #endif /* #if defined(CONFIG_NO_HZ) */
154 * It is safe to do non-atomic ops on ->hardirq_context,
155 * because NMI handlers may not preempt and the ops are
156 * always balanced, so the interrupted value of ->hardirq_context
157 * will always be restored.
159 #define __irq_enter() \
160 do { \
161 account_system_vtime(current); \
162 add_preempt_count(HARDIRQ_OFFSET); \
163 trace_hardirq_enter(); \
164 } while (0)
167 * Enter irq context (on NO_HZ, update jiffies):
169 extern void irq_enter(void);
172 * Exit irq context without processing softirqs:
174 #define __irq_exit() \
175 do { \
176 trace_hardirq_exit(); \
177 account_system_vtime(current); \
178 sub_preempt_count(HARDIRQ_OFFSET); \
179 } while (0)
182 * Exit irq context and process softirqs if needed:
184 extern void irq_exit(void);
186 #define nmi_enter() \
187 do { \
188 ftrace_nmi_enter(); \
189 BUG_ON(in_nmi()); \
190 add_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
191 lockdep_off(); \
192 rcu_nmi_enter(); \
193 trace_hardirq_enter(); \
194 } while (0)
196 #define nmi_exit() \
197 do { \
198 trace_hardirq_exit(); \
199 rcu_nmi_exit(); \
200 lockdep_on(); \
201 BUG_ON(!in_nmi()); \
202 sub_preempt_count(NMI_OFFSET + HARDIRQ_OFFSET); \
203 ftrace_nmi_exit(); \
204 } while (0)
206 #endif /* LINUX_HARDIRQ_H */