arch/arm/plat-omap/include/mach/clock.h

   1 /*
   2  *  arch/arm/plat-omap/include/mach/clock.h
   3  *
   4  *  Copyright (C) 2004 - 2005 Nokia corporation
   5  *  Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
   6  *  Based on clocks.h by Tony Lindgren, Gordon McNutt and RidgeRun, Inc
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12
  13 #ifndef __ARCH_ARM_OMAP_CLOCK_H
  14 #define __ARCH_ARM_OMAP_CLOCK_H
  15
  16 struct module;
  17 struct clk;
  18 struct clockdomain;
  19
  20 struct clkops {
  21         int                     (*enable)(struct clk *);
  22         void                    (*disable)(struct clk *);
  23 };
  24
  25 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
  26                 defined(CONFIG_ARCH_OMAP4)
  27
  28 struct clksel_rate {
  29         u32                     val;
  30         u8                      div;
  31         u8                      flags;
  32 };
  33
  34 struct clksel {
  35         struct clk               *parent;
  36         const struct clksel_rate *rates;
  37 };
  38
  39 struct dpll_data {
  40         void __iomem            *mult_div1_reg;
  41         u32                     mult_mask;
  42         u32                     div1_mask;
  43         struct clk              *clk_bypass;
  44         struct clk              *clk_ref;
  45         void __iomem            *control_reg;
  46         u32                     enable_mask;
  47         unsigned int            rate_tolerance;
  48         unsigned long           last_rounded_rate;
  49         u16                     last_rounded_m;
  50         u8                      last_rounded_n;
  51         u8                      min_divider;
  52         u8                      max_divider;
  53         u32                     max_tolerance;
  54         u16                     max_multiplier;
  55 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
  56         u8                      modes;
  57         void __iomem            *autoidle_reg;
  58         void __iomem            *idlest_reg;
  59         u32                     autoidle_mask;
  60         u32                     freqsel_mask;
  61         u32                     idlest_mask;
  62         u8                      auto_recal_bit;
  63         u8                      recal_en_bit;
  64         u8                      recal_st_bit;
  65 #  endif
  66 };
  67
  68 #endif
  69
  70 struct clk {
  71         struct list_head        node;
  72         const struct clkops     *ops;
  73         const char              *name;
  74         int                     id;
  75         struct clk              *parent;
  76         struct list_head        children;
  77         struct list_head        sibling;        /* node for children */
  78         unsigned long           rate;
  79         __u32                   flags;
  80         void __iomem            *enable_reg;
  81         unsigned long           (*recalc)(struct clk *);
  82         int                     (*set_rate)(struct clk *, unsigned long);
  83         long                    (*round_rate)(struct clk *, unsigned long);
  84         void                    (*init)(struct clk *);
  85         __u8                    enable_bit;
  86         __s8                    usecount;
  87 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3) || \
  88                 defined(CONFIG_ARCH_OMAP4)
  89         u8                      fixed_div;
  90         void __iomem            *clksel_reg;
  91         u32                     clksel_mask;
  92         const struct clksel     *clksel;
  93         struct dpll_data        *dpll_data;
  94         const char              *clkdm_name;
  95         struct clockdomain      *clkdm;
  96 #else
  97         __u8                    rate_offset;
  98         __u8                    src_offset;
  99 #endif
 100 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
 101         struct dentry           *dent;  /* For visible tree hierarchy */
 102 #endif
 103 };
 104
 105 struct cpufreq_frequency_table;
 106
 107 struct clk_functions {
 108         int             (*clk_enable)(struct clk *clk);
 109         void            (*clk_disable)(struct clk *clk);
 110         long            (*clk_round_rate)(struct clk *clk, unsigned long rate);
 111         int             (*clk_set_rate)(struct clk *clk, unsigned long rate);
 112         int             (*clk_set_parent)(struct clk *clk, struct clk *parent);
 113         void            (*clk_allow_idle)(struct clk *clk);
 114         void            (*clk_deny_idle)(struct clk *clk);
 115         void            (*clk_disable_unused)(struct clk *clk);
 116 #ifdef CONFIG_CPU_FREQ
 117         void            (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **);
 118 #endif
 119 };
 120
 121 extern unsigned int mpurate;
 122
 123 extern int clk_init(struct clk_functions *custom_clocks);
 124 extern void clk_preinit(struct clk *clk);
 125 extern int clk_register(struct clk *clk);
 126 extern void clk_reparent(struct clk *child, struct clk *parent);
 127 extern void clk_unregister(struct clk *clk);
 128 extern void propagate_rate(struct clk *clk);
 129 extern void recalculate_root_clocks(void);
 130 extern unsigned long followparent_recalc(struct clk *clk);
 131 extern void clk_enable_init_clocks(void);
 132 #ifdef CONFIG_CPU_FREQ
 133 extern void clk_init_cpufreq_table(struct cpufreq_frequency_table **table);
 134 #endif
 135
 136 extern const struct clkops clkops_null;
 137
 138 /* Clock flags */
 139 /* bit 0 is free */
 140 #define RATE_FIXED              (1 << 1)        /* Fixed clock rate */
 141 /* bits 2-4 are free */
 142 #define ENABLE_REG_32BIT        (1 << 5)        /* Use 32-bit access */
 143 #define CLOCK_IDLE_CONTROL      (1 << 7)
 144 #define CLOCK_NO_IDLE_PARENT    (1 << 8)
 145 #define DELAYED_APP             (1 << 9)        /* Delay application of clock */
 146 #define CONFIG_PARTICIPANT      (1 << 10)       /* Fundamental clock */
 147 #define ENABLE_ON_INIT          (1 << 11)       /* Enable upon framework init */
 148 #define INVERT_ENABLE           (1 << 12)       /* 0 enables, 1 disables */
 149 /* bits 13-31 are currently free */
 150
 151 /* Clksel_rate flags */
 152 #define DEFAULT_RATE            (1 << 0)
 153 #define RATE_IN_242X            (1 << 1)
 154 #define RATE_IN_243X            (1 << 2)
 155 #define RATE_IN_343X            (1 << 3)        /* rates common to all 343X */
 156 #define RATE_IN_3430ES2         (1 << 4)        /* 3430ES2 rates only */
 157
 158 #define RATE_IN_24XX            (RATE_IN_242X | RATE_IN_243X)
 159
 160
 161 #endif