arch/arm/mach-davinci/include/mach/gpio.h

   1 /*
   2  * TI DaVinci GPIO Support
   3  *
   4  * Copyright (c) 2006 David Brownell
   5  * Copyright (c) 2007, MontaVista Software, Inc. <source@mvista.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  */
  12
  13 #ifndef __DAVINCI_GPIO_H
  14 #define __DAVINCI_GPIO_H
  15
  16 #include <linux/io.h>
  17 #include <asm-generic/gpio.h>
  18
  19 #include <mach/irqs.h>
  20
  21 #define DAVINCI_GPIO_BASE 0x01C67000
  22
  23 /*
  24  * basic gpio routines
  25  *
  26  * board-specific init should be done by arch/.../.../board-XXX.c (maybe
  27  * initializing banks together) rather than boot loaders; kexec() won't
  28  * go through boot loaders.
  29  *
  30  * the gpio clock will be turned on when gpios are used, and you may also
  31  * need to pay attention to PINMUX registers to be sure those pins are
  32  * used as gpios, not with other peripherals.
  33  *
  34  * On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1).  For documentation,
  35  * and maybe for later updates, code may write GPIO(N).  These may be
  36  * all 1.8V signals, all 3.3V ones, or a mix of the two.  A given chip
  37  * may not support all the GPIOs in that range.
  38  *
  39  * GPIOs can also be on external chips, numbered after the ones built-in
  40  * to the DaVinci chip.  For now, they won't be usable as IRQ sources.
  41  */
  42 #define GPIO(X)         (X)             /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
  43
  44 struct gpio_controller {
  45         u32     dir;
  46         u32     out_data;
  47         u32     set_data;
  48         u32     clr_data;
  49         u32     in_data;
  50         u32     set_rising;
  51         u32     clr_rising;
  52         u32     set_falling;
  53         u32     clr_falling;
  54         u32     intstat;
  55 };
  56
  57 /* The __gpio_to_controller() and __gpio_mask() functions inline to constants
  58  * with constant parameters; or in outlined code they execute at runtime.
  59  *
  60  * You'd access the controller directly when reading or writing more than
  61  * one gpio value at a time, and to support wired logic where the value
  62  * being driven by the cpu need not match the value read back.
  63  *
  64  * These are NOT part of the cross-platform GPIO interface
  65  */
  66 static inline struct gpio_controller *__iomem
  67 __gpio_to_controller(unsigned gpio)
  68 {
  69         void *__iomem ptr;
  70
  71         if (gpio < 32 * 1)
  72                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
  73         else if (gpio < 32 * 2)
  74                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
  75         else if (gpio < 32 * 3)
  76                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
  77         else if (gpio < 32 * 4)
  78                 ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x88);
  79         else
  80                 ptr = NULL;
  81         return ptr;
  82 }
  83
  84 static inline u32 __gpio_mask(unsigned gpio)
  85 {
  86         return 1 << (gpio % 32);
  87 }
  88
  89 /* The get/set/clear functions will inline when called with constant
  90  * parameters referencing built-in GPIOs, for low-overhead bitbanging.
  91  *
  92  * Otherwise, calls with variable parameters or referencing external
  93  * GPIOs (e.g. on GPIO expander chips) use outlined functions.
  94  */
  95 static inline void gpio_set_value(unsigned gpio, int value)
  96 {
  97         if (__builtin_constant_p(value) && gpio < DAVINCI_N_GPIO) {
  98                 struct gpio_controller  *__iomem g;
  99                 u32                     mask;
 100
 101                 g = __gpio_to_controller(gpio);
 102                 mask = __gpio_mask(gpio);
 103                 if (value)
 104                         __raw_writel(mask, &g->set_data);
 105                 else
 106                         __raw_writel(mask, &g->clr_data);
 107                 return;
 108         }
 109
 110         __gpio_set_value(gpio, value);
 111 }
 112
 113 /* Returns zero or nonzero; works for gpios configured as inputs OR
 114  * as outputs, at least for built-in GPIOs.
 115  *
 116  * NOTE: for built-in GPIOs, changes in reported values are synchronized
 117  * to the GPIO clock.  This is easily seen after calling gpio_set_value()
 118  * and then immediately gpio_get_value(), where the gpio_get_value() will
 119  * return the old value until the GPIO clock ticks and the new value gets
 120  * latched.
 121  */
 122 static inline int gpio_get_value(unsigned gpio)
 123 {
 124         struct gpio_controller  *__iomem g;
 125
 126         if (!__builtin_constant_p(gpio) || gpio >= DAVINCI_N_GPIO)
 127                 return __gpio_get_value(gpio);
 128
 129         g = __gpio_to_controller(gpio);
 130         return __gpio_mask(gpio) & __raw_readl(&g->in_data);
 131 }
 132
 133 static inline int gpio_cansleep(unsigned gpio)
 134 {
 135         if (__builtin_constant_p(gpio) && gpio < DAVINCI_N_GPIO)
 136                 return 0;
 137         else
 138                 return __gpio_cansleep(gpio);
 139 }
 140
 141 static inline int gpio_to_irq(unsigned gpio)
 142 {
 143         if (gpio >= DAVINCI_N_GPIO)
 144                 return -EINVAL;
 145         return DAVINCI_N_AINTC_IRQ + gpio;
 146 }
 147
 148 static inline int irq_to_gpio(unsigned irq)
 149 {
 150         /* caller guarantees gpio_to_irq() succeeded */
 151         return irq - DAVINCI_N_AINTC_IRQ;
 152 }
 153
 154 #endif                          /* __DAVINCI_GPIO_H */