arch/arm/mach-davinci/include/mach/psc.h

   1 /*
   2  *  DaVinci Power & Sleep Controller (PSC) defines
   3  *
   4  *  Copyright (C) 2006 Texas Instruments.
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  12  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  14  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  17  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  19  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the  GNU General Public License along
  23  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  */
  27 #ifndef __ASM_ARCH_PSC_H
  28 #define __ASM_ARCH_PSC_H
  29
  30 /* Power and Sleep Controller (PSC) Domains */
  31 #define DAVINCI_GPSC_ARMDOMAIN      0
  32 #define DAVINCI_GPSC_DSPDOMAIN      1
  33
  34 #define DAVINCI_LPSC_VPSSMSTR       0
  35 #define DAVINCI_LPSC_VPSSSLV        1
  36 #define DAVINCI_LPSC_TPCC           2
  37 #define DAVINCI_LPSC_TPTC0          3
  38 #define DAVINCI_LPSC_TPTC1          4
  39 #define DAVINCI_LPSC_EMAC           5
  40 #define DAVINCI_LPSC_EMAC_WRAPPER   6
  41 #define DAVINCI_LPSC_USB            9
  42 #define DAVINCI_LPSC_ATA            10
  43 #define DAVINCI_LPSC_VLYNQ          11
  44 #define DAVINCI_LPSC_UHPI           12
  45 #define DAVINCI_LPSC_DDR_EMIF       13
  46 #define DAVINCI_LPSC_AEMIF          14
  47 #define DAVINCI_LPSC_MMC_SD         15
  48 #define DAVINCI_LPSC_McBSP          17
  49 #define DAVINCI_LPSC_I2C            18
  50 #define DAVINCI_LPSC_UART0          19
  51 #define DAVINCI_LPSC_UART1          20
  52 #define DAVINCI_LPSC_UART2          21
  53 #define DAVINCI_LPSC_SPI            22
  54 #define DAVINCI_LPSC_PWM0           23
  55 #define DAVINCI_LPSC_PWM1           24
  56 #define DAVINCI_LPSC_PWM2           25
  57 #define DAVINCI_LPSC_GPIO           26
  58 #define DAVINCI_LPSC_TIMER0         27
  59 #define DAVINCI_LPSC_TIMER1         28
  60 #define DAVINCI_LPSC_TIMER2         29
  61 #define DAVINCI_LPSC_SYSTEM_SUBSYS  30
  62 #define DAVINCI_LPSC_ARM            31
  63 #define DAVINCI_LPSC_SCR2           32
  64 #define DAVINCI_LPSC_SCR3           33
  65 #define DAVINCI_LPSC_SCR4           34
  66 #define DAVINCI_LPSC_CROSSBAR       35
  67 #define DAVINCI_LPSC_CFG27          36
  68 #define DAVINCI_LPSC_CFG3           37
  69 #define DAVINCI_LPSC_CFG5           38
  70 #define DAVINCI_LPSC_GEM            39
  71 #define DAVINCI_LPSC_IMCOP          40
  72
  73 #define DM355_LPSC_TIMER3               5
  74 #define DM355_LPSC_SPI1                 6
  75 #define DM355_LPSC_MMC_SD1              7
  76 #define DM355_LPSC_McBSP1               8
  77 #define DM355_LPSC_PWM3                 10
  78 #define DM355_LPSC_SPI2                 11
  79 #define DM355_LPSC_RTO                  12
  80 #define DM355_LPSC_VPSS_DAC             41
  81
  82 /*
  83  * LPSC Assignments
  84  */
  85 #define DM646X_LPSC_ARM            0
  86 #define DM646X_LPSC_C64X_CPU       1
  87 #define DM646X_LPSC_HDVICP0        2
  88 #define DM646X_LPSC_HDVICP1        3
  89 #define DM646X_LPSC_TPCC           4
  90 #define DM646X_LPSC_TPTC0          5
  91 #define DM646X_LPSC_TPTC1          6
  92 #define DM646X_LPSC_TPTC2          7
  93 #define DM646X_LPSC_TPTC3          8
  94 #define DM646X_LPSC_PCI            13
  95 #define DM646X_LPSC_EMAC           14
  96 #define DM646X_LPSC_VDCE           15
  97 #define DM646X_LPSC_VPSSMSTR       16
  98 #define DM646X_LPSC_VPSSSLV        17
  99 #define DM646X_LPSC_TSIF0          18
 100 #define DM646X_LPSC_TSIF1          19
 101 #define DM646X_LPSC_DDR_EMIF       20
 102 #define DM646X_LPSC_AEMIF          21
 103 #define DM646X_LPSC_McASP0         22
 104 #define DM646X_LPSC_McASP1         23
 105 #define DM646X_LPSC_CRGEN0         24
 106 #define DM646X_LPSC_CRGEN1         25
 107 #define DM646X_LPSC_UART0          26
 108 #define DM646X_LPSC_UART1          27
 109 #define DM646X_LPSC_UART2          28
 110 #define DM646X_LPSC_PWM0           29
 111 #define DM646X_LPSC_PWM1           30
 112 #define DM646X_LPSC_I2C            31
 113 #define DM646X_LPSC_SPI            32
 114 #define DM646X_LPSC_GPIO           33
 115 #define DM646X_LPSC_TIMER0         34
 116 #define DM646X_LPSC_TIMER1         35
 117 #define DM646X_LPSC_ARM_INTC       45
 118
 119 extern int davinci_psc_is_clk_active(unsigned int id);
 120 extern void davinci_psc_config(unsigned int domain, unsigned int id,
 121                                char enable);
 122
 123 #endif /* __ASM_ARCH_PSC_H */