arch/cris/arch-v10/kernel/setup.c

   1 /*
   2  *
   3  *  linux/arch/cris/arch-v10/kernel/setup.c
   4  *
   5  *  Copyright (C) 1995  Linus Torvalds
   6  *  Copyright (c) 2001-2002  Axis Communications AB
   7  */
   8
   9 /*
  10  * This file handles the architecture-dependent parts of initialization
  11  */
  12
  13 #include <linux/seq_file.h>
  14 #include <linux/proc_fs.h>
  15 #include <linux/delay.h>
  16 #include <linux/param.h>
  17
  18 #ifdef CONFIG_PROC_FS
  19 #define HAS_FPU         0x0001
  20 #define HAS_MMU         0x0002
  21 #define HAS_ETHERNET100 0x0004
  22 #define HAS_TOKENRING   0x0008
  23 #define HAS_SCSI        0x0010
  24 #define HAS_ATA         0x0020
  25 #define HAS_USB         0x0040
  26 #define HAS_IRQ_BUG     0x0080
  27 #define HAS_MMU_BUG     0x0100
  28
  29 static struct cpu_info {
  30         char *model;
  31         unsigned short cache;
  32         unsigned short flags;
  33 } cpu_info[] = {
  34         /* The first four models will never ever run this code and are
  35            only here for display.  */
  36         { "ETRAX 1",         0, 0 },
  37         { "ETRAX 2",         0, 0 },
  38         { "ETRAX 3",         0, HAS_TOKENRING },
  39         { "ETRAX 4",         0, HAS_TOKENRING | HAS_SCSI },
  40         { "Unknown",         0, 0 },
  41         { "Unknown",         0, 0 },
  42         { "Unknown",         0, 0 },
  43         { "Simulator",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
  44         { "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_IRQ_BUG },
  45         { "ETRAX 100",       8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA },
  46         { "ETRAX 100LX",     8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU | HAS_MMU_BUG },
  47         { "ETRAX 100LX v2",  8, HAS_ETHERNET100 | HAS_SCSI | HAS_ATA | HAS_USB | HAS_MMU  },
  48         { "Unknown",         0, 0 }  /* This entry MUST be the last */
  49 };
  50
  51 int show_cpuinfo(struct seq_file *m, void *v)
  52 {
  53         unsigned long revision;
  54         struct cpu_info *info;
  55
  56         /* read the version register in the CPU and print some stuff */
  57
  58         revision = rdvr();
  59
  60         if (revision >= ARRAY_SIZE(cpu_info))
  61                 info = &cpu_info[ARRAY_SIZE(cpu_info) - 1];
  62         else
  63                 info = &cpu_info[revision];
  64
  65         return seq_printf(m,
  66                        "processor\t: 0\n"
  67                        "cpu\t\t: CRIS\n"
  68                        "cpu revision\t: %lu\n"
  69                        "cpu model\t: %s\n"
  70                        "cache size\t: %d kB\n"
  71                        "fpu\t\t: %s\n"
  72                        "mmu\t\t: %s\n"
  73                        "mmu DMA bug\t: %s\n"
  74                        "ethernet\t: %s Mbps\n"
  75                        "token ring\t: %s\n"
  76                        "scsi\t\t: %s\n"
  77                        "ata\t\t: %s\n"
  78                        "usb\t\t: %s\n"
  79                        "bogomips\t: %lu.%02lu\n",
  80
  81                        revision,
  82                        info->model,
  83                        info->cache,
  84                        info->flags & HAS_FPU ? "yes" : "no",
  85                        info->flags & HAS_MMU ? "yes" : "no",
  86                        info->flags & HAS_MMU_BUG ? "yes" : "no",
  87                        info->flags & HAS_ETHERNET100 ? "10/100" : "10",
  88                        info->flags & HAS_TOKENRING ? "4/16 Mbps" : "no",
  89                        info->flags & HAS_SCSI ? "yes" : "no",
  90                        info->flags & HAS_ATA ? "yes" : "no",
  91                        info->flags & HAS_USB ? "yes" : "no",
  92                        (loops_per_jiffy * HZ + 500) / 500000,
  93                        ((loops_per_jiffy * HZ + 500) / 5000) % 100);
  94 }
  95
  96 #endif /* CONFIG_PROC_FS */
  97
  98 void
  99 show_etrax_copyright(void)
 100 {
 101         printk(KERN_INFO
 102                "Linux/CRIS port on ETRAX 100LX (c) 2001 Axis Communications AB\n");
 103 }