OMAP: Add new function to check wether there is irq pending
[linux-ginger.git] / arch / x86 / include / asm / mce.h
blob4f8c199584e748c8075a1fd4c344f7af9d33688e
1 #ifndef _ASM_X86_MCE_H
2 #define _ASM_X86_MCE_H
4 #ifdef __x86_64__
6 #include <linux/types.h>
7 #include <asm/ioctls.h>
9 /*
10 * Machine Check support for x86
13 #define MCG_CTL_P (1UL<<8) /* MCG_CAP register available */
14 #define MCG_EXT_P (1ULL<<9) /* Extended registers available */
15 #define MCG_CMCI_P (1ULL<<10) /* CMCI supported */
17 #define MCG_STATUS_RIPV (1UL<<0) /* restart ip valid */
18 #define MCG_STATUS_EIPV (1UL<<1) /* ip points to correct instruction */
19 #define MCG_STATUS_MCIP (1UL<<2) /* machine check in progress */
21 #define MCI_STATUS_VAL (1UL<<63) /* valid error */
22 #define MCI_STATUS_OVER (1UL<<62) /* previous errors lost */
23 #define MCI_STATUS_UC (1UL<<61) /* uncorrected error */
24 #define MCI_STATUS_EN (1UL<<60) /* error enabled */
25 #define MCI_STATUS_MISCV (1UL<<59) /* misc error reg. valid */
26 #define MCI_STATUS_ADDRV (1UL<<58) /* addr reg. valid */
27 #define MCI_STATUS_PCC (1UL<<57) /* processor context corrupt */
29 /* Fields are zero when not available */
30 struct mce {
31 __u64 status;
32 __u64 misc;
33 __u64 addr;
34 __u64 mcgstatus;
35 __u64 ip;
36 __u64 tsc; /* cpu time stamp counter */
37 __u64 res1; /* for future extension */
38 __u64 res2; /* dito. */
39 __u8 cs; /* code segment */
40 __u8 bank; /* machine check bank */
41 __u8 cpu; /* cpu that raised the error */
42 __u8 finished; /* entry is valid */
43 __u32 pad;
47 * This structure contains all data related to the MCE log. Also
48 * carries a signature to make it easier to find from external
49 * debugging tools. Each entry is only valid when its finished flag
50 * is set.
53 #define MCE_LOG_LEN 32
55 struct mce_log {
56 char signature[12]; /* "MACHINECHECK" */
57 unsigned len; /* = MCE_LOG_LEN */
58 unsigned next;
59 unsigned flags;
60 unsigned pad0;
61 struct mce entry[MCE_LOG_LEN];
64 #define MCE_OVERFLOW 0 /* bit 0 in flags means overflow */
66 #define MCE_LOG_SIGNATURE "MACHINECHECK"
68 #define MCE_GET_RECORD_LEN _IOR('M', 1, int)
69 #define MCE_GET_LOG_LEN _IOR('M', 2, int)
70 #define MCE_GETCLEAR_FLAGS _IOR('M', 3, int)
72 /* Software defined banks */
73 #define MCE_EXTENDED_BANK 128
74 #define MCE_THERMAL_BANK MCE_EXTENDED_BANK + 0
76 #define K8_MCE_THRESHOLD_BASE (MCE_EXTENDED_BANK + 1) /* MCE_AMD */
77 #define K8_MCE_THRESHOLD_BANK_0 (MCE_THRESHOLD_BASE + 0 * 9)
78 #define K8_MCE_THRESHOLD_BANK_1 (MCE_THRESHOLD_BASE + 1 * 9)
79 #define K8_MCE_THRESHOLD_BANK_2 (MCE_THRESHOLD_BASE + 2 * 9)
80 #define K8_MCE_THRESHOLD_BANK_3 (MCE_THRESHOLD_BASE + 3 * 9)
81 #define K8_MCE_THRESHOLD_BANK_4 (MCE_THRESHOLD_BASE + 4 * 9)
82 #define K8_MCE_THRESHOLD_BANK_5 (MCE_THRESHOLD_BASE + 5 * 9)
83 #define K8_MCE_THRESHOLD_DRAM_ECC (MCE_THRESHOLD_BANK_4 + 0)
85 #endif /* __x86_64__ */
87 #ifdef __KERNEL__
89 #ifdef CONFIG_X86_32
90 extern int mce_disabled;
91 #else /* CONFIG_X86_32 */
93 #include <asm/atomic.h>
95 void mce_setup(struct mce *m);
96 void mce_log(struct mce *m);
97 DECLARE_PER_CPU(struct sys_device, device_mce);
98 extern void (*threshold_cpu_callback)(unsigned long action, unsigned int cpu);
101 * To support more than 128 would need to escape the predefined
102 * Linux defined extended banks first.
104 #define MAX_NR_BANKS (MCE_EXTENDED_BANK - 1)
106 #ifdef CONFIG_X86_MCE_INTEL
107 void mce_intel_feature_init(struct cpuinfo_x86 *c);
108 void cmci_clear(void);
109 void cmci_reenable(void);
110 void cmci_rediscover(int dying);
111 void cmci_recheck(void);
112 #else
113 static inline void mce_intel_feature_init(struct cpuinfo_x86 *c) { }
114 static inline void cmci_clear(void) {}
115 static inline void cmci_reenable(void) {}
116 static inline void cmci_rediscover(int dying) {}
117 static inline void cmci_recheck(void) {}
118 #endif
120 #ifdef CONFIG_X86_MCE_AMD
121 void mce_amd_feature_init(struct cpuinfo_x86 *c);
122 #else
123 static inline void mce_amd_feature_init(struct cpuinfo_x86 *c) { }
124 #endif
126 extern int mce_available(struct cpuinfo_x86 *c);
128 void mce_log_therm_throt_event(__u64 status);
130 extern atomic_t mce_entry;
132 extern void do_machine_check(struct pt_regs *, long);
134 typedef DECLARE_BITMAP(mce_banks_t, MAX_NR_BANKS);
135 DECLARE_PER_CPU(mce_banks_t, mce_poll_banks);
137 enum mcp_flags {
138 MCP_TIMESTAMP = (1 << 0), /* log time stamp */
139 MCP_UC = (1 << 1), /* log uncorrected errors */
140 MCP_DONTLOG = (1 << 2), /* only clear, don't log */
142 extern void machine_check_poll(enum mcp_flags flags, mce_banks_t *b);
144 extern int mce_notify_user(void);
146 #endif /* !CONFIG_X86_32 */
148 #ifdef CONFIG_X86_MCE
149 extern void mcheck_init(struct cpuinfo_x86 *c);
150 #else
151 #define mcheck_init(c) do { } while (0)
152 #endif
154 extern void (*mce_threshold_vector)(void);
156 #endif /* __KERNEL__ */
157 #endif /* _ASM_X86_MCE_H */