arch/arm/mach-pxa/include/mach/ssp.h

   1 /*
   2  *  ssp.h
   3  *
   4  *  Copyright (C) 2003 Russell King, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  *
  10  * This driver supports the following PXA CPU/SSP ports:-
  11  *
  12  *       PXA250     SSP
  13  *       PXA255     SSP, NSSP
  14  *       PXA26x     SSP, NSSP, ASSP
  15  *       PXA27x     SSP1, SSP2, SSP3
  16  *       PXA3xx     SSP1, SSP2, SSP3, SSP4
  17  */
  18
  19 #ifndef __ASM_ARCH_SSP_H
  20 #define __ASM_ARCH_SSP_H
  21
  22 #include <linux/list.h>
  23 #include <linux/io.h>
  24
  25 enum pxa_ssp_type {
  26         SSP_UNDEFINED = 0,
  27         PXA25x_SSP,  /* pxa 210, 250, 255, 26x */
  28         PXA25x_NSSP, /* pxa 255, 26x (including ASSP) */
  29         PXA27x_SSP,
  30 };
  31
  32 struct ssp_device {
  33         struct platform_device *pdev;
  34         struct list_head        node;
  35
  36         struct clk      *clk;
  37         void __iomem    *mmio_base;
  38         unsigned long   phys_base;
  39
  40         const char      *label;
  41         int             port_id;
  42         int             type;
  43         int             use_count;
  44         int             irq;
  45         int             drcmr_rx;
  46         int             drcmr_tx;
  47 };
  48
  49 /*
  50  * SSP initialisation flags
  51  */
  52 #define SSP_NO_IRQ      0x1             /* don't register an irq handler in SSP driver */
  53
  54 struct ssp_state {
  55         u32     cr0;
  56         u32 cr1;
  57         u32 to;
  58         u32 psp;
  59 };
  60
  61 struct ssp_dev {
  62         struct ssp_device *ssp;
  63         u32 port;
  64         u32 mode;
  65         u32 flags;
  66         u32 psp_flags;
  67         u32 speed;
  68         int irq;
  69 };
  70
  71 int ssp_write_word(struct ssp_dev *dev, u32 data);
  72 int ssp_read_word(struct ssp_dev *dev, u32 *data);
  73 int ssp_flush(struct ssp_dev *dev);
  74 void ssp_enable(struct ssp_dev *dev);
  75 void ssp_disable(struct ssp_dev *dev);
  76 void ssp_save_state(struct ssp_dev *dev, struct ssp_state *ssp);
  77 void ssp_restore_state(struct ssp_dev *dev, struct ssp_state *ssp);
  78 int ssp_init(struct ssp_dev *dev, u32 port, u32 init_flags);
  79 int ssp_config(struct ssp_dev *dev, u32 mode, u32 flags, u32 psp_flags, u32 speed);
  80 void ssp_exit(struct ssp_dev *dev);
  81
  82 /**
  83  * ssp_write_reg - Write to a SSP register
  84  *
  85  * @dev: SSP device to access
  86  * @reg: Register to write to
  87  * @val: Value to be written.
  88  */
  89 static inline void ssp_write_reg(struct ssp_device *dev, u32 reg, u32 val)
  90 {
  91         __raw_writel(val, dev->mmio_base + reg);
  92 }
  93
  94 /**
  95  * ssp_read_reg - Read from a SSP register
  96  *
  97  * @dev: SSP device to access
  98  * @reg: Register to read from
  99  */
 100 static inline u32 ssp_read_reg(struct ssp_device *dev, u32 reg)
 101 {
 102         return __raw_readl(dev->mmio_base + reg);
 103 }
 104
 105 struct ssp_device *ssp_request(int port, const char *label);
 106 void ssp_free(struct ssp_device *);
 107 #endif /* __ASM_ARCH_SSP_H */