arch/powerpc/boot/dts/tqm8540.dts

   1 /*
   2  * TQM 8540 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "tqc,tqm8540";
  16         compatible = "tqc,tqm8540";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8540@0 {
  34                         device_type = "cpu";
  35                         reg = <0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <32768>;
  39                         i-cache-size = <32768>;
  40                         timebase-frequency = <0>;
  41                         bus-frequency = <0>;
  42                         clock-frequency = <0>;
  43                         next-level-cache = <&L2>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x00000000 0x10000000>;
  50         };
  51
  52         soc@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 ranges = <0x0 0xe0000000 0x100000>;
  57                 reg = <0xe0000000 0x200>;
  58                 bus-frequency = <0>;
  59                 compatible = "fsl,mpc8540-immr", "simple-bus";
  60
  61                 memory-controller@2000 {
  62                         compatible = "fsl,mpc8540-memory-controller";
  63                         reg = <0x2000 0x1000>;
  64                         interrupt-parent = <&mpic>;
  65                         interrupts = <18 2>;
  66                 };
  67
  68                 L2: l2-cache-controller@20000 {
  69                         compatible = "fsl,mpc8540-l2-cache-controller";
  70                         reg = <0x20000 0x1000>;
  71                         cache-line-size = <32>;
  72                         cache-size = <0x40000>; // L2, 256K
  73                         interrupt-parent = <&mpic>;
  74                         interrupts = <16 2>;
  75                 };
  76
  77                 i2c@3000 {
  78                         #address-cells = <1>;
  79                         #size-cells = <0>;
  80                         cell-index = <0>;
  81                         compatible = "fsl-i2c";
  82                         reg = <0x3000 0x100>;
  83                         interrupts = <43 2>;
  84                         interrupt-parent = <&mpic>;
  85                         dfsrr;
  86
  87                         dtt@48 {
  88                                 compatible = "national,lm75";
  89                                 reg = <0x48>;
  90                         };
  91
  92                         rtc@68 {
  93                                 compatible = "dallas,ds1337";
  94                                 reg = <0x68>;
  95                         };
  96                 };
  97
  98                 dma@21300 {
  99                         #address-cells = <1>;
 100                         #size-cells = <1>;
 101                         compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
 102                         reg = <0x21300 0x4>;
 103                         ranges = <0x0 0x21100 0x200>;
 104                         cell-index = <0>;
 105                         dma-channel@0 {
 106                                 compatible = "fsl,mpc8540-dma-channel",
 107                                                 "fsl,eloplus-dma-channel";
 108                                 reg = <0x0 0x80>;
 109                                 cell-index = <0>;
 110                                 interrupt-parent = <&mpic>;
 111                                 interrupts = <20 2>;
 112                         };
 113                         dma-channel@80 {
 114                                 compatible = "fsl,mpc8540-dma-channel",
 115                                                 "fsl,eloplus-dma-channel";
 116                                 reg = <0x80 0x80>;
 117                                 cell-index = <1>;
 118                                 interrupt-parent = <&mpic>;
 119                                 interrupts = <21 2>;
 120                         };
 121                         dma-channel@100 {
 122                                 compatible = "fsl,mpc8540-dma-channel",
 123                                                 "fsl,eloplus-dma-channel";
 124                                 reg = <0x100 0x80>;
 125                                 cell-index = <2>;
 126                                 interrupt-parent = <&mpic>;
 127                                 interrupts = <22 2>;
 128                         };
 129                         dma-channel@180 {
 130                                 compatible = "fsl,mpc8540-dma-channel",
 131                                                 "fsl,eloplus-dma-channel";
 132                                 reg = <0x180 0x80>;
 133                                 cell-index = <3>;
 134                                 interrupt-parent = <&mpic>;
 135                                 interrupts = <23 2>;
 136                         };
 137                 };
 138
 139                 enet0: ethernet@24000 {
 140                         #address-cells = <1>;
 141                         #size-cells = <1>;
 142                         cell-index = <0>;
 143                         device_type = "network";
 144                         model = "TSEC";
 145                         compatible = "gianfar";
 146                         reg = <0x24000 0x1000>;
 147                         ranges = <0x0 0x24000 0x1000>;
 148                         local-mac-address = [ 00 00 00 00 00 00 ];
 149                         interrupts = <29 2 30 2 34 2>;
 150                         interrupt-parent = <&mpic>;
 151                         phy-handle = <&phy2>;
 152
 153                         mdio@520 {
 154                                 #address-cells = <1>;
 155                                 #size-cells = <0>;
 156                                 compatible = "fsl,gianfar-mdio";
 157                                 reg = <0x520 0x20>;
 158
 159                                 phy1: ethernet-phy@1 {
 160                                         interrupt-parent = <&mpic>;
 161                                         interrupts = <8 1>;
 162                                         reg = <1>;
 163                                         device_type = "ethernet-phy";
 164                                 };
 165                                 phy2: ethernet-phy@2 {
 166                                         interrupt-parent = <&mpic>;
 167                                         interrupts = <8 1>;
 168                                         reg = <2>;
 169                                         device_type = "ethernet-phy";
 170                                 };
 171                                 phy3: ethernet-phy@3 {
 172                                         interrupt-parent = <&mpic>;
 173                                         interrupts = <8 1>;
 174                                         reg = <3>;
 175                                         device_type = "ethernet-phy";
 176                                 };
 177                                 tbi0: tbi-phy@11 {
 178                                         reg = <0x11>;
 179                                         device_type = "tbi-phy";
 180                                 };
 181                         };
 182                 };
 183
 184                 enet1: ethernet@25000 {
 185                         #address-cells = <1>;
 186                         #size-cells = <1>;
 187                         cell-index = <1>;
 188                         device_type = "network";
 189                         model = "TSEC";
 190                         compatible = "gianfar";
 191                         reg = <0x25000 0x1000>;
 192                         ranges = <0x0 0x25000 0x1000>;
 193                         local-mac-address = [ 00 00 00 00 00 00 ];
 194                         interrupts = <35 2 36 2 40 2>;
 195                         interrupt-parent = <&mpic>;
 196                         phy-handle = <&phy1>;
 197
 198                         mdio@520 {
 199                                 #address-cells = <1>;
 200                                 #size-cells = <0>;
 201                                 compatible = "fsl,gianfar-tbi";
 202                                 reg = <0x520 0x20>;
 203
 204                                 tbi1: tbi-phy@11 {
 205                                         reg = <0x11>;
 206                                         device_type = "tbi-phy";
 207                                 };
 208                         };
 209                 };
 210
 211                 enet2: ethernet@26000 {
 212                         #address-cells = <1>;
 213                         #size-cells = <1>;
 214                         cell-index = <2>;
 215                         device_type = "network";
 216                         model = "FEC";
 217                         compatible = "gianfar";
 218                         reg = <0x26000 0x1000>;
 219                         ranges = <0x0 0x26000 0x1000>;
 220                         local-mac-address = [ 00 00 00 00 00 00 ];
 221                         interrupts = <41 2>;
 222                         interrupt-parent = <&mpic>;
 223                         phy-handle = <&phy3>;
 224
 225                         mdio@520 {
 226                                 #address-cells = <1>;
 227                                 #size-cells = <0>;
 228                                 compatible = "fsl,gianfar-tbi";
 229                                 reg = <0x520 0x20>;
 230
 231                                 tbi2: tbi-phy@11 {
 232                                         reg = <0x11>;
 233                                         device_type = "tbi-phy";
 234                                 };
 235                         };
 236                 };
 237
 238                 serial0: serial@4500 {
 239                         cell-index = <0>;
 240                         device_type = "serial";
 241                         compatible = "ns16550";
 242                         reg = <0x4500 0x100>;   // reg base, size
 243                         clock-frequency = <0>;  // should we fill in in uboot?
 244                         interrupts = <42 2>;
 245                         interrupt-parent = <&mpic>;
 246                 };
 247
 248                 serial1: serial@4600 {
 249                         cell-index = <1>;
 250                         device_type = "serial";
 251                         compatible = "ns16550";
 252                         reg = <0x4600 0x100>;   // reg base, size
 253                         clock-frequency = <0>;  // should we fill in in uboot?
 254                         interrupts = <42 2>;
 255                         interrupt-parent = <&mpic>;
 256                 };
 257
 258                 mpic: pic@40000 {
 259                         interrupt-controller;
 260                         #address-cells = <0>;
 261                         #interrupt-cells = <2>;
 262                         reg = <0x40000 0x40000>;
 263                         device_type = "open-pic";
 264                         compatible = "chrp,open-pic";
 265                 };
 266         };
 267
 268         pci0: pci@e0008000 {
 269                 cell-index = <0>;
 270                 #interrupt-cells = <1>;
 271                 #size-cells = <2>;
 272                 #address-cells = <3>;
 273                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 274                 device_type = "pci";
 275                 reg = <0xe0008000 0x1000>;
 276                 clock-frequency = <66666666>;
 277                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 278                 interrupt-map = <
 279                                 /* IDSEL 28 */
 280                                  0xe000 0 0 1 &mpic 2 1
 281                                  0xe000 0 0 2 &mpic 3 1>;
 282
 283                 interrupt-parent = <&mpic>;
 284                 interrupts = <24 2>;
 285                 bus-range = <0 0>;
 286                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 287                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 288         };
 289 };