OMAP3: PM: Ensure MUSB block can idle when driver not loaded
[linux-ginger.git] / arch / sparc / kernel / sun4m_smp.c
blob960b113d0006f4ff61de665c2383dd4b522a4622
1 /* sun4m_smp.c: Sparc SUN4M SMP support.
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
4 */
6 #include <asm/head.h>
8 #include <linux/kernel.h>
9 #include <linux/sched.h>
10 #include <linux/threads.h>
11 #include <linux/smp.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel_stat.h>
14 #include <linux/init.h>
15 #include <linux/spinlock.h>
16 #include <linux/mm.h>
17 #include <linux/swap.h>
18 #include <linux/profile.h>
19 #include <linux/delay.h>
20 #include <linux/cpu.h>
22 #include <asm/cacheflush.h>
23 #include <asm/tlbflush.h>
24 #include <asm/irq_regs.h>
26 #include <asm/ptrace.h>
27 #include <asm/atomic.h>
29 #include <asm/irq.h>
30 #include <asm/page.h>
31 #include <asm/pgalloc.h>
32 #include <asm/pgtable.h>
33 #include <asm/oplib.h>
34 #include <asm/cpudata.h>
36 #include "irq.h"
38 #define IRQ_CROSS_CALL 15
40 extern ctxd_t *srmmu_ctx_table_phys;
42 extern volatile unsigned long cpu_callin_map[NR_CPUS];
43 extern unsigned char boot_cpu_id;
45 extern cpumask_t smp_commenced_mask;
47 extern int __smp4m_processor_id(void);
49 /*#define SMP_DEBUG*/
51 #ifdef SMP_DEBUG
52 #define SMP_PRINTK(x) printk x
53 #else
54 #define SMP_PRINTK(x)
55 #endif
57 static inline unsigned long
58 swap_ulong(volatile unsigned long *ptr, unsigned long val)
60 __asm__ __volatile__("swap [%1], %0\n\t" :
61 "=&r" (val), "=&r" (ptr) :
62 "0" (val), "1" (ptr));
63 return val;
66 static void smp_setup_percpu_timer(void);
67 extern void cpu_probe(void);
69 void __cpuinit smp4m_callin(void)
71 int cpuid = hard_smp_processor_id();
73 local_flush_cache_all();
74 local_flush_tlb_all();
76 notify_cpu_starting(cpuid);
78 /* Get our local ticker going. */
79 smp_setup_percpu_timer();
81 calibrate_delay();
82 smp_store_cpu_info(cpuid);
84 local_flush_cache_all();
85 local_flush_tlb_all();
88 * Unblock the master CPU _only_ when the scheduler state
89 * of all secondary CPUs will be up-to-date, so after
90 * the SMP initialization the master will be just allowed
91 * to call the scheduler code.
93 /* Allow master to continue. */
94 swap_ulong(&cpu_callin_map[cpuid], 1);
96 /* XXX: What's up with all the flushes? */
97 local_flush_cache_all();
98 local_flush_tlb_all();
100 cpu_probe();
102 /* Fix idle thread fields. */
103 __asm__ __volatile__("ld [%0], %%g6\n\t"
104 : : "r" (&current_set[cpuid])
105 : "memory" /* paranoid */);
107 /* Attach to the address space of init_task. */
108 atomic_inc(&init_mm.mm_count);
109 current->active_mm = &init_mm;
111 while (!cpu_isset(cpuid, smp_commenced_mask))
112 mb();
114 local_irq_enable();
116 set_cpu_online(cpuid, true);
120 * Cycle through the processors asking the PROM to start each one.
123 extern struct linux_prom_registers smp_penguin_ctable;
124 extern unsigned long trapbase_cpu1[];
125 extern unsigned long trapbase_cpu2[];
126 extern unsigned long trapbase_cpu3[];
128 void __init smp4m_boot_cpus(void)
130 smp_setup_percpu_timer();
131 local_flush_cache_all();
134 int __cpuinit smp4m_boot_one_cpu(int i)
136 extern unsigned long sun4m_cpu_startup;
137 unsigned long *entry = &sun4m_cpu_startup;
138 struct task_struct *p;
139 int timeout;
140 int cpu_node;
142 cpu_find_by_mid(i, &cpu_node);
144 /* Cook up an idler for this guy. */
145 p = fork_idle(i);
146 current_set[i] = task_thread_info(p);
147 /* See trampoline.S for details... */
148 entry += ((i-1) * 3);
151 * Initialize the contexts table
152 * Since the call to prom_startcpu() trashes the structure,
153 * we need to re-initialize it for each cpu
155 smp_penguin_ctable.which_io = 0;
156 smp_penguin_ctable.phys_addr = (unsigned int) srmmu_ctx_table_phys;
157 smp_penguin_ctable.reg_size = 0;
159 /* whirrr, whirrr, whirrrrrrrrr... */
160 printk("Starting CPU %d at %p\n", i, entry);
161 local_flush_cache_all();
162 prom_startcpu(cpu_node,
163 &smp_penguin_ctable, 0, (char *)entry);
165 /* wheee... it's going... */
166 for(timeout = 0; timeout < 10000; timeout++) {
167 if(cpu_callin_map[i])
168 break;
169 udelay(200);
172 if (!(cpu_callin_map[i])) {
173 printk("Processor %d is stuck.\n", i);
174 return -ENODEV;
177 local_flush_cache_all();
178 return 0;
181 void __init smp4m_smp_done(void)
183 int i, first;
184 int *prev;
186 /* setup cpu list for irq rotation */
187 first = 0;
188 prev = &first;
189 for_each_online_cpu(i) {
190 *prev = i;
191 prev = &cpu_data(i).next;
193 *prev = first;
194 local_flush_cache_all();
196 /* Free unneeded trap tables */
197 if (!cpu_isset(1, cpu_present_map)) {
198 ClearPageReserved(virt_to_page(trapbase_cpu1));
199 init_page_count(virt_to_page(trapbase_cpu1));
200 free_page((unsigned long)trapbase_cpu1);
201 totalram_pages++;
202 num_physpages++;
204 if (!cpu_isset(2, cpu_present_map)) {
205 ClearPageReserved(virt_to_page(trapbase_cpu2));
206 init_page_count(virt_to_page(trapbase_cpu2));
207 free_page((unsigned long)trapbase_cpu2);
208 totalram_pages++;
209 num_physpages++;
211 if (!cpu_isset(3, cpu_present_map)) {
212 ClearPageReserved(virt_to_page(trapbase_cpu3));
213 init_page_count(virt_to_page(trapbase_cpu3));
214 free_page((unsigned long)trapbase_cpu3);
215 totalram_pages++;
216 num_physpages++;
219 /* Ok, they are spinning and ready to go. */
222 /* At each hardware IRQ, we get this called to forward IRQ reception
223 * to the next processor. The caller must disable the IRQ level being
224 * serviced globally so that there are no double interrupts received.
226 * XXX See sparc64 irq.c.
228 void smp4m_irq_rotate(int cpu)
230 int next = cpu_data(cpu).next;
231 if (next != cpu)
232 set_irq_udt(next);
235 static struct smp_funcall {
236 smpfunc_t func;
237 unsigned long arg1;
238 unsigned long arg2;
239 unsigned long arg3;
240 unsigned long arg4;
241 unsigned long arg5;
242 unsigned long processors_in[SUN4M_NCPUS]; /* Set when ipi entered. */
243 unsigned long processors_out[SUN4M_NCPUS]; /* Set when ipi exited. */
244 } ccall_info;
246 static DEFINE_SPINLOCK(cross_call_lock);
248 /* Cross calls must be serialized, at least currently. */
249 static void smp4m_cross_call(smpfunc_t func, cpumask_t mask, unsigned long arg1,
250 unsigned long arg2, unsigned long arg3,
251 unsigned long arg4)
253 register int ncpus = SUN4M_NCPUS;
254 unsigned long flags;
256 spin_lock_irqsave(&cross_call_lock, flags);
258 /* Init function glue. */
259 ccall_info.func = func;
260 ccall_info.arg1 = arg1;
261 ccall_info.arg2 = arg2;
262 ccall_info.arg3 = arg3;
263 ccall_info.arg4 = arg4;
264 ccall_info.arg5 = 0;
266 /* Init receive/complete mapping, plus fire the IPI's off. */
268 register int i;
270 cpu_clear(smp_processor_id(), mask);
271 cpus_and(mask, cpu_online_map, mask);
272 for(i = 0; i < ncpus; i++) {
273 if (cpu_isset(i, mask)) {
274 ccall_info.processors_in[i] = 0;
275 ccall_info.processors_out[i] = 0;
276 set_cpu_int(i, IRQ_CROSS_CALL);
277 } else {
278 ccall_info.processors_in[i] = 1;
279 ccall_info.processors_out[i] = 1;
285 register int i;
287 i = 0;
288 do {
289 if (!cpu_isset(i, mask))
290 continue;
291 while(!ccall_info.processors_in[i])
292 barrier();
293 } while(++i < ncpus);
295 i = 0;
296 do {
297 if (!cpu_isset(i, mask))
298 continue;
299 while(!ccall_info.processors_out[i])
300 barrier();
301 } while(++i < ncpus);
304 spin_unlock_irqrestore(&cross_call_lock, flags);
307 /* Running cross calls. */
308 void smp4m_cross_call_irq(void)
310 int i = smp_processor_id();
312 ccall_info.processors_in[i] = 1;
313 ccall_info.func(ccall_info.arg1, ccall_info.arg2, ccall_info.arg3,
314 ccall_info.arg4, ccall_info.arg5);
315 ccall_info.processors_out[i] = 1;
318 extern void sun4m_clear_profile_irq(int cpu);
320 void smp4m_percpu_timer_interrupt(struct pt_regs *regs)
322 struct pt_regs *old_regs;
323 int cpu = smp_processor_id();
325 old_regs = set_irq_regs(regs);
327 sun4m_clear_profile_irq(cpu);
329 profile_tick(CPU_PROFILING);
331 if(!--prof_counter(cpu)) {
332 int user = user_mode(regs);
334 irq_enter();
335 update_process_times(user);
336 irq_exit();
338 prof_counter(cpu) = prof_multiplier(cpu);
340 set_irq_regs(old_regs);
343 extern unsigned int lvl14_resolution;
345 static void __cpuinit smp_setup_percpu_timer(void)
347 int cpu = smp_processor_id();
349 prof_counter(cpu) = prof_multiplier(cpu) = 1;
350 load_profile_irq(cpu, lvl14_resolution);
352 if(cpu == boot_cpu_id)
353 enable_pil_irq(14);
356 static void __init smp4m_blackbox_id(unsigned *addr)
358 int rd = *addr & 0x3e000000;
359 int rs1 = rd >> 11;
361 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
362 addr[1] = 0x8130200c | rd | rs1; /* srl reg, 0xc, reg */
363 addr[2] = 0x80082003 | rd | rs1; /* and reg, 3, reg */
366 static void __init smp4m_blackbox_current(unsigned *addr)
368 int rd = *addr & 0x3e000000;
369 int rs1 = rd >> 11;
371 addr[0] = 0x81580000 | rd; /* rd %tbr, reg */
372 addr[2] = 0x8130200a | rd | rs1; /* srl reg, 0xa, reg */
373 addr[4] = 0x8008200c | rd | rs1; /* and reg, 0xc, reg */
376 void __init sun4m_init_smp(void)
378 BTFIXUPSET_BLACKBOX(hard_smp_processor_id, smp4m_blackbox_id);
379 BTFIXUPSET_BLACKBOX(load_current, smp4m_blackbox_current);
380 BTFIXUPSET_CALL(smp_cross_call, smp4m_cross_call, BTFIXUPCALL_NORM);
381 BTFIXUPSET_CALL(__hard_smp_processor_id, __smp4m_processor_id, BTFIXUPCALL_NORM);