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OMAP3: PM: Ensure MUSB block can idle when driver not loaded
[linux-ginger.git] / drivers / net / e1000 / e1000_main.c
blobb1419e21b46b44b930c2ec974952ed2509363e09
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #define DRV_VERSION "7.3.21-k3-NAPI"
35 const char e1000_driver_version[] = DRV_VERSION;
36 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
37
38 /* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45 static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
82 /* required last entry */
83 {0,}
84 };
85
86 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
88 int e1000_up(struct e1000_adapter *adapter);
89 void e1000_down(struct e1000_adapter *adapter);
90 void e1000_reinit_locked(struct e1000_adapter *adapter);
91 void e1000_reset(struct e1000_adapter *adapter);
92 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
93 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
97 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
98 struct e1000_tx_ring *txdr);
99 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
100 struct e1000_rx_ring *rxdr);
101 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
102 struct e1000_tx_ring *tx_ring);
103 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
104 struct e1000_rx_ring *rx_ring);
105 void e1000_update_stats(struct e1000_adapter *adapter);
106
107 static int e1000_init_module(void);
108 static void e1000_exit_module(void);
109 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110 static void __devexit e1000_remove(struct pci_dev *pdev);
111 static int e1000_alloc_queues(struct e1000_adapter *adapter);
112 static int e1000_sw_init(struct e1000_adapter *adapter);
113 static int e1000_open(struct net_device *netdev);
114 static int e1000_close(struct net_device *netdev);
115 static void e1000_configure_tx(struct e1000_adapter *adapter);
116 static void e1000_configure_rx(struct e1000_adapter *adapter);
117 static void e1000_setup_rctl(struct e1000_adapter *adapter);
118 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
124 static void e1000_set_rx_mode(struct net_device *netdev);
125 static void e1000_update_phy_info(unsigned long data);
126 static void e1000_watchdog(unsigned long data);
127 static void e1000_82547_tx_fifo_stall(unsigned long data);
128 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131 static int e1000_set_mac(struct net_device *netdev, void *p);
132 static irqreturn_t e1000_intr(int irq, void *data);
133 static irqreturn_t e1000_intr_msi(int irq, void *data);
134 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
136 static int e1000_clean(struct napi_struct *napi, int budget);
137 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
140 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
143 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
146 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148 static void e1000_tx_timeout(struct net_device *dev);
149 static void e1000_reset_task(struct work_struct *work);
150 static void e1000_smartspeed(struct e1000_adapter *adapter);
151 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
153
154 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
155 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
157 static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
159 #ifdef CONFIG_PM
160 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
161 static int e1000_resume(struct pci_dev *pdev);
162 #endif
163 static void e1000_shutdown(struct pci_dev *pdev);
164
165 #ifdef CONFIG_NET_POLL_CONTROLLER
166 /* for netdump / net console */
167 static void e1000_netpoll (struct net_device *netdev);
168 #endif
169
170 #define COPYBREAK_DEFAULT 256
171 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172 module_param(copybreak, uint, 0644);
173 MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
176 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179 static void e1000_io_resume(struct pci_dev *pdev);
180
181 static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185 };
186
187 static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
192 #ifdef CONFIG_PM
193 /* Power Managment Hooks */
194 .suspend = e1000_suspend,
195 .resume = e1000_resume,
196 #endif
197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
199 };
200
201 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203 MODULE_LICENSE("GPL");
204 MODULE_VERSION(DRV_VERSION);
205
206 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207 module_param(debug, int, 0);
208 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210 /**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
217 static int __init e1000_init_module(void)
218 {
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
225 ret = pci_register_driver(&e1000_driver);
226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
233 return ret;
234 }
235
236 module_init(e1000_init_module);
237
238 /**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
245 static void __exit e1000_exit_module(void)
246 {
247 pci_unregister_driver(&e1000_driver);
248 }
249
250 module_exit(e1000_exit_module);
251
252 static int e1000_request_irq(struct e1000_adapter *adapter)
253 {
254 struct e1000_hw *hw = &adapter->hw;
255 struct net_device *netdev = adapter->netdev;
256 irq_handler_t handler = e1000_intr;
257 int irq_flags = IRQF_SHARED;
258 int err;
259
260 if (hw->mac_type >= e1000_82571) {
261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
263 handler = e1000_intr_msi;
264 irq_flags = 0;
265 }
266 }
267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
275 }
276
277 return err;
278 }
279
280 static void e1000_free_irq(struct e1000_adapter *adapter)
281 {
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
288 }
289
290 /**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
295 static void e1000_irq_disable(struct e1000_adapter *adapter)
296 {
297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
301 synchronize_irq(adapter->pdev->irq);
302 }
303
304 /**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
309 static void e1000_irq_enable(struct e1000_adapter *adapter)
310 {
311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
315 }
316
317 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
318 {
319 struct e1000_hw *hw = &adapter->hw;
320 struct net_device *netdev = adapter->netdev;
321 u16 vid = hw->mng_cookie.vlan_id;
322 u16 old_vid = adapter->mng_vlan_id;
323 if (adapter->vlgrp) {
324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
325 if (hw->mng_cookie.status &
326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
331
332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
333 (vid != old_vid) &&
334 !vlan_group_get_device(adapter->vlgrp, old_vid))
335 e1000_vlan_rx_kill_vid(netdev, old_vid);
336 } else
337 adapter->mng_vlan_id = vid;
338 }
339 }
340
341 /**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
348 * of the f/w this means that the network i/f is closed.
349 *
350 **/
351
352 static void e1000_release_hw_control(struct e1000_adapter *adapter)
353 {
354 u32 ctrl_ext;
355 u32 swsm;
356 struct e1000_hw *hw = &adapter->hw;
357
358 /* Let firmware taken over control of h/w */
359 switch (hw->mac_type) {
360 case e1000_82573:
361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
367 case e1000_ich8lan:
368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
370 break;
371 default:
372 break;
373 }
374 }
375
376 /**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
383 * of the f/w this means that the network i/f is open.
384 *
385 **/
386
387 static void e1000_get_hw_control(struct e1000_adapter *adapter)
388 {
389 u32 ctrl_ext;
390 u32 swsm;
391 struct e1000_hw *hw = &adapter->hw;
392
393 /* Let firmware know the driver has taken over */
394 switch (hw->mac_type) {
395 case e1000_82573:
396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
398 break;
399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
402 case e1000_ich8lan:
403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
405 break;
406 default:
407 break;
408 }
409 }
410
411 static void e1000_init_manageability(struct e1000_adapter *adapter)
412 {
413 struct e1000_hw *hw = &adapter->hw;
414
415 if (adapter->en_mng_pt) {
416 u32 manc = er32(MANC);
417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
426
427 manc |= E1000_MANC_EN_MNG2HOST;
428 #define E1000_MNG2HOST_PORT_623 (1 << 5)
429 #define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
432 ew32(MANC2H, manc2h);
433 }
434
435 ew32(MANC, manc);
436 }
437 }
438
439 static void e1000_release_manageability(struct e1000_adapter *adapter)
440 {
441 struct e1000_hw *hw = &adapter->hw;
442
443 if (adapter->en_mng_pt) {
444 u32 manc = er32(MANC);
445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
449 if (hw->has_manc2h)
450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
455 ew32(MANC, manc);
456 }
457 }
458
459 /**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463 static void e1000_configure(struct e1000_adapter *adapter)
464 {
465 struct net_device *netdev = adapter->netdev;
466 int i;
467
468 e1000_set_rx_mode(netdev);
469
470 e1000_restore_vlan(adapter);
471 e1000_init_manageability(adapter);
472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
479 for (i = 0; i < adapter->num_rx_queues; i++) {
480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
483 }
484
485 adapter->tx_queue_len = netdev->tx_queue_len;
486 }
487
488 int e1000_up(struct e1000_adapter *adapter)
489 {
490 struct e1000_hw *hw = &adapter->hw;
491
492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
496
497 napi_enable(&adapter->napi);
498
499 e1000_irq_enable(adapter);
500
501 /* fire a link change interrupt to start the watchdog */
502 ew32(ICS, E1000_ICS_LSC);
503 return 0;
504 }
505
506 /**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
516 void e1000_power_up_phy(struct e1000_adapter *adapter)
517 {
518 struct e1000_hw *hw = &adapter->hw;
519 u16 mii_reg = 0;
520
521 /* Just clear the power down bit to wake the phy back up */
522 if (hw->media_type == e1000_media_type_copper) {
523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
526 mii_reg &= ~MII_CR_POWER_DOWN;
527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
528 }
529 }
530
531 static void e1000_power_down_phy(struct e1000_adapter *adapter)
532 {
533 struct e1000_hw *hw = &adapter->hw;
534
535 /* Power down the PHY so no link is implied when interface is down *
536 * The PHY cannot be powered down if any of the following is true *
537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
542 u16 mii_reg = 0;
543
544 switch (hw->mac_type) {
545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
564 goto out;
565 break;
566 default:
567 goto out;
568 }
569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
570 mii_reg |= MII_CR_POWER_DOWN;
571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
572 mdelay(1);
573 }
574 out:
575 return;
576 }
577
578 void e1000_down(struct e1000_adapter *adapter)
579 {
580 struct e1000_hw *hw = &adapter->hw;
581 struct net_device *netdev = adapter->netdev;
582 u32 rctl, tctl;
583
584 /* signal that we're down so the interrupt handler does not
585 * reschedule our watchdog timer */
586 set_bit(__E1000_DOWN, &adapter->flags);
587
588 /* disable receives in the hardware */
589 rctl = er32(RCTL);
590 ew32(RCTL, rctl & ~E1000_RCTL_EN);
591 /* flush and sleep below */
592
593 /* can be netif_tx_disable when NETIF_F_LLTX is removed */
594 netif_stop_queue(netdev);
595
596 /* disable transmits in the hardware */
597 tctl = er32(TCTL);
598 tctl &= ~E1000_TCTL_EN;
599 ew32(TCTL, tctl);
600 /* flush both disables and wait for them to finish */
601 E1000_WRITE_FLUSH();
602 msleep(10);
603
604 napi_disable(&adapter->napi);
605
606 e1000_irq_disable(adapter);
607
608 del_timer_sync(&adapter->tx_fifo_stall_timer);
609 del_timer_sync(&adapter->watchdog_timer);
610 del_timer_sync(&adapter->phy_info_timer);
611
612 netdev->tx_queue_len = adapter->tx_queue_len;
613 adapter->link_speed = 0;
614 adapter->link_duplex = 0;
615 netif_carrier_off(netdev);
616
617 e1000_reset(adapter);
618 e1000_clean_all_tx_rings(adapter);
619 e1000_clean_all_rx_rings(adapter);
620 }
621
622 void e1000_reinit_locked(struct e1000_adapter *adapter)
623 {
624 WARN_ON(in_interrupt());
625 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
626 msleep(1);
627 e1000_down(adapter);
628 e1000_up(adapter);
629 clear_bit(__E1000_RESETTING, &adapter->flags);
630 }
631
632 void e1000_reset(struct e1000_adapter *adapter)
633 {
634 struct e1000_hw *hw = &adapter->hw;
635 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
636 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
637 bool legacy_pba_adjust = false;
638
639 /* Repartition Pba for greater than 9k mtu
640 * To take effect CTRL.RST is required.
641 */
642
643 switch (hw->mac_type) {
644 case e1000_82542_rev2_0:
645 case e1000_82542_rev2_1:
646 case e1000_82543:
647 case e1000_82544:
648 case e1000_82540:
649 case e1000_82541:
650 case e1000_82541_rev_2:
651 legacy_pba_adjust = true;
652 pba = E1000_PBA_48K;
653 break;
654 case e1000_82545:
655 case e1000_82545_rev_3:
656 case e1000_82546:
657 case e1000_82546_rev_3:
658 pba = E1000_PBA_48K;
659 break;
660 case e1000_82547:
661 case e1000_82547_rev_2:
662 legacy_pba_adjust = true;
663 pba = E1000_PBA_30K;
664 break;
665 case e1000_82571:
666 case e1000_82572:
667 case e1000_80003es2lan:
668 pba = E1000_PBA_38K;
669 break;
670 case e1000_82573:
671 pba = E1000_PBA_20K;
672 break;
673 case e1000_ich8lan:
674 pba = E1000_PBA_8K;
675 case e1000_undefined:
676 case e1000_num_macs:
677 break;
678 }
679
680 if (legacy_pba_adjust) {
681 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
682 pba -= 8; /* allocate more FIFO for Tx */
683
684 if (hw->mac_type == e1000_82547) {
685 adapter->tx_fifo_head = 0;
686 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
687 adapter->tx_fifo_size =
688 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
689 atomic_set(&adapter->tx_fifo_stall, 0);
690 }
691 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
692 /* adjust PBA for jumbo frames */
693 ew32(PBA, pba);
694
695 /* To maintain wire speed transmits, the Tx FIFO should be
696 * large enough to accomodate two full transmit packets,
697 * rounded up to the next 1KB and expressed in KB. Likewise,
698 * the Rx FIFO should be large enough to accomodate at least
699 * one full receive packet and is similarly rounded up and
700 * expressed in KB. */
701 pba = er32(PBA);
702 /* upper 16 bits has Tx packet buffer allocation size in KB */
703 tx_space = pba >> 16;
704 /* lower 16 bits has Rx packet buffer allocation size in KB */
705 pba &= 0xffff;
706 /* don't include ethernet FCS because hardware appends/strips */
707 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
708 VLAN_TAG_SIZE;
709 min_tx_space = min_rx_space;
710 min_tx_space *= 2;
711 min_tx_space = ALIGN(min_tx_space, 1024);
712 min_tx_space >>= 10;
713 min_rx_space = ALIGN(min_rx_space, 1024);
714 min_rx_space >>= 10;
715
716 /* If current Tx allocation is less than the min Tx FIFO size,
717 * and the min Tx FIFO size is less than the current Rx FIFO
718 * allocation, take space away from current Rx allocation */
719 if (tx_space < min_tx_space &&
720 ((min_tx_space - tx_space) < pba)) {
721 pba = pba - (min_tx_space - tx_space);
722
723 /* PCI/PCIx hardware has PBA alignment constraints */
724 switch (hw->mac_type) {
725 case e1000_82545 ... e1000_82546_rev_3:
726 pba &= ~(E1000_PBA_8K - 1);
727 break;
728 default:
729 break;
730 }
731
732 /* if short on rx space, rx wins and must trump tx
733 * adjustment or use Early Receive if available */
734 if (pba < min_rx_space) {
735 switch (hw->mac_type) {
736 case e1000_82573:
737 /* ERT enabled in e1000_configure_rx */
738 break;
739 default:
740 pba = min_rx_space;
741 break;
742 }
743 }
744 }
745 }
746
747 ew32(PBA, pba);
748
749 /* flow control settings */
750 /* Set the FC high water mark to 90% of the FIFO size.
751 * Required to clear last 3 LSB */
752 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
753 /* We can't use 90% on small FIFOs because the remainder
754 * would be less than 1 full frame. In this case, we size
755 * it to allow at least a full frame above the high water
756 * mark. */
757 if (pba < E1000_PBA_16K)
758 fc_high_water_mark = (pba * 1024) - 1600;
759
760 hw->fc_high_water = fc_high_water_mark;
761 hw->fc_low_water = fc_high_water_mark - 8;
762 if (hw->mac_type == e1000_80003es2lan)
763 hw->fc_pause_time = 0xFFFF;
764 else
765 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
766 hw->fc_send_xon = 1;
767 hw->fc = hw->original_fc;
768
769 /* Allow time for pending master requests to run */
770 e1000_reset_hw(hw);
771 if (hw->mac_type >= e1000_82544)
772 ew32(WUC, 0);
773
774 if (e1000_init_hw(hw))
775 DPRINTK(PROBE, ERR, "Hardware Error\n");
776 e1000_update_mng_vlan(adapter);
777
778 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
779 if (hw->mac_type >= e1000_82544 &&
780 hw->mac_type <= e1000_82547_rev_2 &&
781 hw->autoneg == 1 &&
782 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
783 u32 ctrl = er32(CTRL);
784 /* clear phy power management bit if we are in gig only mode,
785 * which if enabled will attempt negotiation to 100Mb, which
786 * can cause a loss of link at power off or driver unload */
787 ctrl &= ~E1000_CTRL_SWDPIN3;
788 ew32(CTRL, ctrl);
789 }
790
791 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
792 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
793
794 e1000_reset_adaptive(hw);
795 e1000_phy_get_info(hw, &adapter->phy_info);
796
797 if (!adapter->smart_power_down &&
798 (hw->mac_type == e1000_82571 ||
799 hw->mac_type == e1000_82572)) {
800 u16 phy_data = 0;
801 /* speed up time to link by disabling smart power down, ignore
802 * the return value of this function because there is nothing
803 * different we would do if it failed */
804 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
805 &phy_data);
806 phy_data &= ~IGP02E1000_PM_SPD;
807 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
808 phy_data);
809 }
810
811 e1000_release_manageability(adapter);
812 }
813
814 /**
815 * Dump the eeprom for users having checksum issues
816 **/
817 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
818 {
819 struct net_device *netdev = adapter->netdev;
820 struct ethtool_eeprom eeprom;
821 const struct ethtool_ops *ops = netdev->ethtool_ops;
822 u8 *data;
823 int i;
824 u16 csum_old, csum_new = 0;
825
826 eeprom.len = ops->get_eeprom_len(netdev);
827 eeprom.offset = 0;
828
829 data = kmalloc(eeprom.len, GFP_KERNEL);
830 if (!data) {
831 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
832 " data\n");
833 return;
834 }
835
836 ops->get_eeprom(netdev, &eeprom, data);
837
838 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
839 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
840 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
841 csum_new += data[i] + (data[i + 1] << 8);
842 csum_new = EEPROM_SUM - csum_new;
843
844 printk(KERN_ERR "/*********************/\n");
845 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
846 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
847
848 printk(KERN_ERR "Offset Values\n");
849 printk(KERN_ERR "======== ======\n");
850 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
851
852 printk(KERN_ERR "Include this output when contacting your support "
853 "provider.\n");
854 printk(KERN_ERR "This is not a software error! Something bad "
855 "happened to your hardware or\n");
856 printk(KERN_ERR "EEPROM image. Ignoring this "
857 "problem could result in further problems,\n");
858 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
859 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
860 "which is invalid\n");
861 printk(KERN_ERR "and requires you to set the proper MAC "
862 "address manually before continuing\n");
863 printk(KERN_ERR "to enable this network device.\n");
864 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
865 "to your hardware vendor\n");
866 printk(KERN_ERR "or Intel Customer Support.\n");
867 printk(KERN_ERR "/*********************/\n");
868
869 kfree(data);
870 }
871
872 /**
873 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
874 * @pdev: PCI device information struct
875 *
876 * Return true if an adapter needs ioport resources
877 **/
878 static int e1000_is_need_ioport(struct pci_dev *pdev)
879 {
880 switch (pdev->device) {
881 case E1000_DEV_ID_82540EM:
882 case E1000_DEV_ID_82540EM_LOM:
883 case E1000_DEV_ID_82540EP:
884 case E1000_DEV_ID_82540EP_LOM:
885 case E1000_DEV_ID_82540EP_LP:
886 case E1000_DEV_ID_82541EI:
887 case E1000_DEV_ID_82541EI_MOBILE:
888 case E1000_DEV_ID_82541ER:
889 case E1000_DEV_ID_82541ER_LOM:
890 case E1000_DEV_ID_82541GI:
891 case E1000_DEV_ID_82541GI_LF:
892 case E1000_DEV_ID_82541GI_MOBILE:
893 case E1000_DEV_ID_82544EI_COPPER:
894 case E1000_DEV_ID_82544EI_FIBER:
895 case E1000_DEV_ID_82544GC_COPPER:
896 case E1000_DEV_ID_82544GC_LOM:
897 case E1000_DEV_ID_82545EM_COPPER:
898 case E1000_DEV_ID_82545EM_FIBER:
899 case E1000_DEV_ID_82546EB_COPPER:
900 case E1000_DEV_ID_82546EB_FIBER:
901 case E1000_DEV_ID_82546EB_QUAD_COPPER:
902 return true;
903 default:
904 return false;
905 }
906 }
907
908 static const struct net_device_ops e1000_netdev_ops = {
909 .ndo_open = e1000_open,
910 .ndo_stop = e1000_close,
911 .ndo_start_xmit = e1000_xmit_frame,
912 .ndo_get_stats = e1000_get_stats,
913 .ndo_set_rx_mode = e1000_set_rx_mode,
914 .ndo_set_mac_address = e1000_set_mac,
915 .ndo_tx_timeout = e1000_tx_timeout,
916 .ndo_change_mtu = e1000_change_mtu,
917 .ndo_do_ioctl = e1000_ioctl,
918 .ndo_validate_addr = eth_validate_addr,
919
920 .ndo_vlan_rx_register = e1000_vlan_rx_register,
921 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
922 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
923 #ifdef CONFIG_NET_POLL_CONTROLLER
924 .ndo_poll_controller = e1000_netpoll,
925 #endif
926 };
927
928 /**
929 * e1000_probe - Device Initialization Routine
930 * @pdev: PCI device information struct
931 * @ent: entry in e1000_pci_tbl
932 *
933 * Returns 0 on success, negative on failure
934 *
935 * e1000_probe initializes an adapter identified by a pci_dev structure.
936 * The OS initialization, configuring of the adapter private structure,
937 * and a hardware reset occur.
938 **/
939 static int __devinit e1000_probe(struct pci_dev *pdev,
940 const struct pci_device_id *ent)
941 {
942 struct net_device *netdev;
943 struct e1000_adapter *adapter;
944 struct e1000_hw *hw;
945
946 static int cards_found = 0;
947 static int global_quad_port_a = 0; /* global ksp3 port a indication */
948 int i, err, pci_using_dac;
949 u16 eeprom_data = 0;
950 u16 eeprom_apme_mask = E1000_EEPROM_APME;
951 int bars, need_ioport;
952
953 /* do not allocate ioport bars when not needed */
954 need_ioport = e1000_is_need_ioport(pdev);
955 if (need_ioport) {
956 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
957 err = pci_enable_device(pdev);
958 } else {
959 bars = pci_select_bars(pdev, IORESOURCE_MEM);
960 err = pci_enable_device_mem(pdev);
961 }
962 if (err)
963 return err;
964
965 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
966 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
967 pci_using_dac = 1;
968 } else {
969 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
970 if (err) {
971 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
972 if (err) {
973 E1000_ERR("No usable DMA configuration, "
974 "aborting\n");
975 goto err_dma;
976 }
977 }
978 pci_using_dac = 0;
979 }
980
981 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
982 if (err)
983 goto err_pci_reg;
984
985 pci_set_master(pdev);
986
987 err = -ENOMEM;
988 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
989 if (!netdev)
990 goto err_alloc_etherdev;
991
992 SET_NETDEV_DEV(netdev, &pdev->dev);
993
994 pci_set_drvdata(pdev, netdev);
995 adapter = netdev_priv(netdev);
996 adapter->netdev = netdev;
997 adapter->pdev = pdev;
998 adapter->msg_enable = (1 << debug) - 1;
999 adapter->bars = bars;
1000 adapter->need_ioport = need_ioport;
1001
1002 hw = &adapter->hw;
1003 hw->back = adapter;
1004
1005 err = -EIO;
1006 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1007 if (!hw->hw_addr)
1008 goto err_ioremap;
1009
1010 if (adapter->need_ioport) {
1011 for (i = BAR_1; i <= BAR_5; i++) {
1012 if (pci_resource_len(pdev, i) == 0)
1013 continue;
1014 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1015 hw->io_base = pci_resource_start(pdev, i);
1016 break;
1017 }
1018 }
1019 }
1020
1021 netdev->netdev_ops = &e1000_netdev_ops;
1022 e1000_set_ethtool_ops(netdev);
1023 netdev->watchdog_timeo = 5 * HZ;
1024 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1025
1026 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1027
1028 adapter->bd_number = cards_found;
1029
1030 /* setup the private structure */
1031
1032 err = e1000_sw_init(adapter);
1033 if (err)
1034 goto err_sw_init;
1035
1036 err = -EIO;
1037 /* Flash BAR mapping must happen after e1000_sw_init
1038 * because it depends on mac_type */
1039 if ((hw->mac_type == e1000_ich8lan) &&
1040 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1041 hw->flash_address = pci_ioremap_bar(pdev, 1);
1042 if (!hw->flash_address)
1043 goto err_flashmap;
1044 }
1045
1046 if (e1000_check_phy_reset_block(hw))
1047 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1048
1049 if (hw->mac_type >= e1000_82543) {
1050 netdev->features = NETIF_F_SG |
1051 NETIF_F_HW_CSUM |
1052 NETIF_F_HW_VLAN_TX |
1053 NETIF_F_HW_VLAN_RX |
1054 NETIF_F_HW_VLAN_FILTER;
1055 if (hw->mac_type == e1000_ich8lan)
1056 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1057 }
1058
1059 if ((hw->mac_type >= e1000_82544) &&
1060 (hw->mac_type != e1000_82547))
1061 netdev->features |= NETIF_F_TSO;
1062
1063 if (hw->mac_type > e1000_82547_rev_2)
1064 netdev->features |= NETIF_F_TSO6;
1065 if (pci_using_dac)
1066 netdev->features |= NETIF_F_HIGHDMA;
1067
1068 netdev->vlan_features |= NETIF_F_TSO;
1069 netdev->vlan_features |= NETIF_F_TSO6;
1070 netdev->vlan_features |= NETIF_F_HW_CSUM;
1071 netdev->vlan_features |= NETIF_F_SG;
1072
1073 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
1074
1075 /* initialize eeprom parameters */
1076 if (e1000_init_eeprom_params(hw)) {
1077 E1000_ERR("EEPROM initialization failed\n");
1078 goto err_eeprom;
1079 }
1080
1081 /* before reading the EEPROM, reset the controller to
1082 * put the device in a known good starting state */
1083
1084 e1000_reset_hw(hw);
1085
1086 /* make sure the EEPROM is good */
1087 if (e1000_validate_eeprom_checksum(hw) < 0) {
1088 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1089 e1000_dump_eeprom(adapter);
1090 /*
1091 * set MAC address to all zeroes to invalidate and temporary
1092 * disable this device for the user. This blocks regular
1093 * traffic while still permitting ethtool ioctls from reaching
1094 * the hardware as well as allowing the user to run the
1095 * interface after manually setting a hw addr using
1096 * `ip set address`
1097 */
1098 memset(hw->mac_addr, 0, netdev->addr_len);
1099 } else {
1100 /* copy the MAC address out of the EEPROM */
1101 if (e1000_read_mac_addr(hw))
1102 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1103 }
1104 /* don't block initalization here due to bad MAC address */
1105 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1106 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1107
1108 if (!is_valid_ether_addr(netdev->perm_addr))
1109 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1110
1111 e1000_get_bus_info(hw);
1112
1113 init_timer(&adapter->tx_fifo_stall_timer);
1114 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1115 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1116
1117 init_timer(&adapter->watchdog_timer);
1118 adapter->watchdog_timer.function = &e1000_watchdog;
1119 adapter->watchdog_timer.data = (unsigned long) adapter;
1120
1121 init_timer(&adapter->phy_info_timer);
1122 adapter->phy_info_timer.function = &e1000_update_phy_info;
1123 adapter->phy_info_timer.data = (unsigned long)adapter;
1124
1125 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1126
1127 e1000_check_options(adapter);
1128
1129 /* Initial Wake on LAN setting
1130 * If APM wake is enabled in the EEPROM,
1131 * enable the ACPI Magic Packet filter
1132 */
1133
1134 switch (hw->mac_type) {
1135 case e1000_82542_rev2_0:
1136 case e1000_82542_rev2_1:
1137 case e1000_82543:
1138 break;
1139 case e1000_82544:
1140 e1000_read_eeprom(hw,
1141 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1142 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1143 break;
1144 case e1000_ich8lan:
1145 e1000_read_eeprom(hw,
1146 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1147 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1148 break;
1149 case e1000_82546:
1150 case e1000_82546_rev_3:
1151 case e1000_82571:
1152 case e1000_80003es2lan:
1153 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1154 e1000_read_eeprom(hw,
1155 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1156 break;
1157 }
1158 /* Fall Through */
1159 default:
1160 e1000_read_eeprom(hw,
1161 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1162 break;
1163 }
1164 if (eeprom_data & eeprom_apme_mask)
1165 adapter->eeprom_wol |= E1000_WUFC_MAG;
1166
1167 /* now that we have the eeprom settings, apply the special cases
1168 * where the eeprom may be wrong or the board simply won't support
1169 * wake on lan on a particular port */
1170 switch (pdev->device) {
1171 case E1000_DEV_ID_82546GB_PCIE:
1172 adapter->eeprom_wol = 0;
1173 break;
1174 case E1000_DEV_ID_82546EB_FIBER:
1175 case E1000_DEV_ID_82546GB_FIBER:
1176 case E1000_DEV_ID_82571EB_FIBER:
1177 /* Wake events only supported on port A for dual fiber
1178 * regardless of eeprom setting */
1179 if (er32(STATUS) & E1000_STATUS_FUNC_1)
1180 adapter->eeprom_wol = 0;
1181 break;
1182 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1183 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1184 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1185 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1186 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1187 /* if quad port adapter, disable WoL on all but port A */
1188 if (global_quad_port_a != 0)
1189 adapter->eeprom_wol = 0;
1190 else
1191 adapter->quad_port_a = 1;
1192 /* Reset for multiple quad port adapters */
1193 if (++global_quad_port_a == 4)
1194 global_quad_port_a = 0;
1195 break;
1196 }
1197
1198 /* initialize the wol settings based on the eeprom settings */
1199 adapter->wol = adapter->eeprom_wol;
1200 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1201
1202 /* print bus type/speed/width info */
1203 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1204 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1205 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1206 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1207 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1208 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1209 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1210 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1211 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1212 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1213 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1214 "32-bit"));
1215
1216 printk("%pM\n", netdev->dev_addr);
1217
1218 if (hw->bus_type == e1000_bus_type_pci_express) {
1219 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1220 "longer be supported by this driver in the future.\n",
1221 pdev->vendor, pdev->device);
1222 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1223 "driver instead.\n");
1224 }
1225
1226 /* reset the hardware with the new settings */
1227 e1000_reset(adapter);
1228
1229 /* If the controller is 82573 and f/w is AMT, do not set
1230 * DRV_LOAD until the interface is up. For all other cases,
1231 * let the f/w know that the h/w is now under the control
1232 * of the driver. */
1233 if (hw->mac_type != e1000_82573 ||
1234 !e1000_check_mng_mode(hw))
1235 e1000_get_hw_control(adapter);
1236
1237 /* tell the stack to leave us alone until e1000_open() is called */
1238 netif_carrier_off(netdev);
1239 netif_stop_queue(netdev);
1240
1241 strcpy(netdev->name, "eth%d");
1242 err = register_netdev(netdev);
1243 if (err)
1244 goto err_register;
1245
1246 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1247
1248 cards_found++;
1249 return 0;
1250
1251 err_register:
1252 e1000_release_hw_control(adapter);
1253 err_eeprom:
1254 if (!e1000_check_phy_reset_block(hw))
1255 e1000_phy_hw_reset(hw);
1256
1257 if (hw->flash_address)
1258 iounmap(hw->flash_address);
1259 err_flashmap:
1260 kfree(adapter->tx_ring);
1261 kfree(adapter->rx_ring);
1262 err_sw_init:
1263 iounmap(hw->hw_addr);
1264 err_ioremap:
1265 free_netdev(netdev);
1266 err_alloc_etherdev:
1267 pci_release_selected_regions(pdev, bars);
1268 err_pci_reg:
1269 err_dma:
1270 pci_disable_device(pdev);
1271 return err;
1272 }
1273
1274 /**
1275 * e1000_remove - Device Removal Routine
1276 * @pdev: PCI device information struct
1277 *
1278 * e1000_remove is called by the PCI subsystem to alert the driver
1279 * that it should release a PCI device. The could be caused by a
1280 * Hot-Plug event, or because the driver is going to be removed from
1281 * memory.
1282 **/
1283
1284 static void __devexit e1000_remove(struct pci_dev *pdev)
1285 {
1286 struct net_device *netdev = pci_get_drvdata(pdev);
1287 struct e1000_adapter *adapter = netdev_priv(netdev);
1288 struct e1000_hw *hw = &adapter->hw;
1289
1290 cancel_work_sync(&adapter->reset_task);
1291
1292 e1000_release_manageability(adapter);
1293
1294 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1295 * would have already happened in close and is redundant. */
1296 e1000_release_hw_control(adapter);
1297
1298 unregister_netdev(netdev);
1299
1300 if (!e1000_check_phy_reset_block(hw))
1301 e1000_phy_hw_reset(hw);
1302
1303 kfree(adapter->tx_ring);
1304 kfree(adapter->rx_ring);
1305
1306 iounmap(hw->hw_addr);
1307 if (hw->flash_address)
1308 iounmap(hw->flash_address);
1309 pci_release_selected_regions(pdev, adapter->bars);
1310
1311 free_netdev(netdev);
1312
1313 pci_disable_device(pdev);
1314 }
1315
1316 /**
1317 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1318 * @adapter: board private structure to initialize
1319 *
1320 * e1000_sw_init initializes the Adapter private data structure.
1321 * Fields are initialized based on PCI device information and
1322 * OS network device settings (MTU size).
1323 **/
1324
1325 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1326 {
1327 struct e1000_hw *hw = &adapter->hw;
1328 struct net_device *netdev = adapter->netdev;
1329 struct pci_dev *pdev = adapter->pdev;
1330
1331 /* PCI config space info */
1332
1333 hw->vendor_id = pdev->vendor;
1334 hw->device_id = pdev->device;
1335 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1336 hw->subsystem_id = pdev->subsystem_device;
1337 hw->revision_id = pdev->revision;
1338
1339 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1340
1341 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1342 hw->max_frame_size = netdev->mtu +
1343 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1344 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1345
1346 /* identify the MAC */
1347
1348 if (e1000_set_mac_type(hw)) {
1349 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1350 return -EIO;
1351 }
1352
1353 switch (hw->mac_type) {
1354 default:
1355 break;
1356 case e1000_82541:
1357 case e1000_82547:
1358 case e1000_82541_rev_2:
1359 case e1000_82547_rev_2:
1360 hw->phy_init_script = 1;
1361 break;
1362 }
1363
1364 e1000_set_media_type(hw);
1365
1366 hw->wait_autoneg_complete = false;
1367 hw->tbi_compatibility_en = true;
1368 hw->adaptive_ifs = true;
1369
1370 /* Copper options */
1371
1372 if (hw->media_type == e1000_media_type_copper) {
1373 hw->mdix = AUTO_ALL_MODES;
1374 hw->disable_polarity_correction = false;
1375 hw->master_slave = E1000_MASTER_SLAVE;
1376 }
1377
1378 adapter->num_tx_queues = 1;
1379 adapter->num_rx_queues = 1;
1380
1381 if (e1000_alloc_queues(adapter)) {
1382 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1383 return -ENOMEM;
1384 }
1385
1386 /* Explicitly disable IRQ since the NIC can be in any state. */
1387 e1000_irq_disable(adapter);
1388
1389 spin_lock_init(&adapter->stats_lock);
1390
1391 set_bit(__E1000_DOWN, &adapter->flags);
1392
1393 return 0;
1394 }
1395
1396 /**
1397 * e1000_alloc_queues - Allocate memory for all rings
1398 * @adapter: board private structure to initialize
1399 *
1400 * We allocate one ring per queue at run-time since we don't know the
1401 * number of queues at compile-time.
1402 **/
1403
1404 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1405 {
1406 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1407 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1408 if (!adapter->tx_ring)
1409 return -ENOMEM;
1410
1411 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1412 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1413 if (!adapter->rx_ring) {
1414 kfree(adapter->tx_ring);
1415 return -ENOMEM;
1416 }
1417
1418 return E1000_SUCCESS;
1419 }
1420
1421 /**
1422 * e1000_open - Called when a network interface is made active
1423 * @netdev: network interface device structure
1424 *
1425 * Returns 0 on success, negative value on failure
1426 *
1427 * The open entry point is called when a network interface is made
1428 * active by the system (IFF_UP). At this point all resources needed
1429 * for transmit and receive operations are allocated, the interrupt
1430 * handler is registered with the OS, the watchdog timer is started,
1431 * and the stack is notified that the interface is ready.
1432 **/
1433
1434 static int e1000_open(struct net_device *netdev)
1435 {
1436 struct e1000_adapter *adapter = netdev_priv(netdev);
1437 struct e1000_hw *hw = &adapter->hw;
1438 int err;
1439
1440 /* disallow open during test */
1441 if (test_bit(__E1000_TESTING, &adapter->flags))
1442 return -EBUSY;
1443
1444 /* allocate transmit descriptors */
1445 err = e1000_setup_all_tx_resources(adapter);
1446 if (err)
1447 goto err_setup_tx;
1448
1449 /* allocate receive descriptors */
1450 err = e1000_setup_all_rx_resources(adapter);
1451 if (err)
1452 goto err_setup_rx;
1453
1454 e1000_power_up_phy(adapter);
1455
1456 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1457 if ((hw->mng_cookie.status &
1458 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1459 e1000_update_mng_vlan(adapter);
1460 }
1461
1462 /* If AMT is enabled, let the firmware know that the network
1463 * interface is now open */
1464 if (hw->mac_type == e1000_82573 &&
1465 e1000_check_mng_mode(hw))
1466 e1000_get_hw_control(adapter);
1467
1468 /* before we allocate an interrupt, we must be ready to handle it.
1469 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1470 * as soon as we call pci_request_irq, so we have to setup our
1471 * clean_rx handler before we do so. */
1472 e1000_configure(adapter);
1473
1474 err = e1000_request_irq(adapter);
1475 if (err)
1476 goto err_req_irq;
1477
1478 /* From here on the code is the same as e1000_up() */
1479 clear_bit(__E1000_DOWN, &adapter->flags);
1480
1481 napi_enable(&adapter->napi);
1482
1483 e1000_irq_enable(adapter);
1484
1485 netif_start_queue(netdev);
1486
1487 /* fire a link status change interrupt to start the watchdog */
1488 ew32(ICS, E1000_ICS_LSC);
1489
1490 return E1000_SUCCESS;
1491
1492 err_req_irq:
1493 e1000_release_hw_control(adapter);
1494 e1000_power_down_phy(adapter);
1495 e1000_free_all_rx_resources(adapter);
1496 err_setup_rx:
1497 e1000_free_all_tx_resources(adapter);
1498 err_setup_tx:
1499 e1000_reset(adapter);
1500
1501 return err;
1502 }
1503
1504 /**
1505 * e1000_close - Disables a network interface
1506 * @netdev: network interface device structure
1507 *
1508 * Returns 0, this is not allowed to fail
1509 *
1510 * The close entry point is called when an interface is de-activated
1511 * by the OS. The hardware is still under the drivers control, but
1512 * needs to be disabled. A global MAC reset is issued to stop the
1513 * hardware, and all transmit and receive resources are freed.
1514 **/
1515
1516 static int e1000_close(struct net_device *netdev)
1517 {
1518 struct e1000_adapter *adapter = netdev_priv(netdev);
1519 struct e1000_hw *hw = &adapter->hw;
1520
1521 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1522 e1000_down(adapter);
1523 e1000_power_down_phy(adapter);
1524 e1000_free_irq(adapter);
1525
1526 e1000_free_all_tx_resources(adapter);
1527 e1000_free_all_rx_resources(adapter);
1528
1529 /* kill manageability vlan ID if supported, but not if a vlan with
1530 * the same ID is registered on the host OS (let 8021q kill it) */
1531 if ((hw->mng_cookie.status &
1532 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1533 !(adapter->vlgrp &&
1534 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1535 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1536 }
1537
1538 /* If AMT is enabled, let the firmware know that the network
1539 * interface is now closed */
1540 if (hw->mac_type == e1000_82573 &&
1541 e1000_check_mng_mode(hw))
1542 e1000_release_hw_control(adapter);
1543
1544 return 0;
1545 }
1546
1547 /**
1548 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1549 * @adapter: address of board private structure
1550 * @start: address of beginning of memory
1551 * @len: length of memory
1552 **/
1553 static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1554 unsigned long len)
1555 {
1556 struct e1000_hw *hw = &adapter->hw;
1557 unsigned long begin = (unsigned long)start;
1558 unsigned long end = begin + len;
1559
1560 /* First rev 82545 and 82546 need to not allow any memory
1561 * write location to cross 64k boundary due to errata 23 */
1562 if (hw->mac_type == e1000_82545 ||
1563 hw->mac_type == e1000_82546) {
1564 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1565 }
1566
1567 return true;
1568 }
1569
1570 /**
1571 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1572 * @adapter: board private structure
1573 * @txdr: tx descriptor ring (for a specific queue) to setup
1574 *
1575 * Return 0 on success, negative on failure
1576 **/
1577
1578 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1579 struct e1000_tx_ring *txdr)
1580 {
1581 struct pci_dev *pdev = adapter->pdev;
1582 int size;
1583
1584 size = sizeof(struct e1000_buffer) * txdr->count;
1585 txdr->buffer_info = vmalloc(size);
1586 if (!txdr->buffer_info) {
1587 DPRINTK(PROBE, ERR,
1588 "Unable to allocate memory for the transmit descriptor ring\n");
1589 return -ENOMEM;
1590 }
1591 memset(txdr->buffer_info, 0, size);
1592
1593 /* round up to nearest 4K */
1594
1595 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1596 txdr->size = ALIGN(txdr->size, 4096);
1597
1598 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1599 if (!txdr->desc) {
1600 setup_tx_desc_die:
1601 vfree(txdr->buffer_info);
1602 DPRINTK(PROBE, ERR,
1603 "Unable to allocate memory for the transmit descriptor ring\n");
1604 return -ENOMEM;
1605 }
1606
1607 /* Fix for errata 23, can't cross 64kB boundary */
1608 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1609 void *olddesc = txdr->desc;
1610 dma_addr_t olddma = txdr->dma;
1611 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1612 "at %p\n", txdr->size, txdr->desc);
1613 /* Try again, without freeing the previous */
1614 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1615 /* Failed allocation, critical failure */
1616 if (!txdr->desc) {
1617 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1618 goto setup_tx_desc_die;
1619 }
1620
1621 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1622 /* give up */
1623 pci_free_consistent(pdev, txdr->size, txdr->desc,
1624 txdr->dma);
1625 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1626 DPRINTK(PROBE, ERR,
1627 "Unable to allocate aligned memory "
1628 "for the transmit descriptor ring\n");
1629 vfree(txdr->buffer_info);
1630 return -ENOMEM;
1631 } else {
1632 /* Free old allocation, new allocation was successful */
1633 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1634 }
1635 }
1636 memset(txdr->desc, 0, txdr->size);
1637
1638 txdr->next_to_use = 0;
1639 txdr->next_to_clean = 0;
1640
1641 return 0;
1642 }
1643
1644 /**
1645 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1646 * (Descriptors) for all queues
1647 * @adapter: board private structure
1648 *
1649 * Return 0 on success, negative on failure
1650 **/
1651
1652 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1653 {
1654 int i, err = 0;
1655
1656 for (i = 0; i < adapter->num_tx_queues; i++) {
1657 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1658 if (err) {
1659 DPRINTK(PROBE, ERR,
1660 "Allocation for Tx Queue %u failed\n", i);
1661 for (i-- ; i >= 0; i--)
1662 e1000_free_tx_resources(adapter,
1663 &adapter->tx_ring[i]);
1664 break;
1665 }
1666 }
1667
1668 return err;
1669 }
1670
1671 /**
1672 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1673 * @adapter: board private structure
1674 *
1675 * Configure the Tx unit of the MAC after a reset.
1676 **/
1677
1678 static void e1000_configure_tx(struct e1000_adapter *adapter)
1679 {
1680 u64 tdba;
1681 struct e1000_hw *hw = &adapter->hw;
1682 u32 tdlen, tctl, tipg, tarc;
1683 u32 ipgr1, ipgr2;
1684
1685 /* Setup the HW Tx Head and Tail descriptor pointers */
1686
1687 switch (adapter->num_tx_queues) {
1688 case 1:
1689 default:
1690 tdba = adapter->tx_ring[0].dma;
1691 tdlen = adapter->tx_ring[0].count *
1692 sizeof(struct e1000_tx_desc);
1693 ew32(TDLEN, tdlen);
1694 ew32(TDBAH, (tdba >> 32));
1695 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1696 ew32(TDT, 0);
1697 ew32(TDH, 0);
1698 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1699 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1700 break;
1701 }
1702
1703 /* Set the default values for the Tx Inter Packet Gap timer */
1704 if (hw->mac_type <= e1000_82547_rev_2 &&
1705 (hw->media_type == e1000_media_type_fiber ||
1706 hw->media_type == e1000_media_type_internal_serdes))
1707 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1708 else
1709 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1710
1711 switch (hw->mac_type) {
1712 case e1000_82542_rev2_0:
1713 case e1000_82542_rev2_1:
1714 tipg = DEFAULT_82542_TIPG_IPGT;
1715 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1716 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1717 break;
1718 case e1000_80003es2lan:
1719 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1720 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1721 break;
1722 default:
1723 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1724 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1725 break;
1726 }
1727 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1728 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1729 ew32(TIPG, tipg);
1730
1731 /* Set the Tx Interrupt Delay register */
1732
1733 ew32(TIDV, adapter->tx_int_delay);
1734 if (hw->mac_type >= e1000_82540)
1735 ew32(TADV, adapter->tx_abs_int_delay);
1736
1737 /* Program the Transmit Control Register */
1738
1739 tctl = er32(TCTL);
1740 tctl &= ~E1000_TCTL_CT;
1741 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1742 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1743
1744 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1745 tarc = er32(TARC0);
1746 /* set the speed mode bit, we'll clear it if we're not at
1747 * gigabit link later */
1748 tarc |= (1 << 21);
1749 ew32(TARC0, tarc);
1750 } else if (hw->mac_type == e1000_80003es2lan) {
1751 tarc = er32(TARC0);
1752 tarc |= 1;
1753 ew32(TARC0, tarc);
1754 tarc = er32(TARC1);
1755 tarc |= 1;
1756 ew32(TARC1, tarc);
1757 }
1758
1759 e1000_config_collision_dist(hw);
1760
1761 /* Setup Transmit Descriptor Settings for eop descriptor */
1762 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1763
1764 /* only set IDE if we are delaying interrupts using the timers */
1765 if (adapter->tx_int_delay)
1766 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1767
1768 if (hw->mac_type < e1000_82543)
1769 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1770 else
1771 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1772
1773 /* Cache if we're 82544 running in PCI-X because we'll
1774 * need this to apply a workaround later in the send path. */
1775 if (hw->mac_type == e1000_82544 &&
1776 hw->bus_type == e1000_bus_type_pcix)
1777 adapter->pcix_82544 = 1;
1778
1779 ew32(TCTL, tctl);
1780
1781 }
1782
1783 /**
1784 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1785 * @adapter: board private structure
1786 * @rxdr: rx descriptor ring (for a specific queue) to setup
1787 *
1788 * Returns 0 on success, negative on failure
1789 **/
1790
1791 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1792 struct e1000_rx_ring *rxdr)
1793 {
1794 struct e1000_hw *hw = &adapter->hw;
1795 struct pci_dev *pdev = adapter->pdev;
1796 int size, desc_len;
1797
1798 size = sizeof(struct e1000_buffer) * rxdr->count;
1799 rxdr->buffer_info = vmalloc(size);
1800 if (!rxdr->buffer_info) {
1801 DPRINTK(PROBE, ERR,
1802 "Unable to allocate memory for the receive descriptor ring\n");
1803 return -ENOMEM;
1804 }
1805 memset(rxdr->buffer_info, 0, size);
1806
1807 if (hw->mac_type <= e1000_82547_rev_2)
1808 desc_len = sizeof(struct e1000_rx_desc);
1809 else
1810 desc_len = sizeof(union e1000_rx_desc_packet_split);
1811
1812 /* Round up to nearest 4K */
1813
1814 rxdr->size = rxdr->count * desc_len;
1815 rxdr->size = ALIGN(rxdr->size, 4096);
1816
1817 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1818
1819 if (!rxdr->desc) {
1820 DPRINTK(PROBE, ERR,
1821 "Unable to allocate memory for the receive descriptor ring\n");
1822 setup_rx_desc_die:
1823 vfree(rxdr->buffer_info);
1824 return -ENOMEM;
1825 }
1826
1827 /* Fix for errata 23, can't cross 64kB boundary */
1828 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1829 void *olddesc = rxdr->desc;
1830 dma_addr_t olddma = rxdr->dma;
1831 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1832 "at %p\n", rxdr->size, rxdr->desc);
1833 /* Try again, without freeing the previous */
1834 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1835 /* Failed allocation, critical failure */
1836 if (!rxdr->desc) {
1837 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1838 DPRINTK(PROBE, ERR,
1839 "Unable to allocate memory "
1840 "for the receive descriptor ring\n");
1841 goto setup_rx_desc_die;
1842 }
1843
1844 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1845 /* give up */
1846 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1847 rxdr->dma);
1848 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1849 DPRINTK(PROBE, ERR,
1850 "Unable to allocate aligned memory "
1851 "for the receive descriptor ring\n");
1852 goto setup_rx_desc_die;
1853 } else {
1854 /* Free old allocation, new allocation was successful */
1855 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1856 }
1857 }
1858 memset(rxdr->desc, 0, rxdr->size);
1859
1860 rxdr->next_to_clean = 0;
1861 rxdr->next_to_use = 0;
1862
1863 return 0;
1864 }
1865
1866 /**
1867 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1868 * (Descriptors) for all queues
1869 * @adapter: board private structure
1870 *
1871 * Return 0 on success, negative on failure
1872 **/
1873
1874 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1875 {
1876 int i, err = 0;
1877
1878 for (i = 0; i < adapter->num_rx_queues; i++) {
1879 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1880 if (err) {
1881 DPRINTK(PROBE, ERR,
1882 "Allocation for Rx Queue %u failed\n", i);
1883 for (i-- ; i >= 0; i--)
1884 e1000_free_rx_resources(adapter,
1885 &adapter->rx_ring[i]);
1886 break;
1887 }
1888 }
1889
1890 return err;
1891 }
1892
1893 /**
1894 * e1000_setup_rctl - configure the receive control registers
1895 * @adapter: Board private structure
1896 **/
1897 static void e1000_setup_rctl(struct e1000_adapter *adapter)
1898 {
1899 struct e1000_hw *hw = &adapter->hw;
1900 u32 rctl;
1901
1902 rctl = er32(RCTL);
1903
1904 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1905
1906 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1907 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1908 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1909
1910 if (hw->tbi_compatibility_on == 1)
1911 rctl |= E1000_RCTL_SBP;
1912 else
1913 rctl &= ~E1000_RCTL_SBP;
1914
1915 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1916 rctl &= ~E1000_RCTL_LPE;
1917 else
1918 rctl |= E1000_RCTL_LPE;
1919
1920 /* Setup buffer sizes */
1921 rctl &= ~E1000_RCTL_SZ_4096;
1922 rctl |= E1000_RCTL_BSEX;
1923 switch (adapter->rx_buffer_len) {
1924 case E1000_RXBUFFER_256:
1925 rctl |= E1000_RCTL_SZ_256;
1926 rctl &= ~E1000_RCTL_BSEX;
1927 break;
1928 case E1000_RXBUFFER_512:
1929 rctl |= E1000_RCTL_SZ_512;
1930 rctl &= ~E1000_RCTL_BSEX;
1931 break;
1932 case E1000_RXBUFFER_1024:
1933 rctl |= E1000_RCTL_SZ_1024;
1934 rctl &= ~E1000_RCTL_BSEX;
1935 break;
1936 case E1000_RXBUFFER_2048:
1937 default:
1938 rctl |= E1000_RCTL_SZ_2048;
1939 rctl &= ~E1000_RCTL_BSEX;
1940 break;
1941 case E1000_RXBUFFER_4096:
1942 rctl |= E1000_RCTL_SZ_4096;
1943 break;
1944 case E1000_RXBUFFER_8192:
1945 rctl |= E1000_RCTL_SZ_8192;
1946 break;
1947 case E1000_RXBUFFER_16384:
1948 rctl |= E1000_RCTL_SZ_16384;
1949 break;
1950 }
1951
1952 ew32(RCTL, rctl);
1953 }
1954
1955 /**
1956 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1957 * @adapter: board private structure
1958 *
1959 * Configure the Rx unit of the MAC after a reset.
1960 **/
1961
1962 static void e1000_configure_rx(struct e1000_adapter *adapter)
1963 {
1964 u64 rdba;
1965 struct e1000_hw *hw = &adapter->hw;
1966 u32 rdlen, rctl, rxcsum, ctrl_ext;
1967
1968 rdlen = adapter->rx_ring[0].count *
1969 sizeof(struct e1000_rx_desc);
1970 adapter->clean_rx = e1000_clean_rx_irq;
1971 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1972
1973 /* disable receives while setting up the descriptors */
1974 rctl = er32(RCTL);
1975 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1976
1977 /* set the Receive Delay Timer Register */
1978 ew32(RDTR, adapter->rx_int_delay);
1979
1980 if (hw->mac_type >= e1000_82540) {
1981 ew32(RADV, adapter->rx_abs_int_delay);
1982 if (adapter->itr_setting != 0)
1983 ew32(ITR, 1000000000 / (adapter->itr * 256));
1984 }
1985
1986 if (hw->mac_type >= e1000_82571) {
1987 ctrl_ext = er32(CTRL_EXT);
1988 /* Reset delay timers after every interrupt */
1989 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1990 /* Auto-Mask interrupts upon ICR access */
1991 ctrl_ext |= E1000_CTRL_EXT_IAME;
1992 ew32(IAM, 0xffffffff);
1993 ew32(CTRL_EXT, ctrl_ext);
1994 E1000_WRITE_FLUSH();
1995 }
1996
1997 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1998 * the Base and Length of the Rx Descriptor Ring */
1999 switch (adapter->num_rx_queues) {
2000 case 1:
2001 default:
2002 rdba = adapter->rx_ring[0].dma;
2003 ew32(RDLEN, rdlen);
2004 ew32(RDBAH, (rdba >> 32));
2005 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2006 ew32(RDT, 0);
2007 ew32(RDH, 0);
2008 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2009 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2010 break;
2011 }
2012
2013 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2014 if (hw->mac_type >= e1000_82543) {
2015 rxcsum = er32(RXCSUM);
2016 if (adapter->rx_csum)
2017 rxcsum |= E1000_RXCSUM_TUOFL;
2018 else
2019 /* don't need to clear IPPCSE as it defaults to 0 */
2020 rxcsum &= ~E1000_RXCSUM_TUOFL;
2021 ew32(RXCSUM, rxcsum);
2022 }
2023
2024 /* Enable Receives */
2025 ew32(RCTL, rctl);
2026 }
2027
2028 /**
2029 * e1000_free_tx_resources - Free Tx Resources per Queue
2030 * @adapter: board private structure
2031 * @tx_ring: Tx descriptor ring for a specific queue
2032 *
2033 * Free all transmit software resources
2034 **/
2035
2036 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2037 struct e1000_tx_ring *tx_ring)
2038 {
2039 struct pci_dev *pdev = adapter->pdev;
2040
2041 e1000_clean_tx_ring(adapter, tx_ring);
2042
2043 vfree(tx_ring->buffer_info);
2044 tx_ring->buffer_info = NULL;
2045
2046 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2047
2048 tx_ring->desc = NULL;
2049 }
2050
2051 /**
2052 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2053 * @adapter: board private structure
2054 *
2055 * Free all transmit software resources
2056 **/
2057
2058 void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2059 {
2060 int i;
2061
2062 for (i = 0; i < adapter->num_tx_queues; i++)
2063 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2064 }
2065
2066 static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2067 struct e1000_buffer *buffer_info)
2068 {
2069 buffer_info->dma = 0;
2070 if (buffer_info->skb) {
2071 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
2072 DMA_TO_DEVICE);
2073 dev_kfree_skb_any(buffer_info->skb);
2074 buffer_info->skb = NULL;
2075 }
2076 buffer_info->time_stamp = 0;
2077 /* buffer_info must be completely set up in the transmit path */
2078 }
2079
2080 /**
2081 * e1000_clean_tx_ring - Free Tx Buffers
2082 * @adapter: board private structure
2083 * @tx_ring: ring to be cleaned
2084 **/
2085
2086 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2087 struct e1000_tx_ring *tx_ring)
2088 {
2089 struct e1000_hw *hw = &adapter->hw;
2090 struct e1000_buffer *buffer_info;
2091 unsigned long size;
2092 unsigned int i;
2093
2094 /* Free all the Tx ring sk_buffs */
2095
2096 for (i = 0; i < tx_ring->count; i++) {
2097 buffer_info = &tx_ring->buffer_info[i];
2098 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2099 }
2100
2101 size = sizeof(struct e1000_buffer) * tx_ring->count;
2102 memset(tx_ring->buffer_info, 0, size);
2103
2104 /* Zero out the descriptor ring */
2105
2106 memset(tx_ring->desc, 0, tx_ring->size);
2107
2108 tx_ring->next_to_use = 0;
2109 tx_ring->next_to_clean = 0;
2110 tx_ring->last_tx_tso = 0;
2111
2112 writel(0, hw->hw_addr + tx_ring->tdh);
2113 writel(0, hw->hw_addr + tx_ring->tdt);
2114 }
2115
2116 /**
2117 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2118 * @adapter: board private structure
2119 **/
2120
2121 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2122 {
2123 int i;
2124
2125 for (i = 0; i < adapter->num_tx_queues; i++)
2126 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2127 }
2128
2129 /**
2130 * e1000_free_rx_resources - Free Rx Resources
2131 * @adapter: board private structure
2132 * @rx_ring: ring to clean the resources from
2133 *
2134 * Free all receive software resources
2135 **/
2136
2137 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2138 struct e1000_rx_ring *rx_ring)
2139 {
2140 struct pci_dev *pdev = adapter->pdev;
2141
2142 e1000_clean_rx_ring(adapter, rx_ring);
2143
2144 vfree(rx_ring->buffer_info);
2145 rx_ring->buffer_info = NULL;
2146
2147 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2148
2149 rx_ring->desc = NULL;
2150 }
2151
2152 /**
2153 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2154 * @adapter: board private structure
2155 *
2156 * Free all receive software resources
2157 **/
2158
2159 void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2160 {
2161 int i;
2162
2163 for (i = 0; i < adapter->num_rx_queues; i++)
2164 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2165 }
2166
2167 /**
2168 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2169 * @adapter: board private structure
2170 * @rx_ring: ring to free buffers from
2171 **/
2172
2173 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2174 struct e1000_rx_ring *rx_ring)
2175 {
2176 struct e1000_hw *hw = &adapter->hw;
2177 struct e1000_buffer *buffer_info;
2178 struct pci_dev *pdev = adapter->pdev;
2179 unsigned long size;
2180 unsigned int i;
2181
2182 /* Free all the Rx ring sk_buffs */
2183 for (i = 0; i < rx_ring->count; i++) {
2184 buffer_info = &rx_ring->buffer_info[i];
2185 if (buffer_info->skb) {
2186 pci_unmap_single(pdev,
2187 buffer_info->dma,
2188 buffer_info->length,
2189 PCI_DMA_FROMDEVICE);
2190
2191 dev_kfree_skb(buffer_info->skb);
2192 buffer_info->skb = NULL;
2193 }
2194 }
2195
2196 size = sizeof(struct e1000_buffer) * rx_ring->count;
2197 memset(rx_ring->buffer_info, 0, size);
2198
2199 /* Zero out the descriptor ring */
2200
2201 memset(rx_ring->desc, 0, rx_ring->size);
2202
2203 rx_ring->next_to_clean = 0;
2204 rx_ring->next_to_use = 0;
2205
2206 writel(0, hw->hw_addr + rx_ring->rdh);
2207 writel(0, hw->hw_addr + rx_ring->rdt);
2208 }
2209
2210 /**
2211 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2212 * @adapter: board private structure
2213 **/
2214
2215 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2216 {
2217 int i;
2218
2219 for (i = 0; i < adapter->num_rx_queues; i++)
2220 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2221 }
2222
2223 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2224 * and memory write and invalidate disabled for certain operations
2225 */
2226 static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
2227 {
2228 struct e1000_hw *hw = &adapter->hw;
2229 struct net_device *netdev = adapter->netdev;
2230 u32 rctl;
2231
2232 e1000_pci_clear_mwi(hw);
2233
2234 rctl = er32(RCTL);
2235 rctl |= E1000_RCTL_RST;
2236 ew32(RCTL, rctl);
2237 E1000_WRITE_FLUSH();
2238 mdelay(5);
2239
2240 if (netif_running(netdev))
2241 e1000_clean_all_rx_rings(adapter);
2242 }
2243
2244 static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
2245 {
2246 struct e1000_hw *hw = &adapter->hw;
2247 struct net_device *netdev = adapter->netdev;
2248 u32 rctl;
2249
2250 rctl = er32(RCTL);
2251 rctl &= ~E1000_RCTL_RST;
2252 ew32(RCTL, rctl);
2253 E1000_WRITE_FLUSH();
2254 mdelay(5);
2255
2256 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2257 e1000_pci_set_mwi(hw);
2258
2259 if (netif_running(netdev)) {
2260 /* No need to loop, because 82542 supports only 1 queue */
2261 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2262 e1000_configure_rx(adapter);
2263 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2264 }
2265 }
2266
2267 /**
2268 * e1000_set_mac - Change the Ethernet Address of the NIC
2269 * @netdev: network interface device structure
2270 * @p: pointer to an address structure
2271 *
2272 * Returns 0 on success, negative on failure
2273 **/
2274
2275 static int e1000_set_mac(struct net_device *netdev, void *p)
2276 {
2277 struct e1000_adapter *adapter = netdev_priv(netdev);
2278 struct e1000_hw *hw = &adapter->hw;
2279 struct sockaddr *addr = p;
2280
2281 if (!is_valid_ether_addr(addr->sa_data))
2282 return -EADDRNOTAVAIL;
2283
2284 /* 82542 2.0 needs to be in reset to write receive address registers */
2285
2286 if (hw->mac_type == e1000_82542_rev2_0)
2287 e1000_enter_82542_rst(adapter);
2288
2289 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2290 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
2291
2292 e1000_rar_set(hw, hw->mac_addr, 0);
2293
2294 /* With 82571 controllers, LAA may be overwritten (with the default)
2295 * due to controller reset from the other port. */
2296 if (hw->mac_type == e1000_82571) {
2297 /* activate the work around */
2298 hw->laa_is_present = 1;
2299
2300 /* Hold a copy of the LAA in RAR[14] This is done so that
2301 * between the time RAR[0] gets clobbered and the time it
2302 * gets fixed (in e1000_watchdog), the actual LAA is in one
2303 * of the RARs and no incoming packets directed to this port
2304 * are dropped. Eventaully the LAA will be in RAR[0] and
2305 * RAR[14] */
2306 e1000_rar_set(hw, hw->mac_addr,
2307 E1000_RAR_ENTRIES - 1);
2308 }
2309
2310 if (hw->mac_type == e1000_82542_rev2_0)
2311 e1000_leave_82542_rst(adapter);
2312
2313 return 0;
2314 }
2315
2316 /**
2317 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2318 * @netdev: network interface device structure
2319 *
2320 * The set_rx_mode entry point is called whenever the unicast or multicast
2321 * address lists or the network interface flags are updated. This routine is
2322 * responsible for configuring the hardware for proper unicast, multicast,
2323 * promiscuous mode, and all-multi behavior.
2324 **/
2325
2326 static void e1000_set_rx_mode(struct net_device *netdev)
2327 {
2328 struct e1000_adapter *adapter = netdev_priv(netdev);
2329 struct e1000_hw *hw = &adapter->hw;
2330 struct dev_addr_list *uc_ptr;
2331 struct dev_addr_list *mc_ptr;
2332 u32 rctl;
2333 u32 hash_value;
2334 int i, rar_entries = E1000_RAR_ENTRIES;
2335 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2336 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2337 E1000_NUM_MTA_REGISTERS;
2338 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2339
2340 if (!mcarray) {
2341 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2342 return;
2343 }
2344
2345 if (hw->mac_type == e1000_ich8lan)
2346 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2347
2348 /* reserve RAR[14] for LAA over-write work-around */
2349 if (hw->mac_type == e1000_82571)
2350 rar_entries--;
2351
2352 /* Check for Promiscuous and All Multicast modes */
2353
2354 rctl = er32(RCTL);
2355
2356 if (netdev->flags & IFF_PROMISC) {
2357 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2358 rctl &= ~E1000_RCTL_VFE;
2359 } else {
2360 if (netdev->flags & IFF_ALLMULTI) {
2361 rctl |= E1000_RCTL_MPE;
2362 } else {
2363 rctl &= ~E1000_RCTL_MPE;
2364 }
2365 if (adapter->hw.mac_type != e1000_ich8lan)
2366 rctl |= E1000_RCTL_VFE;
2367 }
2368
2369 uc_ptr = NULL;
2370 if (netdev->uc_count > rar_entries - 1) {
2371 rctl |= E1000_RCTL_UPE;
2372 } else if (!(netdev->flags & IFF_PROMISC)) {
2373 rctl &= ~E1000_RCTL_UPE;
2374 uc_ptr = netdev->uc_list;
2375 }
2376
2377 ew32(RCTL, rctl);
2378
2379 /* 82542 2.0 needs to be in reset to write receive address registers */
2380
2381 if (hw->mac_type == e1000_82542_rev2_0)
2382 e1000_enter_82542_rst(adapter);
2383
2384 /* load the first 14 addresses into the exact filters 1-14. Unicast
2385 * addresses take precedence to avoid disabling unicast filtering
2386 * when possible.
2387 *
2388 * RAR 0 is used for the station MAC adddress
2389 * if there are not 14 addresses, go ahead and clear the filters
2390 * -- with 82571 controllers only 0-13 entries are filled here
2391 */
2392 mc_ptr = netdev->mc_list;
2393
2394 for (i = 1; i < rar_entries; i++) {
2395 if (uc_ptr) {
2396 e1000_rar_set(hw, uc_ptr->da_addr, i);
2397 uc_ptr = uc_ptr->next;
2398 } else if (mc_ptr) {
2399 e1000_rar_set(hw, mc_ptr->da_addr, i);
2400 mc_ptr = mc_ptr->next;
2401 } else {
2402 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2403 E1000_WRITE_FLUSH();
2404 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2405 E1000_WRITE_FLUSH();
2406 }
2407 }
2408 WARN_ON(uc_ptr != NULL);
2409
2410 /* load any remaining addresses into the hash table */
2411
2412 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2413 u32 hash_reg, hash_bit, mta;
2414 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2415 hash_reg = (hash_value >> 5) & 0x7F;
2416 hash_bit = hash_value & 0x1F;
2417 mta = (1 << hash_bit);
2418 mcarray[hash_reg] |= mta;
2419 }
2420
2421 /* write the hash table completely, write from bottom to avoid
2422 * both stupid write combining chipsets, and flushing each write */
2423 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2424 /*
2425 * If we are on an 82544 has an errata where writing odd
2426 * offsets overwrites the previous even offset, but writing
2427 * backwards over the range solves the issue by always
2428 * writing the odd offset first
2429 */
2430 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2431 }
2432 E1000_WRITE_FLUSH();
2433
2434 if (hw->mac_type == e1000_82542_rev2_0)
2435 e1000_leave_82542_rst(adapter);
2436
2437 kfree(mcarray);
2438 }
2439
2440 /* Need to wait a few seconds after link up to get diagnostic information from
2441 * the phy */
2442
2443 static void e1000_update_phy_info(unsigned long data)
2444 {
2445 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2446 struct e1000_hw *hw = &adapter->hw;
2447 e1000_phy_get_info(hw, &adapter->phy_info);
2448 }
2449
2450 /**
2451 * e1000_82547_tx_fifo_stall - Timer Call-back
2452 * @data: pointer to adapter cast into an unsigned long
2453 **/
2454
2455 static void e1000_82547_tx_fifo_stall(unsigned long data)
2456 {
2457 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2458 struct e1000_hw *hw = &adapter->hw;
2459 struct net_device *netdev = adapter->netdev;
2460 u32 tctl;
2461
2462 if (atomic_read(&adapter->tx_fifo_stall)) {
2463 if ((er32(TDT) == er32(TDH)) &&
2464 (er32(TDFT) == er32(TDFH)) &&
2465 (er32(TDFTS) == er32(TDFHS))) {
2466 tctl = er32(TCTL);
2467 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2468 ew32(TDFT, adapter->tx_head_addr);
2469 ew32(TDFH, adapter->tx_head_addr);
2470 ew32(TDFTS, adapter->tx_head_addr);
2471 ew32(TDFHS, adapter->tx_head_addr);
2472 ew32(TCTL, tctl);
2473 E1000_WRITE_FLUSH();
2474
2475 adapter->tx_fifo_head = 0;
2476 atomic_set(&adapter->tx_fifo_stall, 0);
2477 netif_wake_queue(netdev);
2478 } else {
2479 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2480 }
2481 }
2482 }
2483
2484 /**
2485 * e1000_watchdog - Timer Call-back
2486 * @data: pointer to adapter cast into an unsigned long
2487 **/
2488 static void e1000_watchdog(unsigned long data)
2489 {
2490 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2491 struct e1000_hw *hw = &adapter->hw;
2492 struct net_device *netdev = adapter->netdev;
2493 struct e1000_tx_ring *txdr = adapter->tx_ring;
2494 u32 link, tctl;
2495 s32 ret_val;
2496
2497 ret_val = e1000_check_for_link(hw);
2498 if ((ret_val == E1000_ERR_PHY) &&
2499 (hw->phy_type == e1000_phy_igp_3) &&
2500 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2501 /* See e1000_kumeran_lock_loss_workaround() */
2502 DPRINTK(LINK, INFO,
2503 "Gigabit has been disabled, downgrading speed\n");
2504 }
2505
2506 if (hw->mac_type == e1000_82573) {
2507 e1000_enable_tx_pkt_filtering(hw);
2508 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2509 e1000_update_mng_vlan(adapter);
2510 }
2511
2512 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2513 !(er32(TXCW) & E1000_TXCW_ANE))
2514 link = !hw->serdes_link_down;
2515 else
2516 link = er32(STATUS) & E1000_STATUS_LU;
2517
2518 if (link) {
2519 if (!netif_carrier_ok(netdev)) {
2520 u32 ctrl;
2521 bool txb2b = true;
2522 e1000_get_speed_and_duplex(hw,
2523 &adapter->link_speed,
2524 &adapter->link_duplex);
2525
2526 ctrl = er32(CTRL);
2527 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2528 "Flow Control: %s\n",
2529 netdev->name,
2530 adapter->link_speed,
2531 adapter->link_duplex == FULL_DUPLEX ?
2532 "Full Duplex" : "Half Duplex",
2533 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2534 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2535 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2536 E1000_CTRL_TFCE) ? "TX" : "None" )));
2537
2538 /* tweak tx_queue_len according to speed/duplex
2539 * and adjust the timeout factor */
2540 netdev->tx_queue_len = adapter->tx_queue_len;
2541 adapter->tx_timeout_factor = 1;
2542 switch (adapter->link_speed) {
2543 case SPEED_10:
2544 txb2b = false;
2545 netdev->tx_queue_len = 10;
2546 adapter->tx_timeout_factor = 8;
2547 break;
2548 case SPEED_100:
2549 txb2b = false;
2550 netdev->tx_queue_len = 100;
2551 /* maybe add some timeout factor ? */
2552 break;
2553 }
2554
2555 if ((hw->mac_type == e1000_82571 ||
2556 hw->mac_type == e1000_82572) &&
2557 !txb2b) {
2558 u32 tarc0;
2559 tarc0 = er32(TARC0);
2560 tarc0 &= ~(1 << 21);
2561 ew32(TARC0, tarc0);
2562 }
2563
2564 /* disable TSO for pcie and 10/100 speeds, to avoid
2565 * some hardware issues */
2566 if (!adapter->tso_force &&
2567 hw->bus_type == e1000_bus_type_pci_express){
2568 switch (adapter->link_speed) {
2569 case SPEED_10:
2570 case SPEED_100:
2571 DPRINTK(PROBE,INFO,
2572 "10/100 speed: disabling TSO\n");
2573 netdev->features &= ~NETIF_F_TSO;
2574 netdev->features &= ~NETIF_F_TSO6;
2575 break;
2576 case SPEED_1000:
2577 netdev->features |= NETIF_F_TSO;
2578 netdev->features |= NETIF_F_TSO6;
2579 break;
2580 default:
2581 /* oops */
2582 break;
2583 }
2584 }
2585
2586 /* enable transmits in the hardware, need to do this
2587 * after setting TARC0 */
2588 tctl = er32(TCTL);
2589 tctl |= E1000_TCTL_EN;
2590 ew32(TCTL, tctl);
2591
2592 netif_carrier_on(netdev);
2593 netif_wake_queue(netdev);
2594 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2595 adapter->smartspeed = 0;
2596 } else {
2597 /* make sure the receive unit is started */
2598 if (hw->rx_needs_kicking) {
2599 u32 rctl = er32(RCTL);
2600 ew32(RCTL, rctl | E1000_RCTL_EN);
2601 }
2602 }
2603 } else {
2604 if (netif_carrier_ok(netdev)) {
2605 adapter->link_speed = 0;
2606 adapter->link_duplex = 0;
2607 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2608 netdev->name);
2609 netif_carrier_off(netdev);
2610 netif_stop_queue(netdev);
2611 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2612
2613 /* 80003ES2LAN workaround--
2614 * For packet buffer work-around on link down event;
2615 * disable receives in the ISR and
2616 * reset device here in the watchdog
2617 */
2618 if (hw->mac_type == e1000_80003es2lan)
2619 /* reset device */
2620 schedule_work(&adapter->reset_task);
2621 }
2622
2623 e1000_smartspeed(adapter);
2624 }
2625
2626 e1000_update_stats(adapter);
2627
2628 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2629 adapter->tpt_old = adapter->stats.tpt;
2630 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
2631 adapter->colc_old = adapter->stats.colc;
2632
2633 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2634 adapter->gorcl_old = adapter->stats.gorcl;
2635 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2636 adapter->gotcl_old = adapter->stats.gotcl;
2637
2638 e1000_update_adaptive(hw);
2639
2640 if (!netif_carrier_ok(netdev)) {
2641 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2642 /* We've lost link, so the controller stops DMA,
2643 * but we've got queued Tx work that's never going
2644 * to get done, so reset controller to flush Tx.
2645 * (Do the reset outside of interrupt context). */
2646 adapter->tx_timeout_count++;
2647 schedule_work(&adapter->reset_task);
2648 }
2649 }
2650
2651 /* Cause software interrupt to ensure rx ring is cleaned */
2652 ew32(ICS, E1000_ICS_RXDMT0);
2653
2654 /* Force detection of hung controller every watchdog period */
2655 adapter->detect_tx_hung = true;
2656
2657 /* With 82571 controllers, LAA may be overwritten due to controller
2658 * reset from the other port. Set the appropriate LAA in RAR[0] */
2659 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2660 e1000_rar_set(hw, hw->mac_addr, 0);
2661
2662 /* Reset the timer */
2663 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2664 }
2665
2666 enum latency_range {
2667 lowest_latency = 0,
2668 low_latency = 1,
2669 bulk_latency = 2,
2670 latency_invalid = 255
2671 };
2672
2673 /**
2674 * e1000_update_itr - update the dynamic ITR value based on statistics
2675 * Stores a new ITR value based on packets and byte
2676 * counts during the last interrupt. The advantage of per interrupt
2677 * computation is faster updates and more accurate ITR for the current
2678 * traffic pattern. Constants in this function were computed
2679 * based on theoretical maximum wire speed and thresholds were set based
2680 * on testing data as well as attempting to minimize response time
2681 * while increasing bulk throughput.
2682 * this functionality is controlled by the InterruptThrottleRate module
2683 * parameter (see e1000_param.c)
2684 * @adapter: pointer to adapter
2685 * @itr_setting: current adapter->itr
2686 * @packets: the number of packets during this measurement interval
2687 * @bytes: the number of bytes during this measurement interval
2688 **/
2689 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2690 u16 itr_setting, int packets, int bytes)
2691 {
2692 unsigned int retval = itr_setting;
2693 struct e1000_hw *hw = &adapter->hw;
2694
2695 if (unlikely(hw->mac_type < e1000_82540))
2696 goto update_itr_done;
2697
2698 if (packets == 0)
2699 goto update_itr_done;
2700
2701 switch (itr_setting) {
2702 case lowest_latency:
2703 /* jumbo frames get bulk treatment*/
2704 if (bytes/packets > 8000)
2705 retval = bulk_latency;
2706 else if ((packets < 5) && (bytes > 512))
2707 retval = low_latency;
2708 break;
2709 case low_latency: /* 50 usec aka 20000 ints/s */
2710 if (bytes > 10000) {
2711 /* jumbo frames need bulk latency setting */
2712 if (bytes/packets > 8000)
2713 retval = bulk_latency;
2714 else if ((packets < 10) || ((bytes/packets) > 1200))
2715 retval = bulk_latency;
2716 else if ((packets > 35))
2717 retval = lowest_latency;
2718 } else if (bytes/packets > 2000)
2719 retval = bulk_latency;
2720 else if (packets <= 2 && bytes < 512)
2721 retval = lowest_latency;
2722 break;
2723 case bulk_latency: /* 250 usec aka 4000 ints/s */
2724 if (bytes > 25000) {
2725 if (packets > 35)
2726 retval = low_latency;
2727 } else if (bytes < 6000) {
2728 retval = low_latency;
2729 }
2730 break;
2731 }
2732
2733 update_itr_done:
2734 return retval;
2735 }
2736
2737 static void e1000_set_itr(struct e1000_adapter *adapter)
2738 {
2739 struct e1000_hw *hw = &adapter->hw;
2740 u16 current_itr;
2741 u32 new_itr = adapter->itr;
2742
2743 if (unlikely(hw->mac_type < e1000_82540))
2744 return;
2745
2746 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2747 if (unlikely(adapter->link_speed != SPEED_1000)) {
2748 current_itr = 0;
2749 new_itr = 4000;
2750 goto set_itr_now;
2751 }
2752
2753 adapter->tx_itr = e1000_update_itr(adapter,
2754 adapter->tx_itr,
2755 adapter->total_tx_packets,
2756 adapter->total_tx_bytes);
2757 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2758 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2759 adapter->tx_itr = low_latency;
2760
2761 adapter->rx_itr = e1000_update_itr(adapter,
2762 adapter->rx_itr,
2763 adapter->total_rx_packets,
2764 adapter->total_rx_bytes);
2765 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2766 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2767 adapter->rx_itr = low_latency;
2768
2769 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2770
2771 switch (current_itr) {
2772 /* counts and packets in update_itr are dependent on these numbers */
2773 case lowest_latency:
2774 new_itr = 70000;
2775 break;
2776 case low_latency:
2777 new_itr = 20000; /* aka hwitr = ~200 */
2778 break;
2779 case bulk_latency:
2780 new_itr = 4000;
2781 break;
2782 default:
2783 break;
2784 }
2785
2786 set_itr_now:
2787 if (new_itr != adapter->itr) {
2788 /* this attempts to bias the interrupt rate towards Bulk
2789 * by adding intermediate steps when interrupt rate is
2790 * increasing */
2791 new_itr = new_itr > adapter->itr ?
2792 min(adapter->itr + (new_itr >> 2), new_itr) :
2793 new_itr;
2794 adapter->itr = new_itr;
2795 ew32(ITR, 1000000000 / (new_itr * 256));
2796 }
2797
2798 return;
2799 }
2800
2801 #define E1000_TX_FLAGS_CSUM 0x00000001
2802 #define E1000_TX_FLAGS_VLAN 0x00000002
2803 #define E1000_TX_FLAGS_TSO 0x00000004
2804 #define E1000_TX_FLAGS_IPV4 0x00000008
2805 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2806 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2807
2808 static int e1000_tso(struct e1000_adapter *adapter,
2809 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2810 {
2811 struct e1000_context_desc *context_desc;
2812 struct e1000_buffer *buffer_info;
2813 unsigned int i;
2814 u32 cmd_length = 0;
2815 u16 ipcse = 0, tucse, mss;
2816 u8 ipcss, ipcso, tucss, tucso, hdr_len;
2817 int err;
2818
2819 if (skb_is_gso(skb)) {
2820 if (skb_header_cloned(skb)) {
2821 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2822 if (err)
2823 return err;
2824 }
2825
2826 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2827 mss = skb_shinfo(skb)->gso_size;
2828 if (skb->protocol == htons(ETH_P_IP)) {
2829 struct iphdr *iph = ip_hdr(skb);
2830 iph->tot_len = 0;
2831 iph->check = 0;
2832 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2833 iph->daddr, 0,
2834 IPPROTO_TCP,
2835 0);
2836 cmd_length = E1000_TXD_CMD_IP;
2837 ipcse = skb_transport_offset(skb) - 1;
2838 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2839 ipv6_hdr(skb)->payload_len = 0;
2840 tcp_hdr(skb)->check =
2841 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2842 &ipv6_hdr(skb)->daddr,
2843 0, IPPROTO_TCP, 0);
2844 ipcse = 0;
2845 }
2846 ipcss = skb_network_offset(skb);
2847 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2848 tucss = skb_transport_offset(skb);
2849 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2850 tucse = 0;
2851
2852 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2853 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2854
2855 i = tx_ring->next_to_use;
2856 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2857 buffer_info = &tx_ring->buffer_info[i];
2858
2859 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2860 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2861 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2862 context_desc->upper_setup.tcp_fields.tucss = tucss;
2863 context_desc->upper_setup.tcp_fields.tucso = tucso;
2864 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2865 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2866 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2867 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2868
2869 buffer_info->time_stamp = jiffies;
2870 buffer_info->next_to_watch = i;
2871
2872 if (++i == tx_ring->count) i = 0;
2873 tx_ring->next_to_use = i;
2874
2875 return true;
2876 }
2877 return false;
2878 }
2879
2880 static bool e1000_tx_csum(struct e1000_adapter *adapter,
2881 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2882 {
2883 struct e1000_context_desc *context_desc;
2884 struct e1000_buffer *buffer_info;
2885 unsigned int i;
2886 u8 css;
2887 u32 cmd_len = E1000_TXD_CMD_DEXT;
2888
2889 if (skb->ip_summed != CHECKSUM_PARTIAL)
2890 return false;
2891
2892 switch (skb->protocol) {
2893 case cpu_to_be16(ETH_P_IP):
2894 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2895 cmd_len |= E1000_TXD_CMD_TCP;
2896 break;
2897 case cpu_to_be16(ETH_P_IPV6):
2898 /* XXX not handling all IPV6 headers */
2899 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2900 cmd_len |= E1000_TXD_CMD_TCP;
2901 break;
2902 default:
2903 if (unlikely(net_ratelimit()))
2904 DPRINTK(DRV, WARNING,
2905 "checksum_partial proto=%x!\n", skb->protocol);
2906 break;
2907 }
2908
2909 css = skb_transport_offset(skb);
2910
2911 i = tx_ring->next_to_use;
2912 buffer_info = &tx_ring->buffer_info[i];
2913 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2914
2915 context_desc->lower_setup.ip_config = 0;
2916 context_desc->upper_setup.tcp_fields.tucss = css;
2917 context_desc->upper_setup.tcp_fields.tucso =
2918 css + skb->csum_offset;
2919 context_desc->upper_setup.tcp_fields.tucse = 0;
2920 context_desc->tcp_seg_setup.data = 0;
2921 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
2922
2923 buffer_info->time_stamp = jiffies;
2924 buffer_info->next_to_watch = i;
2925
2926 if (unlikely(++i == tx_ring->count)) i = 0;
2927 tx_ring->next_to_use = i;
2928
2929 return true;
2930 }
2931
2932 #define E1000_MAX_TXD_PWR 12
2933 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2934
2935 static int e1000_tx_map(struct e1000_adapter *adapter,
2936 struct e1000_tx_ring *tx_ring,
2937 struct sk_buff *skb, unsigned int first,
2938 unsigned int max_per_txd, unsigned int nr_frags,
2939 unsigned int mss)
2940 {
2941 struct e1000_hw *hw = &adapter->hw;
2942 struct e1000_buffer *buffer_info;
2943 unsigned int len = skb_headlen(skb);
2944 unsigned int offset, size, count = 0, i;
2945 unsigned int f;
2946 dma_addr_t *map;
2947
2948 i = tx_ring->next_to_use;
2949
2950 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2951 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
2952 return 0;
2953 }
2954
2955 map = skb_shinfo(skb)->dma_maps;
2956 offset = 0;
2957
2958 while (len) {
2959 buffer_info = &tx_ring->buffer_info[i];
2960 size = min(len, max_per_txd);
2961 /* Workaround for Controller erratum --
2962 * descriptor for non-tso packet in a linear SKB that follows a
2963 * tso gets written back prematurely before the data is fully
2964 * DMA'd to the controller */
2965 if (!skb->data_len && tx_ring->last_tx_tso &&
2966 !skb_is_gso(skb)) {
2967 tx_ring->last_tx_tso = 0;
2968 size -= 4;
2969 }
2970
2971 /* Workaround for premature desc write-backs
2972 * in TSO mode. Append 4-byte sentinel desc */
2973 if (unlikely(mss && !nr_frags && size == len && size > 8))
2974 size -= 4;
2975 /* work-around for errata 10 and it applies
2976 * to all controllers in PCI-X mode
2977 * The fix is to make sure that the first descriptor of a
2978 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2979 */
2980 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
2981 (size > 2015) && count == 0))
2982 size = 2015;
2983
2984 /* Workaround for potential 82544 hang in PCI-X. Avoid
2985 * terminating buffers within evenly-aligned dwords. */
2986 if (unlikely(adapter->pcix_82544 &&
2987 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2988 size > 4))
2989 size -= 4;
2990
2991 buffer_info->length = size;
2992 buffer_info->dma = map[0] + offset;
2993 buffer_info->time_stamp = jiffies;
2994 buffer_info->next_to_watch = i;
2995
2996 len -= size;
2997 offset += size;
2998 count++;
2999 if (len) {
3000 i++;
3001 if (unlikely(i == tx_ring->count))
3002 i = 0;
3003 }
3004 }
3005
3006 for (f = 0; f < nr_frags; f++) {
3007 struct skb_frag_struct *frag;
3008
3009 frag = &skb_shinfo(skb)->frags[f];
3010 len = frag->size;
3011 offset = 0;
3012
3013 while (len) {
3014 i++;
3015 if (unlikely(i == tx_ring->count))
3016 i = 0;
3017
3018 buffer_info = &tx_ring->buffer_info[i];
3019 size = min(len, max_per_txd);
3020 /* Workaround for premature desc write-backs
3021 * in TSO mode. Append 4-byte sentinel desc */
3022 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3023 size -= 4;
3024 /* Workaround for potential 82544 hang in PCI-X.
3025 * Avoid terminating buffers within evenly-aligned
3026 * dwords. */
3027 if (unlikely(adapter->pcix_82544 &&
3028 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3029 size > 4))
3030 size -= 4;
3031
3032 buffer_info->length = size;
3033 buffer_info->dma = map[f + 1] + offset;
3034 buffer_info->time_stamp = jiffies;
3035 buffer_info->next_to_watch = i;
3036
3037 len -= size;
3038 offset += size;
3039 count++;
3040 }
3041 }
3042
3043 tx_ring->buffer_info[i].skb = skb;
3044 tx_ring->buffer_info[first].next_to_watch = i;
3045
3046 return count;
3047 }
3048
3049 static void e1000_tx_queue(struct e1000_adapter *adapter,
3050 struct e1000_tx_ring *tx_ring, int tx_flags,
3051 int count)
3052 {
3053 struct e1000_hw *hw = &adapter->hw;
3054 struct e1000_tx_desc *tx_desc = NULL;
3055 struct e1000_buffer *buffer_info;
3056 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3057 unsigned int i;
3058
3059 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3060 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3061 E1000_TXD_CMD_TSE;
3062 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3063
3064 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3065 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3066 }
3067
3068 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3069 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3070 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3071 }
3072
3073 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3074 txd_lower |= E1000_TXD_CMD_VLE;
3075 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3076 }
3077
3078 i = tx_ring->next_to_use;
3079
3080 while (count--) {
3081 buffer_info = &tx_ring->buffer_info[i];
3082 tx_desc = E1000_TX_DESC(*tx_ring, i);
3083 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3084 tx_desc->lower.data =
3085 cpu_to_le32(txd_lower | buffer_info->length);
3086 tx_desc->upper.data = cpu_to_le32(txd_upper);
3087 if (unlikely(++i == tx_ring->count)) i = 0;
3088 }
3089
3090 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3091
3092 /* Force memory writes to complete before letting h/w
3093 * know there are new descriptors to fetch. (Only
3094 * applicable for weak-ordered memory model archs,
3095 * such as IA-64). */
3096 wmb();
3097
3098 tx_ring->next_to_use = i;
3099 writel(i, hw->hw_addr + tx_ring->tdt);
3100 /* we need this if more than one processor can write to our tail
3101 * at a time, it syncronizes IO on IA64/Altix systems */
3102 mmiowb();
3103 }
3104
3105 /**
3106 * 82547 workaround to avoid controller hang in half-duplex environment.
3107 * The workaround is to avoid queuing a large packet that would span
3108 * the internal Tx FIFO ring boundary by notifying the stack to resend
3109 * the packet at a later time. This gives the Tx FIFO an opportunity to
3110 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3111 * to the beginning of the Tx FIFO.
3112 **/
3113
3114 #define E1000_FIFO_HDR 0x10
3115 #define E1000_82547_PAD_LEN 0x3E0
3116
3117 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3118 struct sk_buff *skb)
3119 {
3120 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3121 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
3122
3123 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3124
3125 if (adapter->link_duplex != HALF_DUPLEX)
3126 goto no_fifo_stall_required;
3127
3128 if (atomic_read(&adapter->tx_fifo_stall))
3129 return 1;
3130
3131 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3132 atomic_set(&adapter->tx_fifo_stall, 1);
3133 return 1;
3134 }
3135
3136 no_fifo_stall_required:
3137 adapter->tx_fifo_head += skb_fifo_len;
3138 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3139 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3140 return 0;
3141 }
3142
3143 #define MINIMUM_DHCP_PACKET_SIZE 282
3144 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3145 struct sk_buff *skb)
3146 {
3147 struct e1000_hw *hw = &adapter->hw;
3148 u16 length, offset;
3149 if (vlan_tx_tag_present(skb)) {
3150 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3151 ( hw->mng_cookie.status &
3152 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3153 return 0;
3154 }
3155 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3156 struct ethhdr *eth = (struct ethhdr *)skb->data;
3157 if ((htons(ETH_P_IP) == eth->h_proto)) {
3158 const struct iphdr *ip =
3159 (struct iphdr *)((u8 *)skb->data+14);
3160 if (IPPROTO_UDP == ip->protocol) {
3161 struct udphdr *udp =
3162 (struct udphdr *)((u8 *)ip +
3163 (ip->ihl << 2));
3164 if (ntohs(udp->dest) == 67) {
3165 offset = (u8 *)udp + 8 - skb->data;
3166 length = skb->len - offset;
3167
3168 return e1000_mng_write_dhcp_info(hw,
3169 (u8 *)udp + 8,
3170 length);
3171 }
3172 }
3173 }
3174 }
3175 return 0;
3176 }
3177
3178 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3179 {
3180 struct e1000_adapter *adapter = netdev_priv(netdev);
3181 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3182
3183 netif_stop_queue(netdev);
3184 /* Herbert's original patch had:
3185 * smp_mb__after_netif_stop_queue();
3186 * but since that doesn't exist yet, just open code it. */
3187 smp_mb();
3188
3189 /* We need to check again in a case another CPU has just
3190 * made room available. */
3191 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3192 return -EBUSY;
3193
3194 /* A reprieve! */
3195 netif_start_queue(netdev);
3196 ++adapter->restart_queue;
3197 return 0;
3198 }
3199
3200 static int e1000_maybe_stop_tx(struct net_device *netdev,
3201 struct e1000_tx_ring *tx_ring, int size)
3202 {
3203 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3204 return 0;
3205 return __e1000_maybe_stop_tx(netdev, size);
3206 }
3207
3208 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3209 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3210 {
3211 struct e1000_adapter *adapter = netdev_priv(netdev);
3212 struct e1000_hw *hw = &adapter->hw;
3213 struct e1000_tx_ring *tx_ring;
3214 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3215 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3216 unsigned int tx_flags = 0;
3217 unsigned int len = skb->len - skb->data_len;
3218 unsigned int nr_frags;
3219 unsigned int mss;
3220 int count = 0;
3221 int tso;
3222 unsigned int f;
3223
3224 /* This goes back to the question of how to logically map a tx queue
3225 * to a flow. Right now, performance is impacted slightly negatively
3226 * if using multiple tx queues. If the stack breaks away from a
3227 * single qdisc implementation, we can look at this again. */
3228 tx_ring = adapter->tx_ring;
3229
3230 if (unlikely(skb->len <= 0)) {
3231 dev_kfree_skb_any(skb);
3232 return NETDEV_TX_OK;
3233 }
3234
3235 /* 82571 and newer doesn't need the workaround that limited descriptor
3236 * length to 4kB */
3237 if (hw->mac_type >= e1000_82571)
3238 max_per_txd = 8192;
3239
3240 mss = skb_shinfo(skb)->gso_size;
3241 /* The controller does a simple calculation to
3242 * make sure there is enough room in the FIFO before
3243 * initiating the DMA for each buffer. The calc is:
3244 * 4 = ceil(buffer len/mss). To make sure we don't
3245 * overrun the FIFO, adjust the max buffer len if mss
3246 * drops. */
3247 if (mss) {
3248 u8 hdr_len;
3249 max_per_txd = min(mss << 2, max_per_txd);
3250 max_txd_pwr = fls(max_per_txd) - 1;
3251
3252 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3253 * points to just header, pull a few bytes of payload from
3254 * frags into skb->data */
3255 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3256 if (skb->data_len && hdr_len == len) {
3257 switch (hw->mac_type) {
3258 unsigned int pull_size;
3259 case e1000_82544:
3260 /* Make sure we have room to chop off 4 bytes,
3261 * and that the end alignment will work out to
3262 * this hardware's requirements
3263 * NOTE: this is a TSO only workaround
3264 * if end byte alignment not correct move us
3265 * into the next dword */
3266 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3267 break;
3268 /* fall through */
3269 case e1000_82571:
3270 case e1000_82572:
3271 case e1000_82573:
3272 case e1000_ich8lan:
3273 pull_size = min((unsigned int)4, skb->data_len);
3274 if (!__pskb_pull_tail(skb, pull_size)) {
3275 DPRINTK(DRV, ERR,
3276 "__pskb_pull_tail failed.\n");
3277 dev_kfree_skb_any(skb);
3278 return NETDEV_TX_OK;
3279 }
3280 len = skb->len - skb->data_len;
3281 break;
3282 default:
3283 /* do nothing */
3284 break;
3285 }
3286 }
3287 }
3288
3289 /* reserve a descriptor for the offload context */
3290 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3291 count++;
3292 count++;
3293
3294 /* Controller Erratum workaround */
3295 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3296 count++;
3297
3298 count += TXD_USE_COUNT(len, max_txd_pwr);
3299
3300 if (adapter->pcix_82544)
3301 count++;
3302
3303 /* work-around for errata 10 and it applies to all controllers
3304 * in PCI-X mode, so add one more descriptor to the count
3305 */
3306 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
3307 (len > 2015)))
3308 count++;
3309
3310 nr_frags = skb_shinfo(skb)->nr_frags;
3311 for (f = 0; f < nr_frags; f++)
3312 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3313 max_txd_pwr);
3314 if (adapter->pcix_82544)
3315 count += nr_frags;
3316
3317
3318 if (hw->tx_pkt_filtering &&
3319 (hw->mac_type == e1000_82573))
3320 e1000_transfer_dhcp_info(adapter, skb);
3321
3322 /* need: count + 2 desc gap to keep tail from touching
3323 * head, otherwise try next time */
3324 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
3325 return NETDEV_TX_BUSY;
3326
3327 if (unlikely(hw->mac_type == e1000_82547)) {
3328 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3329 netif_stop_queue(netdev);
3330 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3331 return NETDEV_TX_BUSY;
3332 }
3333 }
3334
3335 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3336 tx_flags |= E1000_TX_FLAGS_VLAN;
3337 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3338 }
3339
3340 first = tx_ring->next_to_use;
3341
3342 tso = e1000_tso(adapter, tx_ring, skb);
3343 if (tso < 0) {
3344 dev_kfree_skb_any(skb);
3345 return NETDEV_TX_OK;
3346 }
3347
3348 if (likely(tso)) {
3349 tx_ring->last_tx_tso = 1;
3350 tx_flags |= E1000_TX_FLAGS_TSO;
3351 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3352 tx_flags |= E1000_TX_FLAGS_CSUM;
3353
3354 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3355 * 82571 hardware supports TSO capabilities for IPv6 as well...
3356 * no longer assume, we must. */
3357 if (likely(skb->protocol == htons(ETH_P_IP)))
3358 tx_flags |= E1000_TX_FLAGS_IPV4;
3359
3360 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3361 nr_frags, mss);
3362
3363 if (count) {
3364 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
3365 netdev->trans_start = jiffies;
3366 /* Make sure there is space in the ring for the next send. */
3367 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3368
3369 } else {
3370 dev_kfree_skb_any(skb);
3371 tx_ring->buffer_info[first].time_stamp = 0;
3372 tx_ring->next_to_use = first;
3373 }
3374
3375 return NETDEV_TX_OK;
3376 }
3377
3378 /**
3379 * e1000_tx_timeout - Respond to a Tx Hang
3380 * @netdev: network interface device structure
3381 **/
3382
3383 static void e1000_tx_timeout(struct net_device *netdev)
3384 {
3385 struct e1000_adapter *adapter = netdev_priv(netdev);
3386
3387 /* Do the reset outside of interrupt context */
3388 adapter->tx_timeout_count++;
3389 schedule_work(&adapter->reset_task);
3390 }
3391
3392 static void e1000_reset_task(struct work_struct *work)
3393 {
3394 struct e1000_adapter *adapter =
3395 container_of(work, struct e1000_adapter, reset_task);
3396
3397 e1000_reinit_locked(adapter);
3398 }
3399
3400 /**
3401 * e1000_get_stats - Get System Network Statistics
3402 * @netdev: network interface device structure
3403 *
3404 * Returns the address of the device statistics structure.
3405 * The statistics are actually updated from the timer callback.
3406 **/
3407
3408 static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3409 {
3410 struct e1000_adapter *adapter = netdev_priv(netdev);
3411
3412 /* only return the current stats */
3413 return &adapter->net_stats;
3414 }
3415
3416 /**
3417 * e1000_change_mtu - Change the Maximum Transfer Unit
3418 * @netdev: network interface device structure
3419 * @new_mtu: new value for maximum frame size
3420 *
3421 * Returns 0 on success, negative on failure
3422 **/
3423
3424 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3425 {
3426 struct e1000_adapter *adapter = netdev_priv(netdev);
3427 struct e1000_hw *hw = &adapter->hw;
3428 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3429 u16 eeprom_data = 0;
3430
3431 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3432 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3433 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3434 return -EINVAL;
3435 }
3436
3437 /* Adapter-specific max frame size limits. */
3438 switch (hw->mac_type) {
3439 case e1000_undefined ... e1000_82542_rev2_1:
3440 case e1000_ich8lan:
3441 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3442 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3443 return -EINVAL;
3444 }
3445 break;
3446 case e1000_82573:
3447 /* Jumbo Frames not supported if:
3448 * - this is not an 82573L device
3449 * - ASPM is enabled in any way (0x1A bits 3:2) */
3450 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
3451 &eeprom_data);
3452 if ((hw->device_id != E1000_DEV_ID_82573L) ||
3453 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3454 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3455 DPRINTK(PROBE, ERR,
3456 "Jumbo Frames not supported.\n");
3457 return -EINVAL;
3458 }
3459 break;
3460 }
3461 /* ERT will be enabled later to enable wire speed receives */
3462
3463 /* fall through to get support */
3464 case e1000_82571:
3465 case e1000_82572:
3466 case e1000_80003es2lan:
3467 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3468 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3469 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3470 return -EINVAL;
3471 }
3472 break;
3473 default:
3474 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3475 break;
3476 }
3477
3478 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3479 * means we reserve 2 more, this pushes us to allocate from the next
3480 * larger slab size
3481 * i.e. RXBUFFER_2048 --> size-4096 slab */
3482
3483 if (max_frame <= E1000_RXBUFFER_256)
3484 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3485 else if (max_frame <= E1000_RXBUFFER_512)
3486 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3487 else if (max_frame <= E1000_RXBUFFER_1024)
3488 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3489 else if (max_frame <= E1000_RXBUFFER_2048)
3490 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3491 else if (max_frame <= E1000_RXBUFFER_4096)
3492 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3493 else if (max_frame <= E1000_RXBUFFER_8192)
3494 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3495 else if (max_frame <= E1000_RXBUFFER_16384)
3496 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3497
3498 /* adjust allocation if LPE protects us, and we aren't using SBP */
3499 if (!hw->tbi_compatibility_on &&
3500 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3501 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3502 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3503
3504 netdev->mtu = new_mtu;
3505 hw->max_frame_size = max_frame;
3506
3507 if (netif_running(netdev))
3508 e1000_reinit_locked(adapter);
3509
3510 return 0;
3511 }
3512
3513 /**
3514 * e1000_update_stats - Update the board statistics counters
3515 * @adapter: board private structure
3516 **/
3517
3518 void e1000_update_stats(struct e1000_adapter *adapter)
3519 {
3520 struct e1000_hw *hw = &adapter->hw;
3521 struct pci_dev *pdev = adapter->pdev;
3522 unsigned long flags;
3523 u16 phy_tmp;
3524
3525 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3526
3527 /*
3528 * Prevent stats update while adapter is being reset, or if the pci
3529 * connection is down.
3530 */
3531 if (adapter->link_speed == 0)
3532 return;
3533 if (pci_channel_offline(pdev))
3534 return;
3535
3536 spin_lock_irqsave(&adapter->stats_lock, flags);
3537
3538 /* these counters are modified from e1000_tbi_adjust_stats,
3539 * called from the interrupt context, so they must only
3540 * be written while holding adapter->stats_lock
3541 */
3542
3543 adapter->stats.crcerrs += er32(CRCERRS);
3544 adapter->stats.gprc += er32(GPRC);
3545 adapter->stats.gorcl += er32(GORCL);
3546 adapter->stats.gorch += er32(GORCH);
3547 adapter->stats.bprc += er32(BPRC);
3548 adapter->stats.mprc += er32(MPRC);
3549 adapter->stats.roc += er32(ROC);
3550
3551 if (hw->mac_type != e1000_ich8lan) {
3552 adapter->stats.prc64 += er32(PRC64);
3553 adapter->stats.prc127 += er32(PRC127);
3554 adapter->stats.prc255 += er32(PRC255);
3555 adapter->stats.prc511 += er32(PRC511);
3556 adapter->stats.prc1023 += er32(PRC1023);
3557 adapter->stats.prc1522 += er32(PRC1522);
3558 }
3559
3560 adapter->stats.symerrs += er32(SYMERRS);
3561 adapter->stats.mpc += er32(MPC);
3562 adapter->stats.scc += er32(SCC);
3563 adapter->stats.ecol += er32(ECOL);
3564 adapter->stats.mcc += er32(MCC);
3565 adapter->stats.latecol += er32(LATECOL);
3566 adapter->stats.dc += er32(DC);
3567 adapter->stats.sec += er32(SEC);
3568 adapter->stats.rlec += er32(RLEC);
3569 adapter->stats.xonrxc += er32(XONRXC);
3570 adapter->stats.xontxc += er32(XONTXC);
3571 adapter->stats.xoffrxc += er32(XOFFRXC);
3572 adapter->stats.xofftxc += er32(XOFFTXC);
3573 adapter->stats.fcruc += er32(FCRUC);
3574 adapter->stats.gptc += er32(GPTC);
3575 adapter->stats.gotcl += er32(GOTCL);
3576 adapter->stats.gotch += er32(GOTCH);
3577 adapter->stats.rnbc += er32(RNBC);
3578 adapter->stats.ruc += er32(RUC);
3579 adapter->stats.rfc += er32(RFC);
3580 adapter->stats.rjc += er32(RJC);
3581 adapter->stats.torl += er32(TORL);
3582 adapter->stats.torh += er32(TORH);
3583 adapter->stats.totl += er32(TOTL);
3584 adapter->stats.toth += er32(TOTH);
3585 adapter->stats.tpr += er32(TPR);
3586
3587 if (hw->mac_type != e1000_ich8lan) {
3588 adapter->stats.ptc64 += er32(PTC64);
3589 adapter->stats.ptc127 += er32(PTC127);
3590 adapter->stats.ptc255 += er32(PTC255);
3591 adapter->stats.ptc511 += er32(PTC511);
3592 adapter->stats.ptc1023 += er32(PTC1023);
3593 adapter->stats.ptc1522 += er32(PTC1522);
3594 }
3595
3596 adapter->stats.mptc += er32(MPTC);
3597 adapter->stats.bptc += er32(BPTC);
3598
3599 /* used for adaptive IFS */
3600
3601 hw->tx_packet_delta = er32(TPT);
3602 adapter->stats.tpt += hw->tx_packet_delta;
3603 hw->collision_delta = er32(COLC);
3604 adapter->stats.colc += hw->collision_delta;
3605
3606 if (hw->mac_type >= e1000_82543) {
3607 adapter->stats.algnerrc += er32(ALGNERRC);
3608 adapter->stats.rxerrc += er32(RXERRC);
3609 adapter->stats.tncrs += er32(TNCRS);
3610 adapter->stats.cexterr += er32(CEXTERR);
3611 adapter->stats.tsctc += er32(TSCTC);
3612 adapter->stats.tsctfc += er32(TSCTFC);
3613 }
3614 if (hw->mac_type > e1000_82547_rev_2) {
3615 adapter->stats.iac += er32(IAC);
3616 adapter->stats.icrxoc += er32(ICRXOC);
3617
3618 if (hw->mac_type != e1000_ich8lan) {
3619 adapter->stats.icrxptc += er32(ICRXPTC);
3620 adapter->stats.icrxatc += er32(ICRXATC);
3621 adapter->stats.ictxptc += er32(ICTXPTC);
3622 adapter->stats.ictxatc += er32(ICTXATC);
3623 adapter->stats.ictxqec += er32(ICTXQEC);
3624 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3625 adapter->stats.icrxdmtc += er32(ICRXDMTC);
3626 }
3627 }
3628
3629 /* Fill out the OS statistics structure */
3630 adapter->net_stats.multicast = adapter->stats.mprc;
3631 adapter->net_stats.collisions = adapter->stats.colc;
3632
3633 /* Rx Errors */
3634
3635 /* RLEC on some newer hardware can be incorrect so build
3636 * our own version based on RUC and ROC */
3637 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3638 adapter->stats.crcerrs + adapter->stats.algnerrc +
3639 adapter->stats.ruc + adapter->stats.roc +
3640 adapter->stats.cexterr;
3641 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3642 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3643 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3644 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3645 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3646
3647 /* Tx Errors */
3648 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3649 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3650 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3651 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3652 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3653 if (hw->bad_tx_carr_stats_fd &&
3654 adapter->link_duplex == FULL_DUPLEX) {
3655 adapter->net_stats.tx_carrier_errors = 0;
3656 adapter->stats.tncrs = 0;
3657 }
3658
3659 /* Tx Dropped needs to be maintained elsewhere */
3660
3661 /* Phy Stats */
3662 if (hw->media_type == e1000_media_type_copper) {
3663 if ((adapter->link_speed == SPEED_1000) &&
3664 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3665 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3666 adapter->phy_stats.idle_errors += phy_tmp;
3667 }
3668
3669 if ((hw->mac_type <= e1000_82546) &&
3670 (hw->phy_type == e1000_phy_m88) &&
3671 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3672 adapter->phy_stats.receive_errors += phy_tmp;
3673 }
3674
3675 /* Management Stats */
3676 if (hw->has_smbus) {
3677 adapter->stats.mgptc += er32(MGTPTC);
3678 adapter->stats.mgprc += er32(MGTPRC);
3679 adapter->stats.mgpdc += er32(MGTPDC);
3680 }
3681
3682 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3683 }
3684
3685 /**
3686 * e1000_intr_msi - Interrupt Handler
3687 * @irq: interrupt number
3688 * @data: pointer to a network interface device structure
3689 **/
3690
3691 static irqreturn_t e1000_intr_msi(int irq, void *data)
3692 {
3693 struct net_device *netdev = data;
3694 struct e1000_adapter *adapter = netdev_priv(netdev);
3695 struct e1000_hw *hw = &adapter->hw;
3696 u32 icr = er32(ICR);
3697
3698 /* in NAPI mode read ICR disables interrupts using IAM */
3699
3700 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3701 hw->get_link_status = 1;
3702 /* 80003ES2LAN workaround-- For packet buffer work-around on
3703 * link down event; disable receives here in the ISR and reset
3704 * adapter in watchdog */
3705 if (netif_carrier_ok(netdev) &&
3706 (hw->mac_type == e1000_80003es2lan)) {
3707 /* disable receives */
3708 u32 rctl = er32(RCTL);
3709 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3710 }
3711 /* guard against interrupt when we're going down */
3712 if (!test_bit(__E1000_DOWN, &adapter->flags))
3713 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3714 }
3715
3716 if (likely(napi_schedule_prep(&adapter->napi))) {
3717 adapter->total_tx_bytes = 0;
3718 adapter->total_tx_packets = 0;
3719 adapter->total_rx_bytes = 0;
3720 adapter->total_rx_packets = 0;
3721 __napi_schedule(&adapter->napi);
3722 } else
3723 e1000_irq_enable(adapter);
3724
3725 return IRQ_HANDLED;
3726 }
3727
3728 /**
3729 * e1000_intr - Interrupt Handler
3730 * @irq: interrupt number
3731 * @data: pointer to a network interface device structure
3732 **/
3733
3734 static irqreturn_t e1000_intr(int irq, void *data)
3735 {
3736 struct net_device *netdev = data;
3737 struct e1000_adapter *adapter = netdev_priv(netdev);
3738 struct e1000_hw *hw = &adapter->hw;
3739 u32 rctl, icr = er32(ICR);
3740
3741 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
3742 return IRQ_NONE; /* Not our interrupt */
3743
3744 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3745 * not set, then the adapter didn't send an interrupt */
3746 if (unlikely(hw->mac_type >= e1000_82571 &&
3747 !(icr & E1000_ICR_INT_ASSERTED)))
3748 return IRQ_NONE;
3749
3750 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3751 * need for the IMC write */
3752
3753 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3754 hw->get_link_status = 1;
3755 /* 80003ES2LAN workaround--
3756 * For packet buffer work-around on link down event;
3757 * disable receives here in the ISR and
3758 * reset adapter in watchdog
3759 */
3760 if (netif_carrier_ok(netdev) &&
3761 (hw->mac_type == e1000_80003es2lan)) {
3762 /* disable receives */
3763 rctl = er32(RCTL);
3764 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3765 }
3766 /* guard against interrupt when we're going down */
3767 if (!test_bit(__E1000_DOWN, &adapter->flags))
3768 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3769 }
3770
3771 if (unlikely(hw->mac_type < e1000_82571)) {
3772 /* disable interrupts, without the synchronize_irq bit */
3773 ew32(IMC, ~0);
3774 E1000_WRITE_FLUSH();
3775 }
3776 if (likely(napi_schedule_prep(&adapter->napi))) {
3777 adapter->total_tx_bytes = 0;
3778 adapter->total_tx_packets = 0;
3779 adapter->total_rx_bytes = 0;
3780 adapter->total_rx_packets = 0;
3781 __napi_schedule(&adapter->napi);
3782 } else {
3783 /* this really should not happen! if it does it is basically a
3784 * bug, but not a hard error, so enable ints and continue */
3785 if (!test_bit(__E1000_DOWN, &adapter->flags))
3786 e1000_irq_enable(adapter);
3787 }
3788
3789 return IRQ_HANDLED;
3790 }
3791
3792 /**
3793 * e1000_clean - NAPI Rx polling callback
3794 * @adapter: board private structure
3795 **/
3796 static int e1000_clean(struct napi_struct *napi, int budget)
3797 {
3798 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3799 struct net_device *poll_dev = adapter->netdev;
3800 int tx_cleaned = 0, work_done = 0;
3801
3802 adapter = netdev_priv(poll_dev);
3803
3804 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
3805
3806 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3807 &work_done, budget);
3808
3809 if (!tx_cleaned)
3810 work_done = budget;
3811
3812 /* If budget not fully consumed, exit the polling mode */
3813 if (work_done < budget) {
3814 if (likely(adapter->itr_setting & 3))
3815 e1000_set_itr(adapter);
3816 napi_complete(napi);
3817 if (!test_bit(__E1000_DOWN, &adapter->flags))
3818 e1000_irq_enable(adapter);
3819 }
3820
3821 return work_done;
3822 }
3823
3824 /**
3825 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3826 * @adapter: board private structure
3827 **/
3828 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3829 struct e1000_tx_ring *tx_ring)
3830 {
3831 struct e1000_hw *hw = &adapter->hw;
3832 struct net_device *netdev = adapter->netdev;
3833 struct e1000_tx_desc *tx_desc, *eop_desc;
3834 struct e1000_buffer *buffer_info;
3835 unsigned int i, eop;
3836 unsigned int count = 0;
3837 unsigned int total_tx_bytes=0, total_tx_packets=0;
3838
3839 i = tx_ring->next_to_clean;
3840 eop = tx_ring->buffer_info[i].next_to_watch;
3841 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3842
3843 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3844 (count < tx_ring->count)) {
3845 bool cleaned = false;
3846 for ( ; !cleaned; count++) {
3847 tx_desc = E1000_TX_DESC(*tx_ring, i);
3848 buffer_info = &tx_ring->buffer_info[i];
3849 cleaned = (i == eop);
3850
3851 if (cleaned) {
3852 struct sk_buff *skb = buffer_info->skb;
3853 unsigned int segs, bytecount;
3854 segs = skb_shinfo(skb)->gso_segs ?: 1;
3855 /* multiply data chunks by size of headers */
3856 bytecount = ((segs - 1) * skb_headlen(skb)) +
3857 skb->len;
3858 total_tx_packets += segs;
3859 total_tx_bytes += bytecount;
3860 }
3861 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3862 tx_desc->upper.data = 0;
3863
3864 if (unlikely(++i == tx_ring->count)) i = 0;
3865 }
3866
3867 eop = tx_ring->buffer_info[i].next_to_watch;
3868 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3869 }
3870
3871 tx_ring->next_to_clean = i;
3872
3873 #define TX_WAKE_THRESHOLD 32
3874 if (unlikely(count && netif_carrier_ok(netdev) &&
3875 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3876 /* Make sure that anybody stopping the queue after this
3877 * sees the new next_to_clean.
3878 */
3879 smp_mb();
3880 if (netif_queue_stopped(netdev)) {
3881 netif_wake_queue(netdev);
3882 ++adapter->restart_queue;
3883 }
3884 }
3885
3886 if (adapter->detect_tx_hung) {
3887 /* Detect a transmit hang in hardware, this serializes the
3888 * check with the clearing of time_stamp and movement of i */
3889 adapter->detect_tx_hung = false;
3890 if (tx_ring->buffer_info[i].time_stamp &&
3891 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
3892 (adapter->tx_timeout_factor * HZ))
3893 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
3894
3895 /* detected Tx unit hang */
3896 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3897 " Tx Queue <%lu>\n"
3898 " TDH <%x>\n"
3899 " TDT <%x>\n"
3900 " next_to_use <%x>\n"
3901 " next_to_clean <%x>\n"
3902 "buffer_info[next_to_clean]\n"
3903 " time_stamp <%lx>\n"
3904 " next_to_watch <%x>\n"
3905 " jiffies <%lx>\n"
3906 " next_to_watch.status <%x>\n",
3907 (unsigned long)((tx_ring - adapter->tx_ring) /
3908 sizeof(struct e1000_tx_ring)),
3909 readl(hw->hw_addr + tx_ring->tdh),
3910 readl(hw->hw_addr + tx_ring->tdt),
3911 tx_ring->next_to_use,
3912 tx_ring->next_to_clean,
3913 tx_ring->buffer_info[i].time_stamp,
3914 eop,
3915 jiffies,
3916 eop_desc->upper.fields.status);
3917 netif_stop_queue(netdev);
3918 }
3919 }
3920 adapter->total_tx_bytes += total_tx_bytes;
3921 adapter->total_tx_packets += total_tx_packets;
3922 adapter->net_stats.tx_bytes += total_tx_bytes;
3923 adapter->net_stats.tx_packets += total_tx_packets;
3924 return (count < tx_ring->count);
3925 }
3926
3927 /**
3928 * e1000_rx_checksum - Receive Checksum Offload for 82543
3929 * @adapter: board private structure
3930 * @status_err: receive descriptor status and error fields
3931 * @csum: receive descriptor csum field
3932 * @sk_buff: socket buffer with received data
3933 **/
3934
3935 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3936 u32 csum, struct sk_buff *skb)
3937 {
3938 struct e1000_hw *hw = &adapter->hw;
3939 u16 status = (u16)status_err;
3940 u8 errors = (u8)(status_err >> 24);
3941 skb->ip_summed = CHECKSUM_NONE;
3942
3943 /* 82543 or newer only */
3944 if (unlikely(hw->mac_type < e1000_82543)) return;
3945 /* Ignore Checksum bit is set */
3946 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3947 /* TCP/UDP checksum error bit is set */
3948 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3949 /* let the stack verify checksum errors */
3950 adapter->hw_csum_err++;
3951 return;
3952 }
3953 /* TCP/UDP Checksum has not been calculated */
3954 if (hw->mac_type <= e1000_82547_rev_2) {
3955 if (!(status & E1000_RXD_STAT_TCPCS))
3956 return;
3957 } else {
3958 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3959 return;
3960 }
3961 /* It must be a TCP or UDP packet with a valid checksum */
3962 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3963 /* TCP checksum is good */
3964 skb->ip_summed = CHECKSUM_UNNECESSARY;
3965 } else if (hw->mac_type > e1000_82547_rev_2) {
3966 /* IP fragment with UDP payload */
3967 /* Hardware complements the payload checksum, so we undo it
3968 * and then put the value in host order for further stack use.
3969 */
3970 __sum16 sum = (__force __sum16)htons(csum);
3971 skb->csum = csum_unfold(~sum);
3972 skb->ip_summed = CHECKSUM_COMPLETE;
3973 }
3974 adapter->hw_csum_good++;
3975 }
3976
3977 /**
3978 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3979 * @adapter: board private structure
3980 **/
3981 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3982 struct e1000_rx_ring *rx_ring,
3983 int *work_done, int work_to_do)
3984 {
3985 struct e1000_hw *hw = &adapter->hw;
3986 struct net_device *netdev = adapter->netdev;
3987 struct pci_dev *pdev = adapter->pdev;
3988 struct e1000_rx_desc *rx_desc, *next_rxd;
3989 struct e1000_buffer *buffer_info, *next_buffer;
3990 unsigned long flags;
3991 u32 length;
3992 u8 last_byte;
3993 unsigned int i;
3994 int cleaned_count = 0;
3995 bool cleaned = false;
3996 unsigned int total_rx_bytes=0, total_rx_packets=0;
3997
3998 i = rx_ring->next_to_clean;
3999 rx_desc = E1000_RX_DESC(*rx_ring, i);
4000 buffer_info = &rx_ring->buffer_info[i];
4001
4002 while (rx_desc->status & E1000_RXD_STAT_DD) {
4003 struct sk_buff *skb;
4004 u8 status;
4005
4006 if (*work_done >= work_to_do)
4007 break;
4008 (*work_done)++;
4009
4010 status = rx_desc->status;
4011 skb = buffer_info->skb;
4012 buffer_info->skb = NULL;
4013
4014 prefetch(skb->data - NET_IP_ALIGN);
4015
4016 if (++i == rx_ring->count) i = 0;
4017 next_rxd = E1000_RX_DESC(*rx_ring, i);
4018 prefetch(next_rxd);
4019
4020 next_buffer = &rx_ring->buffer_info[i];
4021
4022 cleaned = true;
4023 cleaned_count++;
4024 pci_unmap_single(pdev,
4025 buffer_info->dma,
4026 buffer_info->length,
4027 PCI_DMA_FROMDEVICE);
4028
4029 length = le16_to_cpu(rx_desc->length);
4030
4031 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4032 /* All receives must fit into a single buffer */
4033 E1000_DBG("%s: Receive packet consumed multiple"
4034 " buffers\n", netdev->name);
4035 /* recycle */
4036 buffer_info->skb = skb;
4037 goto next_desc;
4038 }
4039
4040 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4041 last_byte = *(skb->data + length - 1);
4042 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4043 last_byte)) {
4044 spin_lock_irqsave(&adapter->stats_lock, flags);
4045 e1000_tbi_adjust_stats(hw, &adapter->stats,
4046 length, skb->data);
4047 spin_unlock_irqrestore(&adapter->stats_lock,
4048 flags);
4049 length--;
4050 } else {
4051 /* recycle */
4052 buffer_info->skb = skb;
4053 goto next_desc;
4054 }
4055 }
4056
4057 /* adjust length to remove Ethernet CRC, this must be
4058 * done after the TBI_ACCEPT workaround above */
4059 length -= 4;
4060
4061 /* probably a little skewed due to removing CRC */
4062 total_rx_bytes += length;
4063 total_rx_packets++;
4064
4065 /* code added for copybreak, this should improve
4066 * performance for small packets with large amounts
4067 * of reassembly being done in the stack */
4068 if (length < copybreak) {
4069 struct sk_buff *new_skb =
4070 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4071 if (new_skb) {
4072 skb_reserve(new_skb, NET_IP_ALIGN);
4073 skb_copy_to_linear_data_offset(new_skb,
4074 -NET_IP_ALIGN,
4075 (skb->data -
4076 NET_IP_ALIGN),
4077 (length +
4078 NET_IP_ALIGN));
4079 /* save the skb in buffer_info as good */
4080 buffer_info->skb = skb;
4081 skb = new_skb;
4082 }
4083 /* else just continue with the old one */
4084 }
4085 /* end copybreak code */
4086 skb_put(skb, length);
4087
4088 /* Receive Checksum Offload */
4089 e1000_rx_checksum(adapter,
4090 (u32)(status) |
4091 ((u32)(rx_desc->errors) << 24),
4092 le16_to_cpu(rx_desc->csum), skb);
4093
4094 skb->protocol = eth_type_trans(skb, netdev);
4095
4096 if (unlikely(adapter->vlgrp &&
4097 (status & E1000_RXD_STAT_VP))) {
4098 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4099 le16_to_cpu(rx_desc->special));
4100 } else {
4101 netif_receive_skb(skb);
4102 }
4103
4104 next_desc:
4105 rx_desc->status = 0;
4106
4107 /* return some buffers to hardware, one at a time is too slow */
4108 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4109 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4110 cleaned_count = 0;
4111 }
4112
4113 /* use prefetched values */
4114 rx_desc = next_rxd;
4115 buffer_info = next_buffer;
4116 }
4117 rx_ring->next_to_clean = i;
4118
4119 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4120 if (cleaned_count)
4121 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4122
4123 adapter->total_rx_packets += total_rx_packets;
4124 adapter->total_rx_bytes += total_rx_bytes;
4125 adapter->net_stats.rx_bytes += total_rx_bytes;
4126 adapter->net_stats.rx_packets += total_rx_packets;
4127 return cleaned;
4128 }
4129
4130 /**
4131 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4132 * @adapter: address of board private structure
4133 **/
4134
4135 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4136 struct e1000_rx_ring *rx_ring,
4137 int cleaned_count)
4138 {
4139 struct e1000_hw *hw = &adapter->hw;
4140 struct net_device *netdev = adapter->netdev;
4141 struct pci_dev *pdev = adapter->pdev;
4142 struct e1000_rx_desc *rx_desc;
4143 struct e1000_buffer *buffer_info;
4144 struct sk_buff *skb;
4145 unsigned int i;
4146 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4147
4148 i = rx_ring->next_to_use;
4149 buffer_info = &rx_ring->buffer_info[i];
4150
4151 while (cleaned_count--) {
4152 skb = buffer_info->skb;
4153 if (skb) {
4154 skb_trim(skb, 0);
4155 goto map_skb;
4156 }
4157
4158 skb = netdev_alloc_skb(netdev, bufsz);
4159 if (unlikely(!skb)) {
4160 /* Better luck next round */
4161 adapter->alloc_rx_buff_failed++;
4162 break;
4163 }
4164
4165 /* Fix for errata 23, can't cross 64kB boundary */
4166 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4167 struct sk_buff *oldskb = skb;
4168 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4169 "at %p\n", bufsz, skb->data);
4170 /* Try again, without freeing the previous */
4171 skb = netdev_alloc_skb(netdev, bufsz);
4172 /* Failed allocation, critical failure */
4173 if (!skb) {
4174 dev_kfree_skb(oldskb);
4175 break;
4176 }
4177
4178 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4179 /* give up */
4180 dev_kfree_skb(skb);
4181 dev_kfree_skb(oldskb);
4182 break; /* while !buffer_info->skb */
4183 }
4184
4185 /* Use new allocation */
4186 dev_kfree_skb(oldskb);
4187 }
4188 /* Make buffer alignment 2 beyond a 16 byte boundary
4189 * this will result in a 16 byte aligned IP header after
4190 * the 14 byte MAC header is removed
4191 */
4192 skb_reserve(skb, NET_IP_ALIGN);
4193
4194 buffer_info->skb = skb;
4195 buffer_info->length = adapter->rx_buffer_len;
4196 map_skb:
4197 buffer_info->dma = pci_map_single(pdev,
4198 skb->data,
4199 adapter->rx_buffer_len,
4200 PCI_DMA_FROMDEVICE);
4201
4202 /* Fix for errata 23, can't cross 64kB boundary */
4203 if (!e1000_check_64k_bound(adapter,
4204 (void *)(unsigned long)buffer_info->dma,
4205 adapter->rx_buffer_len)) {
4206 DPRINTK(RX_ERR, ERR,
4207 "dma align check failed: %u bytes at %p\n",
4208 adapter->rx_buffer_len,
4209 (void *)(unsigned long)buffer_info->dma);
4210 dev_kfree_skb(skb);
4211 buffer_info->skb = NULL;
4212
4213 pci_unmap_single(pdev, buffer_info->dma,
4214 adapter->rx_buffer_len,
4215 PCI_DMA_FROMDEVICE);
4216
4217 break; /* while !buffer_info->skb */
4218 }
4219 rx_desc = E1000_RX_DESC(*rx_ring, i);
4220 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4221
4222 if (unlikely(++i == rx_ring->count))
4223 i = 0;
4224 buffer_info = &rx_ring->buffer_info[i];
4225 }
4226
4227 if (likely(rx_ring->next_to_use != i)) {
4228 rx_ring->next_to_use = i;
4229 if (unlikely(i-- == 0))
4230 i = (rx_ring->count - 1);
4231
4232 /* Force memory writes to complete before letting h/w
4233 * know there are new descriptors to fetch. (Only
4234 * applicable for weak-ordered memory model archs,
4235 * such as IA-64). */
4236 wmb();
4237 writel(i, hw->hw_addr + rx_ring->rdt);
4238 }
4239 }
4240
4241 /**
4242 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4243 * @adapter:
4244 **/
4245
4246 static void e1000_smartspeed(struct e1000_adapter *adapter)
4247 {
4248 struct e1000_hw *hw = &adapter->hw;
4249 u16 phy_status;
4250 u16 phy_ctrl;
4251
4252 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4253 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
4254 return;
4255
4256 if (adapter->smartspeed == 0) {
4257 /* If Master/Slave config fault is asserted twice,
4258 * we assume back-to-back */
4259 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4260 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4261 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4262 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4263 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4264 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4265 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4266 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
4267 phy_ctrl);
4268 adapter->smartspeed++;
4269 if (!e1000_phy_setup_autoneg(hw) &&
4270 !e1000_read_phy_reg(hw, PHY_CTRL,
4271 &phy_ctrl)) {
4272 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4273 MII_CR_RESTART_AUTO_NEG);
4274 e1000_write_phy_reg(hw, PHY_CTRL,
4275 phy_ctrl);
4276 }
4277 }
4278 return;
4279 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4280 /* If still no link, perhaps using 2/3 pair cable */
4281 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4282 phy_ctrl |= CR_1000T_MS_ENABLE;
4283 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4284 if (!e1000_phy_setup_autoneg(hw) &&
4285 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
4286 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4287 MII_CR_RESTART_AUTO_NEG);
4288 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
4289 }
4290 }
4291 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4292 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4293 adapter->smartspeed = 0;
4294 }
4295
4296 /**
4297 * e1000_ioctl -
4298 * @netdev:
4299 * @ifreq:
4300 * @cmd:
4301 **/
4302
4303 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4304 {
4305 switch (cmd) {
4306 case SIOCGMIIPHY:
4307 case SIOCGMIIREG:
4308 case SIOCSMIIREG:
4309 return e1000_mii_ioctl(netdev, ifr, cmd);
4310 default:
4311 return -EOPNOTSUPP;
4312 }
4313 }
4314
4315 /**
4316 * e1000_mii_ioctl -
4317 * @netdev:
4318 * @ifreq:
4319 * @cmd:
4320 **/
4321
4322 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4323 int cmd)
4324 {
4325 struct e1000_adapter *adapter = netdev_priv(netdev);
4326 struct e1000_hw *hw = &adapter->hw;
4327 struct mii_ioctl_data *data = if_mii(ifr);
4328 int retval;
4329 u16 mii_reg;
4330 u16 spddplx;
4331 unsigned long flags;
4332
4333 if (hw->media_type != e1000_media_type_copper)
4334 return -EOPNOTSUPP;
4335
4336 switch (cmd) {
4337 case SIOCGMIIPHY:
4338 data->phy_id = hw->phy_addr;
4339 break;
4340 case SIOCGMIIREG:
4341 if (!capable(CAP_NET_ADMIN))
4342 return -EPERM;
4343 spin_lock_irqsave(&adapter->stats_lock, flags);
4344 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
4345 &data->val_out)) {
4346 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4347 return -EIO;
4348 }
4349 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4350 break;
4351 case SIOCSMIIREG:
4352 if (!capable(CAP_NET_ADMIN))
4353 return -EPERM;
4354 if (data->reg_num & ~(0x1F))
4355 return -EFAULT;
4356 mii_reg = data->val_in;
4357 spin_lock_irqsave(&adapter->stats_lock, flags);
4358 if (e1000_write_phy_reg(hw, data->reg_num,
4359 mii_reg)) {
4360 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4361 return -EIO;
4362 }
4363 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4364 if (hw->media_type == e1000_media_type_copper) {
4365 switch (data->reg_num) {
4366 case PHY_CTRL:
4367 if (mii_reg & MII_CR_POWER_DOWN)
4368 break;
4369 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4370 hw->autoneg = 1;
4371 hw->autoneg_advertised = 0x2F;
4372 } else {
4373 if (mii_reg & 0x40)
4374 spddplx = SPEED_1000;
4375 else if (mii_reg & 0x2000)
4376 spddplx = SPEED_100;
4377 else
4378 spddplx = SPEED_10;
4379 spddplx += (mii_reg & 0x100)
4380 ? DUPLEX_FULL :
4381 DUPLEX_HALF;
4382 retval = e1000_set_spd_dplx(adapter,
4383 spddplx);
4384 if (retval)
4385 return retval;
4386 }
4387 if (netif_running(adapter->netdev))
4388 e1000_reinit_locked(adapter);
4389 else
4390 e1000_reset(adapter);
4391 break;
4392 case M88E1000_PHY_SPEC_CTRL:
4393 case M88E1000_EXT_PHY_SPEC_CTRL:
4394 if (e1000_phy_reset(hw))
4395 return -EIO;
4396 break;
4397 }
4398 } else {
4399 switch (data->reg_num) {
4400 case PHY_CTRL:
4401 if (mii_reg & MII_CR_POWER_DOWN)
4402 break;
4403 if (netif_running(adapter->netdev))
4404 e1000_reinit_locked(adapter);
4405 else
4406 e1000_reset(adapter);
4407 break;
4408 }
4409 }
4410 break;
4411 default:
4412 return -EOPNOTSUPP;
4413 }
4414 return E1000_SUCCESS;
4415 }
4416
4417 void e1000_pci_set_mwi(struct e1000_hw *hw)
4418 {
4419 struct e1000_adapter *adapter = hw->back;
4420 int ret_val = pci_set_mwi(adapter->pdev);
4421
4422 if (ret_val)
4423 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4424 }
4425
4426 void e1000_pci_clear_mwi(struct e1000_hw *hw)
4427 {
4428 struct e1000_adapter *adapter = hw->back;
4429
4430 pci_clear_mwi(adapter->pdev);
4431 }
4432
4433 int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4434 {
4435 struct e1000_adapter *adapter = hw->back;
4436 return pcix_get_mmrbc(adapter->pdev);
4437 }
4438
4439 void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4440 {
4441 struct e1000_adapter *adapter = hw->back;
4442 pcix_set_mmrbc(adapter->pdev, mmrbc);
4443 }
4444
4445 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
4446 {
4447 struct e1000_adapter *adapter = hw->back;
4448 u16 cap_offset;
4449
4450 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4451 if (!cap_offset)
4452 return -E1000_ERR_CONFIG;
4453
4454 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4455
4456 return E1000_SUCCESS;
4457 }
4458
4459 void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
4460 {
4461 outl(value, port);
4462 }
4463
4464 static void e1000_vlan_rx_register(struct net_device *netdev,
4465 struct vlan_group *grp)
4466 {
4467 struct e1000_adapter *adapter = netdev_priv(netdev);
4468 struct e1000_hw *hw = &adapter->hw;
4469 u32 ctrl, rctl;
4470
4471 if (!test_bit(__E1000_DOWN, &adapter->flags))
4472 e1000_irq_disable(adapter);
4473 adapter->vlgrp = grp;
4474
4475 if (grp) {
4476 /* enable VLAN tag insert/strip */
4477 ctrl = er32(CTRL);
4478 ctrl |= E1000_CTRL_VME;
4479 ew32(CTRL, ctrl);
4480
4481 if (adapter->hw.mac_type != e1000_ich8lan) {
4482 /* enable VLAN receive filtering */
4483 rctl = er32(RCTL);
4484 rctl &= ~E1000_RCTL_CFIEN;
4485 ew32(RCTL, rctl);
4486 e1000_update_mng_vlan(adapter);
4487 }
4488 } else {
4489 /* disable VLAN tag insert/strip */
4490 ctrl = er32(CTRL);
4491 ctrl &= ~E1000_CTRL_VME;
4492 ew32(CTRL, ctrl);
4493
4494 if (adapter->hw.mac_type != e1000_ich8lan) {
4495 if (adapter->mng_vlan_id !=
4496 (u16)E1000_MNG_VLAN_NONE) {
4497 e1000_vlan_rx_kill_vid(netdev,
4498 adapter->mng_vlan_id);
4499 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4500 }
4501 }
4502 }
4503
4504 if (!test_bit(__E1000_DOWN, &adapter->flags))
4505 e1000_irq_enable(adapter);
4506 }
4507
4508 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4509 {
4510 struct e1000_adapter *adapter = netdev_priv(netdev);
4511 struct e1000_hw *hw = &adapter->hw;
4512 u32 vfta, index;
4513
4514 if ((hw->mng_cookie.status &
4515 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4516 (vid == adapter->mng_vlan_id))
4517 return;
4518 /* add VID to filter table */
4519 index = (vid >> 5) & 0x7F;
4520 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4521 vfta |= (1 << (vid & 0x1F));
4522 e1000_write_vfta(hw, index, vfta);
4523 }
4524
4525 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4526 {
4527 struct e1000_adapter *adapter = netdev_priv(netdev);
4528 struct e1000_hw *hw = &adapter->hw;
4529 u32 vfta, index;
4530
4531 if (!test_bit(__E1000_DOWN, &adapter->flags))
4532 e1000_irq_disable(adapter);
4533 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4534 if (!test_bit(__E1000_DOWN, &adapter->flags))
4535 e1000_irq_enable(adapter);
4536
4537 if ((hw->mng_cookie.status &
4538 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4539 (vid == adapter->mng_vlan_id)) {
4540 /* release control to f/w */
4541 e1000_release_hw_control(adapter);
4542 return;
4543 }
4544
4545 /* remove VID from filter table */
4546 index = (vid >> 5) & 0x7F;
4547 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4548 vfta &= ~(1 << (vid & 0x1F));
4549 e1000_write_vfta(hw, index, vfta);
4550 }
4551
4552 static void e1000_restore_vlan(struct e1000_adapter *adapter)
4553 {
4554 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4555
4556 if (adapter->vlgrp) {
4557 u16 vid;
4558 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4559 if (!vlan_group_get_device(adapter->vlgrp, vid))
4560 continue;
4561 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4562 }
4563 }
4564 }
4565
4566 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
4567 {
4568 struct e1000_hw *hw = &adapter->hw;
4569
4570 hw->autoneg = 0;
4571
4572 /* Fiber NICs only allow 1000 gbps Full duplex */
4573 if ((hw->media_type == e1000_media_type_fiber) &&
4574 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4575 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4576 return -EINVAL;
4577 }
4578
4579 switch (spddplx) {
4580 case SPEED_10 + DUPLEX_HALF:
4581 hw->forced_speed_duplex = e1000_10_half;
4582 break;
4583 case SPEED_10 + DUPLEX_FULL:
4584 hw->forced_speed_duplex = e1000_10_full;
4585 break;
4586 case SPEED_100 + DUPLEX_HALF:
4587 hw->forced_speed_duplex = e1000_100_half;
4588 break;
4589 case SPEED_100 + DUPLEX_FULL:
4590 hw->forced_speed_duplex = e1000_100_full;
4591 break;
4592 case SPEED_1000 + DUPLEX_FULL:
4593 hw->autoneg = 1;
4594 hw->autoneg_advertised = ADVERTISE_1000_FULL;
4595 break;
4596 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4597 default:
4598 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4599 return -EINVAL;
4600 }
4601 return 0;
4602 }
4603
4604 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
4605 {
4606 struct net_device *netdev = pci_get_drvdata(pdev);
4607 struct e1000_adapter *adapter = netdev_priv(netdev);
4608 struct e1000_hw *hw = &adapter->hw;
4609 u32 ctrl, ctrl_ext, rctl, status;
4610 u32 wufc = adapter->wol;
4611 #ifdef CONFIG_PM
4612 int retval = 0;
4613 #endif
4614
4615 netif_device_detach(netdev);
4616
4617 if (netif_running(netdev)) {
4618 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4619 e1000_down(adapter);
4620 }
4621
4622 #ifdef CONFIG_PM
4623 retval = pci_save_state(pdev);
4624 if (retval)
4625 return retval;
4626 #endif
4627
4628 status = er32(STATUS);
4629 if (status & E1000_STATUS_LU)
4630 wufc &= ~E1000_WUFC_LNKC;
4631
4632 if (wufc) {
4633 e1000_setup_rctl(adapter);
4634 e1000_set_rx_mode(netdev);
4635
4636 /* turn on all-multi mode if wake on multicast is enabled */
4637 if (wufc & E1000_WUFC_MC) {
4638 rctl = er32(RCTL);
4639 rctl |= E1000_RCTL_MPE;
4640 ew32(RCTL, rctl);
4641 }
4642
4643 if (hw->mac_type >= e1000_82540) {
4644 ctrl = er32(CTRL);
4645 /* advertise wake from D3Cold */
4646 #define E1000_CTRL_ADVD3WUC 0x00100000
4647 /* phy power management enable */
4648 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4649 ctrl |= E1000_CTRL_ADVD3WUC |
4650 E1000_CTRL_EN_PHY_PWR_MGMT;
4651 ew32(CTRL, ctrl);
4652 }
4653
4654 if (hw->media_type == e1000_media_type_fiber ||
4655 hw->media_type == e1000_media_type_internal_serdes) {
4656 /* keep the laser running in D3 */
4657 ctrl_ext = er32(CTRL_EXT);
4658 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4659 ew32(CTRL_EXT, ctrl_ext);
4660 }
4661
4662 /* Allow time for pending master requests to run */
4663 e1000_disable_pciex_master(hw);
4664
4665 ew32(WUC, E1000_WUC_PME_EN);
4666 ew32(WUFC, wufc);
4667 } else {
4668 ew32(WUC, 0);
4669 ew32(WUFC, 0);
4670 }
4671
4672 e1000_release_manageability(adapter);
4673
4674 *enable_wake = !!wufc;
4675
4676 /* make sure adapter isn't asleep if manageability is enabled */
4677 if (adapter->en_mng_pt)
4678 *enable_wake = true;
4679
4680 if (hw->phy_type == e1000_phy_igp_3)
4681 e1000_phy_powerdown_workaround(hw);
4682
4683 if (netif_running(netdev))
4684 e1000_free_irq(adapter);
4685
4686 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4687 * would have already happened in close and is redundant. */
4688 e1000_release_hw_control(adapter);
4689
4690 pci_disable_device(pdev);
4691
4692 return 0;
4693 }
4694
4695 #ifdef CONFIG_PM
4696 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4697 {
4698 int retval;
4699 bool wake;
4700
4701 retval = __e1000_shutdown(pdev, &wake);
4702 if (retval)
4703 return retval;
4704
4705 if (wake) {
4706 pci_prepare_to_sleep(pdev);
4707 } else {
4708 pci_wake_from_d3(pdev, false);
4709 pci_set_power_state(pdev, PCI_D3hot);
4710 }
4711
4712 return 0;
4713 }
4714
4715 static int e1000_resume(struct pci_dev *pdev)
4716 {
4717 struct net_device *netdev = pci_get_drvdata(pdev);
4718 struct e1000_adapter *adapter = netdev_priv(netdev);
4719 struct e1000_hw *hw = &adapter->hw;
4720 u32 err;
4721
4722 pci_set_power_state(pdev, PCI_D0);
4723 pci_restore_state(pdev);
4724
4725 if (adapter->need_ioport)
4726 err = pci_enable_device(pdev);
4727 else
4728 err = pci_enable_device_mem(pdev);
4729 if (err) {
4730 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4731 return err;
4732 }
4733 pci_set_master(pdev);
4734
4735 pci_enable_wake(pdev, PCI_D3hot, 0);
4736 pci_enable_wake(pdev, PCI_D3cold, 0);
4737
4738 if (netif_running(netdev)) {
4739 err = e1000_request_irq(adapter);
4740 if (err)
4741 return err;
4742 }
4743
4744 e1000_power_up_phy(adapter);
4745 e1000_reset(adapter);
4746 ew32(WUS, ~0);
4747
4748 e1000_init_manageability(adapter);
4749
4750 if (netif_running(netdev))
4751 e1000_up(adapter);
4752
4753 netif_device_attach(netdev);
4754
4755 /* If the controller is 82573 and f/w is AMT, do not set
4756 * DRV_LOAD until the interface is up. For all other cases,
4757 * let the f/w know that the h/w is now under the control
4758 * of the driver. */
4759 if (hw->mac_type != e1000_82573 ||
4760 !e1000_check_mng_mode(hw))
4761 e1000_get_hw_control(adapter);
4762
4763 return 0;
4764 }
4765 #endif
4766
4767 static void e1000_shutdown(struct pci_dev *pdev)
4768 {
4769 bool wake;
4770
4771 __e1000_shutdown(pdev, &wake);
4772
4773 if (system_state == SYSTEM_POWER_OFF) {
4774 pci_wake_from_d3(pdev, wake);
4775 pci_set_power_state(pdev, PCI_D3hot);
4776 }
4777 }
4778
4779 #ifdef CONFIG_NET_POLL_CONTROLLER
4780 /*
4781 * Polling 'interrupt' - used by things like netconsole to send skbs
4782 * without having to re-enable interrupts. It's not called while
4783 * the interrupt routine is executing.
4784 */
4785 static void e1000_netpoll(struct net_device *netdev)
4786 {
4787 struct e1000_adapter *adapter = netdev_priv(netdev);
4788
4789 disable_irq(adapter->pdev->irq);
4790 e1000_intr(adapter->pdev->irq, netdev);
4791 enable_irq(adapter->pdev->irq);
4792 }
4793 #endif
4794
4795 /**
4796 * e1000_io_error_detected - called when PCI error is detected
4797 * @pdev: Pointer to PCI device
4798 * @state: The current pci conneection state
4799 *
4800 * This function is called after a PCI bus error affecting
4801 * this device has been detected.
4802 */
4803 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4804 pci_channel_state_t state)
4805 {
4806 struct net_device *netdev = pci_get_drvdata(pdev);
4807 struct e1000_adapter *adapter = netdev_priv(netdev);
4808
4809 netif_device_detach(netdev);
4810
4811 if (netif_running(netdev))
4812 e1000_down(adapter);
4813 pci_disable_device(pdev);
4814
4815 /* Request a slot slot reset. */
4816 return PCI_ERS_RESULT_NEED_RESET;
4817 }
4818
4819 /**
4820 * e1000_io_slot_reset - called after the pci bus has been reset.
4821 * @pdev: Pointer to PCI device
4822 *
4823 * Restart the card from scratch, as if from a cold-boot. Implementation
4824 * resembles the first-half of the e1000_resume routine.
4825 */
4826 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4827 {
4828 struct net_device *netdev = pci_get_drvdata(pdev);
4829 struct e1000_adapter *adapter = netdev_priv(netdev);
4830 struct e1000_hw *hw = &adapter->hw;
4831 int err;
4832
4833 if (adapter->need_ioport)
4834 err = pci_enable_device(pdev);
4835 else
4836 err = pci_enable_device_mem(pdev);
4837 if (err) {
4838 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4839 return PCI_ERS_RESULT_DISCONNECT;
4840 }
4841 pci_set_master(pdev);
4842
4843 pci_enable_wake(pdev, PCI_D3hot, 0);
4844 pci_enable_wake(pdev, PCI_D3cold, 0);
4845
4846 e1000_reset(adapter);
4847 ew32(WUS, ~0);
4848
4849 return PCI_ERS_RESULT_RECOVERED;
4850 }
4851
4852 /**
4853 * e1000_io_resume - called when traffic can start flowing again.
4854 * @pdev: Pointer to PCI device
4855 *
4856 * This callback is called when the error recovery driver tells us that
4857 * its OK to resume normal operation. Implementation resembles the
4858 * second-half of the e1000_resume routine.
4859 */
4860 static void e1000_io_resume(struct pci_dev *pdev)
4861 {
4862 struct net_device *netdev = pci_get_drvdata(pdev);
4863 struct e1000_adapter *adapter = netdev_priv(netdev);
4864 struct e1000_hw *hw = &adapter->hw;
4865
4866 e1000_init_manageability(adapter);
4867
4868 if (netif_running(netdev)) {
4869 if (e1000_up(adapter)) {
4870 printk("e1000: can't bring device back up after reset\n");
4871 return;
4872 }
4873 }
4874
4875 netif_device_attach(netdev);
4876
4877 /* If the controller is 82573 and f/w is AMT, do not set
4878 * DRV_LOAD until the interface is up. For all other cases,
4879 * let the f/w know that the h/w is now under the control
4880 * of the driver. */
4881 if (hw->mac_type != e1000_82573 ||
4882 !e1000_check_mng_mode(hw))
4883 e1000_get_hw_control(adapter);
4884
4885 }
4886
4887 /* e1000_main.c */
Linux for Ginger Game Console