arch/arm/mach-davinci/board-dm355-evm.c

   1 /*
   2  * TI DaVinci EVM board support
   3  *
   4  * Author: Kevin Hilman, Deep Root Systems, LLC
   5  *
   6  * 2007 (c) MontaVista Software, Inc. This file is licensed under
   7  * the terms of the GNU General Public License version 2. This program
   8  * is licensed "as is" without any warranty of any kind, whether express
   9  * or implied.
  10  */
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/dma-mapping.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/mtd/mtd.h>
  17 #include <linux/mtd/partitions.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/i2c.h>
  20 #include <linux/io.h>
  21 #include <linux/gpio.h>
  22 #include <linux/clk.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/eeprom.h>
  25
  26 #include <asm/setup.h>
  27 #include <asm/mach-types.h>
  28 #include <asm/mach/arch.h>
  29 #include <asm/mach/map.h>
  30 #include <asm/mach/flash.h>
  31
  32 #include <mach/hardware.h>
  33 #include <mach/dm355.h>
  34 #include <mach/psc.h>
  35 #include <mach/common.h>
  36 #include <mach/i2c.h>
  37 #include <mach/serial.h>
  38 #include <mach/nand.h>
  39
  40 #define DAVINCI_ASYNC_EMIF_CONTROL_BASE         0x01e10000
  41 #define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE        0x02000000
  42
  43 /* NOTE:  this is geared for the standard config, with a socketed
  44  * 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors.  If you
  45  * swap chips, maybe with a different block size, partitioning may
  46  * need to be changed.
  47  */
  48 #define NAND_BLOCK_SIZE         SZ_128K
  49
  50 static struct mtd_partition davinci_nand_partitions[] = {
  51         {
  52                 /* UBL (a few copies) plus U-Boot */
  53                 .name           = "bootloader",
  54                 .offset         = 0,
  55                 .size           = 15 * NAND_BLOCK_SIZE,
  56                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
  57         }, {
  58                 /* U-Boot environment */
  59                 .name           = "params",
  60                 .offset         = MTDPART_OFS_APPEND,
  61                 .size           = 1 * NAND_BLOCK_SIZE,
  62                 .mask_flags     = 0,
  63         }, {
  64                 .name           = "kernel",
  65                 .offset         = MTDPART_OFS_APPEND,
  66                 .size           = SZ_4M,
  67                 .mask_flags     = 0,
  68         }, {
  69                 .name           = "filesystem1",
  70                 .offset         = MTDPART_OFS_APPEND,
  71                 .size           = SZ_512M,
  72                 .mask_flags     = 0,
  73         }, {
  74                 .name           = "filesystem2",
  75                 .offset         = MTDPART_OFS_APPEND,
  76                 .size           = MTDPART_SIZ_FULL,
  77                 .mask_flags     = 0,
  78         }
  79         /* two blocks with bad block table (and mirror) at the end */
  80 };
  81
  82 static struct davinci_nand_pdata davinci_nand_data = {
  83         .mask_chipsel           = BIT(14),
  84         .parts                  = davinci_nand_partitions,
  85         .nr_parts               = ARRAY_SIZE(davinci_nand_partitions),
  86         .ecc_mode               = NAND_ECC_HW_SYNDROME,
  87         .options                = NAND_USE_FLASH_BBT,
  88 };
  89
  90 static struct resource davinci_nand_resources[] = {
  91         {
  92                 .start          = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
  93                 .end            = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
  94                 .flags          = IORESOURCE_MEM,
  95         }, {
  96                 .start          = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
  97                 .end            = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
  98                 .flags          = IORESOURCE_MEM,
  99         },
 100 };
 101
 102 static struct platform_device davinci_nand_device = {
 103         .name                   = "davinci_nand",
 104         .id                     = 0,
 105
 106         .num_resources          = ARRAY_SIZE(davinci_nand_resources),
 107         .resource               = davinci_nand_resources,
 108
 109         .dev                    = {
 110                 .platform_data  = &davinci_nand_data,
 111         },
 112 };
 113
 114 static struct davinci_i2c_platform_data i2c_pdata = {
 115         .bus_freq       = 400   /* kHz */,
 116         .bus_delay      = 0     /* usec */,
 117 };
 118
 119 static int dm355evm_mmc_gpios = -EINVAL;
 120
 121 static void dm355evm_mmcsd_gpios(unsigned gpio)
 122 {
 123         gpio_request(gpio + 0, "mmc0_ro");
 124         gpio_request(gpio + 1, "mmc0_cd");
 125         gpio_request(gpio + 2, "mmc1_ro");
 126         gpio_request(gpio + 3, "mmc1_cd");
 127
 128         /* we "know" these are input-only so we don't
 129          * need to call gpio_direction_input()
 130          */
 131
 132         dm355evm_mmc_gpios = gpio;
 133 }
 134
 135 static struct i2c_board_info dm355evm_i2c_info[] = {
 136         { I2C_BOARD_INFO("dm355evm_msp", 0x25),
 137                 .platform_data = dm355evm_mmcsd_gpios,
 138                 /* plus irq */ },
 139         /* { I2C_BOARD_INFO("tlv320aic3x", 0x1b), }, */
 140         /* { I2C_BOARD_INFO("tvp5146", 0x5d), }, */
 141 };
 142
 143 static void __init evm_init_i2c(void)
 144 {
 145         davinci_init_i2c(&i2c_pdata);
 146
 147         gpio_request(5, "dm355evm_msp");
 148         gpio_direction_input(5);
 149         dm355evm_i2c_info[0].irq = gpio_to_irq(5);
 150
 151         i2c_register_board_info(1, dm355evm_i2c_info,
 152                         ARRAY_SIZE(dm355evm_i2c_info));
 153 }
 154
 155 static struct resource dm355evm_dm9000_rsrc[] = {
 156         {
 157                 /* addr */
 158                 .start  = 0x04014000,
 159                 .end    = 0x04014001,
 160                 .flags  = IORESOURCE_MEM,
 161         }, {
 162                 /* data */
 163                 .start  = 0x04014002,
 164                 .end    = 0x04014003,
 165                 .flags  = IORESOURCE_MEM,
 166         }, {
 167                 .flags  = IORESOURCE_IRQ
 168                         | IORESOURCE_IRQ_HIGHEDGE /* rising (active high) */,
 169         },
 170 };
 171
 172 static struct platform_device dm355evm_dm9000 = {
 173         .name           = "dm9000",
 174         .id             = -1,
 175         .resource       = dm355evm_dm9000_rsrc,
 176         .num_resources  = ARRAY_SIZE(dm355evm_dm9000_rsrc),
 177 };
 178
 179 static struct platform_device *davinci_evm_devices[] __initdata = {
 180         &dm355evm_dm9000,
 181         &davinci_nand_device,
 182 };
 183
 184 static struct davinci_uart_config uart_config __initdata = {
 185         .enabled_uarts = (1 << 0),
 186 };
 187
 188 static void __init dm355_evm_map_io(void)
 189 {
 190         davinci_map_common_io();
 191         dm355_init();
 192 }
 193
 194 /* Don't connect anything to J10 unless you're only using USB host
 195  * mode *and* have to do so with some kind of gender-bender.  If
 196  * you have proper Mini-B or Mini-A cables (or Mini-A adapters)
 197  * the ID pin won't need any help.
 198  */
 199 #ifdef CONFIG_USB_MUSB_PERIPHERAL
 200 #define USB_ID_VALUE    0       /* ID pulled high; *should* float */
 201 #else
 202 #define USB_ID_VALUE    1       /* ID pulled low */
 203 #endif
 204
 205 static struct spi_eeprom at25640a = {
 206         .byte_len       = SZ_64K / 8,
 207         .name           = "at25640a",
 208         .page_size      = 32,
 209         .flags          = EE_ADDR2,
 210 };
 211
 212 static struct spi_board_info dm355_evm_spi_info[] __initconst = {
 213         {
 214                 .modalias       = "at25",
 215                 .platform_data  = &at25640a,
 216                 .max_speed_hz   = 10 * 1000 * 1000,     /* at 3v3 */
 217                 .bus_num        = 0,
 218                 .chip_select    = 0,
 219                 .mode           = SPI_MODE_0,
 220         },
 221 };
 222
 223 static __init void dm355_evm_init(void)
 224 {
 225         struct clk *aemif;
 226
 227         gpio_request(1, "dm9000");
 228         gpio_direction_input(1);
 229         dm355evm_dm9000_rsrc[2].start = gpio_to_irq(1);
 230
 231         aemif = clk_get(&dm355evm_dm9000.dev, "aemif");
 232         if (IS_ERR(aemif))
 233                 WARN("%s: unable to get AEMIF clock\n", __func__);
 234         else
 235                 clk_enable(aemif);
 236
 237         platform_add_devices(davinci_evm_devices,
 238                              ARRAY_SIZE(davinci_evm_devices));
 239         evm_init_i2c();
 240         davinci_serial_init(&uart_config);
 241
 242         /* NOTE:  NAND flash timings set by the UBL are slower than
 243          * needed by MT29F16G08FAA chips ... EMIF.A1CR is 0x40400204
 244          * but could be 0x0400008c for about 25% faster page reads.
 245          */
 246
 247         gpio_request(2, "usb_id_toggle");
 248         gpio_direction_output(2, USB_ID_VALUE);
 249         /* irlml6401 switches over 1A in under 8 msec */
 250         setup_usb(500, 8);
 251
 252         dm355_init_spi0(BIT(0), dm355_evm_spi_info,
 253                         ARRAY_SIZE(dm355_evm_spi_info));
 254 }
 255
 256 static __init void dm355_evm_irq_init(void)
 257 {
 258         davinci_irq_init();
 259 }
 260
 261 MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
 262         .phys_io      = IO_PHYS,
 263         .io_pg_offst  = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
 264         .boot_params  = (0x80000100),
 265         .map_io       = dm355_evm_map_io,
 266         .init_irq     = dm355_evm_irq_init,
 267         .timer        = &davinci_timer,
 268         .init_machine = dm355_evm_init,
 269 MACHINE_END