Make sure omap cpufreq driver initializes after cpufreq framework and governors
[linux-ginger.git] / drivers / ide / ide-dma.c
blobee58c88dee5a61f51d437d1f618fd89745144785
1 /*
2 * IDE DMA support (including IDE PCI BM-DMA).
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
8 * May be copied or modified under the terms of the GNU General Public License
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
14 * Special Thanks to Mark for his Six years of work.
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/ide.h>
34 #include <linux/scatterlist.h>
35 #include <linux/dma-mapping.h>
37 static const struct drive_list_entry drive_whitelist[] = {
38 { "Micropolis 2112A" , NULL },
39 { "CONNER CTMA 4000" , NULL },
40 { "CONNER CTT8000-A" , NULL },
41 { "ST34342A" , NULL },
42 { NULL , NULL }
45 static const struct drive_list_entry drive_blacklist[] = {
46 { "WDC AC11000H" , NULL },
47 { "WDC AC22100H" , NULL },
48 { "WDC AC32500H" , NULL },
49 { "WDC AC33100H" , NULL },
50 { "WDC AC31600H" , NULL },
51 { "WDC AC32100H" , "24.09P07" },
52 { "WDC AC23200L" , "21.10N21" },
53 { "Compaq CRD-8241B" , NULL },
54 { "CRD-8400B" , NULL },
55 { "CRD-8480B", NULL },
56 { "CRD-8482B", NULL },
57 { "CRD-84" , NULL },
58 { "SanDisk SDP3B" , NULL },
59 { "SanDisk SDP3B-64" , NULL },
60 { "SANYO CD-ROM CRD" , NULL },
61 { "HITACHI CDR-8" , NULL },
62 { "HITACHI CDR-8335" , NULL },
63 { "HITACHI CDR-8435" , NULL },
64 { "Toshiba CD-ROM XM-6202B" , NULL },
65 { "TOSHIBA CD-ROM XM-1702BC", NULL },
66 { "CD-532E-A" , NULL },
67 { "E-IDE CD-ROM CR-840", NULL },
68 { "CD-ROM Drive/F5A", NULL },
69 { "WPI CDD-820", NULL },
70 { "SAMSUNG CD-ROM SC-148C", NULL },
71 { "SAMSUNG CD-ROM SC", NULL },
72 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
73 { "_NEC DV5800A", NULL },
74 { "SAMSUNG CD-ROM SN-124", "N001" },
75 { "Seagate STT20000A", NULL },
76 { "CD-ROM CDR_U200", "1.09" },
77 { NULL , NULL }
81 /**
82 * ide_dma_intr - IDE DMA interrupt handler
83 * @drive: the drive the interrupt is for
85 * Handle an interrupt completing a read/write DMA transfer on an
86 * IDE device
89 ide_startstop_t ide_dma_intr(ide_drive_t *drive)
91 ide_hwif_t *hwif = drive->hwif;
92 struct ide_cmd *cmd = &hwif->cmd;
93 u8 stat = 0, dma_stat = 0;
95 drive->waiting_for_dma = 0;
96 dma_stat = hwif->dma_ops->dma_end(drive);
97 ide_dma_unmap_sg(drive, cmd);
98 stat = hwif->tp_ops->read_status(hwif);
100 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
101 if (!dma_stat) {
102 if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
103 ide_finish_cmd(drive, cmd, stat);
104 else
105 ide_complete_rq(drive, 0,
106 blk_rq_sectors(cmd->rq) << 9);
107 return ide_stopped;
109 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
110 drive->name, __func__, dma_stat);
112 return ide_error(drive, "dma_intr", stat);
115 int ide_dma_good_drive(ide_drive_t *drive)
117 return ide_in_drive_list(drive->id, drive_whitelist);
121 * ide_dma_map_sg - map IDE scatter gather for DMA I/O
122 * @drive: the drive to map the DMA table for
123 * @cmd: command
125 * Perform the DMA mapping magic necessary to access the source or
126 * target buffers of a request via DMA. The lower layers of the
127 * kernel provide the necessary cache management so that we can
128 * operate in a portable fashion.
131 static int ide_dma_map_sg(ide_drive_t *drive, struct ide_cmd *cmd)
133 ide_hwif_t *hwif = drive->hwif;
134 struct scatterlist *sg = hwif->sg_table;
135 int i;
137 if (cmd->tf_flags & IDE_TFLAG_WRITE)
138 cmd->sg_dma_direction = DMA_TO_DEVICE;
139 else
140 cmd->sg_dma_direction = DMA_FROM_DEVICE;
142 i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
143 if (i) {
144 cmd->orig_sg_nents = cmd->sg_nents;
145 cmd->sg_nents = i;
148 return i;
152 * ide_dma_unmap_sg - clean up DMA mapping
153 * @drive: The drive to unmap
155 * Teardown mappings after DMA has completed. This must be called
156 * after the completion of each use of ide_build_dmatable and before
157 * the next use of ide_build_dmatable. Failure to do so will cause
158 * an oops as only one mapping can be live for each target at a given
159 * time.
162 void ide_dma_unmap_sg(ide_drive_t *drive, struct ide_cmd *cmd)
164 ide_hwif_t *hwif = drive->hwif;
166 dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
167 cmd->sg_dma_direction);
169 EXPORT_SYMBOL_GPL(ide_dma_unmap_sg);
172 * ide_dma_off_quietly - Generic DMA kill
173 * @drive: drive to control
175 * Turn off the current DMA on this IDE controller.
178 void ide_dma_off_quietly(ide_drive_t *drive)
180 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
181 ide_toggle_bounce(drive, 0);
183 drive->hwif->dma_ops->dma_host_set(drive, 0);
185 EXPORT_SYMBOL(ide_dma_off_quietly);
188 * ide_dma_off - disable DMA on a device
189 * @drive: drive to disable DMA on
191 * Disable IDE DMA for a device on this IDE controller.
192 * Inform the user that DMA has been disabled.
195 void ide_dma_off(ide_drive_t *drive)
197 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
198 ide_dma_off_quietly(drive);
200 EXPORT_SYMBOL(ide_dma_off);
203 * ide_dma_on - Enable DMA on a device
204 * @drive: drive to enable DMA on
206 * Enable IDE DMA for a device on this IDE controller.
209 void ide_dma_on(ide_drive_t *drive)
211 drive->dev_flags |= IDE_DFLAG_USING_DMA;
212 ide_toggle_bounce(drive, 1);
214 drive->hwif->dma_ops->dma_host_set(drive, 1);
217 int __ide_dma_bad_drive(ide_drive_t *drive)
219 u16 *id = drive->id;
221 int blacklist = ide_in_drive_list(id, drive_blacklist);
222 if (blacklist) {
223 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
224 drive->name, (char *)&id[ATA_ID_PROD]);
225 return blacklist;
227 return 0;
229 EXPORT_SYMBOL(__ide_dma_bad_drive);
231 static const u8 xfer_mode_bases[] = {
232 XFER_UDMA_0,
233 XFER_MW_DMA_0,
234 XFER_SW_DMA_0,
237 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
239 u16 *id = drive->id;
240 ide_hwif_t *hwif = drive->hwif;
241 const struct ide_port_ops *port_ops = hwif->port_ops;
242 unsigned int mask = 0;
244 switch (base) {
245 case XFER_UDMA_0:
246 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
247 break;
248 mask = id[ATA_ID_UDMA_MODES];
249 if (port_ops && port_ops->udma_filter)
250 mask &= port_ops->udma_filter(drive);
251 else
252 mask &= hwif->ultra_mask;
255 * avoid false cable warning from eighty_ninty_three()
257 if (req_mode > XFER_UDMA_2) {
258 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
259 mask &= 0x07;
261 break;
262 case XFER_MW_DMA_0:
263 mask = id[ATA_ID_MWDMA_MODES];
265 /* Also look for the CF specific MWDMA modes... */
266 if (ata_id_is_cfa(id) && (id[ATA_ID_CFA_MODES] & 0x38)) {
267 u8 mode = ((id[ATA_ID_CFA_MODES] & 0x38) >> 3) - 1;
269 mask |= ((2 << mode) - 1) << 3;
272 if (port_ops && port_ops->mdma_filter)
273 mask &= port_ops->mdma_filter(drive);
274 else
275 mask &= hwif->mwdma_mask;
276 break;
277 case XFER_SW_DMA_0:
278 mask = id[ATA_ID_SWDMA_MODES];
279 if (!(mask & ATA_SWDMA2) && (id[ATA_ID_OLD_DMA_MODES] >> 8)) {
280 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
283 * if the mode is valid convert it to the mask
284 * (the maximum allowed mode is XFER_SW_DMA_2)
286 if (mode <= 2)
287 mask = (2 << mode) - 1;
289 mask &= hwif->swdma_mask;
290 break;
291 default:
292 BUG();
293 break;
296 return mask;
300 * ide_find_dma_mode - compute DMA speed
301 * @drive: IDE device
302 * @req_mode: requested mode
304 * Checks the drive/host capabilities and finds the speed to use for
305 * the DMA transfer. The speed is then limited by the requested mode.
307 * Returns 0 if the drive/host combination is incapable of DMA transfers
308 * or if the requested mode is not a DMA mode.
311 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
313 ide_hwif_t *hwif = drive->hwif;
314 unsigned int mask;
315 int x, i;
316 u8 mode = 0;
318 if (drive->media != ide_disk) {
319 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
320 return 0;
323 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
324 if (req_mode < xfer_mode_bases[i])
325 continue;
326 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
327 x = fls(mask) - 1;
328 if (x >= 0) {
329 mode = xfer_mode_bases[i] + x;
330 break;
334 if (hwif->chipset == ide_acorn && mode == 0) {
336 * is this correct?
338 if (ide_dma_good_drive(drive) &&
339 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
340 mode = XFER_MW_DMA_1;
343 mode = min(mode, req_mode);
345 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
346 mode ? ide_xfer_verbose(mode) : "no DMA");
348 return mode;
351 static int ide_tune_dma(ide_drive_t *drive)
353 ide_hwif_t *hwif = drive->hwif;
354 u8 speed;
356 if (ata_id_has_dma(drive->id) == 0 ||
357 (drive->dev_flags & IDE_DFLAG_NODMA))
358 return 0;
360 /* consult the list of known "bad" drives */
361 if (__ide_dma_bad_drive(drive))
362 return 0;
364 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
365 return config_drive_for_dma(drive);
367 speed = ide_max_dma_mode(drive);
369 if (!speed)
370 return 0;
372 if (ide_set_dma_mode(drive, speed))
373 return 0;
375 return 1;
378 static int ide_dma_check(ide_drive_t *drive)
380 ide_hwif_t *hwif = drive->hwif;
382 if (ide_tune_dma(drive))
383 return 0;
385 /* TODO: always do PIO fallback */
386 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
387 return -1;
389 ide_set_max_pio(drive);
391 return -1;
394 int ide_set_dma(ide_drive_t *drive)
396 int rc;
399 * Force DMAing for the beginning of the check.
400 * Some chipsets appear to do interesting
401 * things, if not checked and cleared.
402 * PARANOIA!!!
404 ide_dma_off_quietly(drive);
406 rc = ide_dma_check(drive);
407 if (rc)
408 return rc;
410 ide_dma_on(drive);
412 return 0;
415 void ide_check_dma_crc(ide_drive_t *drive)
417 u8 mode;
419 ide_dma_off_quietly(drive);
420 drive->crc_count = 0;
421 mode = drive->current_speed;
423 * Don't try non Ultra-DMA modes without iCRC's. Force the
424 * device to PIO and make the user enable SWDMA/MWDMA modes.
426 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
427 mode--;
428 else
429 mode = XFER_PIO_4;
430 ide_set_xfer_rate(drive, mode);
431 if (drive->current_speed >= XFER_SW_DMA_0)
432 ide_dma_on(drive);
435 void ide_dma_lost_irq(ide_drive_t *drive)
437 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
439 EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
442 * un-busy the port etc, and clear any pending DMA status. we want to
443 * retry the current request in pio mode instead of risking tossing it
444 * all away
446 ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
448 ide_hwif_t *hwif = drive->hwif;
449 const struct ide_dma_ops *dma_ops = hwif->dma_ops;
450 struct ide_cmd *cmd = &hwif->cmd;
451 struct request *rq;
452 ide_startstop_t ret = ide_stopped;
455 * end current dma transaction
458 if (error < 0) {
459 printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
460 drive->waiting_for_dma = 0;
461 (void)dma_ops->dma_end(drive);
462 ide_dma_unmap_sg(drive, cmd);
463 ret = ide_error(drive, "dma timeout error",
464 hwif->tp_ops->read_status(hwif));
465 } else {
466 printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
467 if (dma_ops->dma_clear)
468 dma_ops->dma_clear(drive);
469 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
470 if (dma_ops->dma_test_irq(drive) == 0) {
471 ide_dump_status(drive, "DMA timeout",
472 hwif->tp_ops->read_status(hwif));
473 drive->waiting_for_dma = 0;
474 (void)dma_ops->dma_end(drive);
475 ide_dma_unmap_sg(drive, cmd);
480 * disable dma for now, but remember that we did so because of
481 * a timeout -- we'll reenable after we finish this next request
482 * (or rather the first chunk of it) in pio.
484 drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
485 drive->retry_pio++;
486 ide_dma_off_quietly(drive);
489 * un-busy drive etc and make sure request is sane
491 rq = hwif->rq;
492 if (rq) {
493 hwif->rq = NULL;
494 rq->errors = 0;
496 return ret;
499 void ide_release_dma_engine(ide_hwif_t *hwif)
501 if (hwif->dmatable_cpu) {
502 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
504 dma_free_coherent(hwif->dev, prd_size,
505 hwif->dmatable_cpu, hwif->dmatable_dma);
506 hwif->dmatable_cpu = NULL;
509 EXPORT_SYMBOL_GPL(ide_release_dma_engine);
511 int ide_allocate_dma_engine(ide_hwif_t *hwif)
513 int prd_size;
515 if (hwif->prd_max_nents == 0)
516 hwif->prd_max_nents = PRD_ENTRIES;
517 if (hwif->prd_ent_size == 0)
518 hwif->prd_ent_size = PRD_BYTES;
520 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
522 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
523 &hwif->dmatable_dma,
524 GFP_ATOMIC);
525 if (hwif->dmatable_cpu == NULL) {
526 printk(KERN_ERR "%s: unable to allocate PRD table\n",
527 hwif->name);
528 return -ENOMEM;
531 return 0;
533 EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
535 int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
537 const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops;
539 if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 ||
540 (dma_ops->dma_check && dma_ops->dma_check(drive, cmd)))
541 goto out;
542 ide_map_sg(drive, cmd);
543 if (ide_dma_map_sg(drive, cmd) == 0)
544 goto out_map;
545 if (dma_ops->dma_setup(drive, cmd))
546 goto out_dma_unmap;
547 drive->waiting_for_dma = 1;
548 return 0;
549 out_dma_unmap:
550 ide_dma_unmap_sg(drive, cmd);
551 out_map:
552 ide_map_sg(drive, cmd);
553 out:
554 return 1;