PSP-03.00.00.03
[linux-ginger.git] / arch / arm / mach-omap2 / usb-musb.c
blobf61d3230ba34b1efa64ea8e277fff1d4fbe0d3e5
1 /*
2 * linux/arch/arm/mach-omap2/usb-musb.c
4 * This file will contain the board specific details for the
5 * MENTOR USB OTG controller on OMAP3430
7 * Copyright (C) 2007-2008 Texas Instruments
8 * Copyright (C) 2008 Nokia Corporation
9 * Author: Vikram Pandita
11 * Generalization by:
12 * Felipe Balbi <felipe.balbi@nokia.com>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include <linux/types.h>
20 #include <linux/errno.h>
21 #include <linux/delay.h>
22 #include <linux/platform_device.h>
23 #include <linux/clk.h>
24 #include <linux/dma-mapping.h>
25 #include <linux/io.h>
27 #include <linux/usb/musb.h>
29 #include <asm/sizes.h>
31 #include <mach/hardware.h>
32 #include <mach/irqs.h>
33 #include <plat/mux.h>
34 #include <plat/usb.h>
35 #include <plat/am3517.h>
37 #define OTG_SYSCONFIG 0x404
38 #define OTG_SYSC_SOFTRESET BIT(1)
39 #define OTG_SYSSTATUS 0x408
40 #define OTG_SYSS_RESETDONE BIT(0)
42 static struct platform_device dummy_pdev = {
43 .dev = {
44 .bus = &platform_bus_type,
48 static void __init usb_musb_pm_init(void)
50 void __iomem *otg_base;
51 struct clk *otg_clk;
52 struct device *dev = &dummy_pdev.dev;
54 if (!cpu_is_omap34xx())
55 return;
57 otg_base = ioremap(OMAP34XX_HSUSB_OTG_BASE, SZ_4K);
58 if (WARN_ON(!otg_base))
59 return;
61 dev_set_name(dev, "musb_hdrc");
62 otg_clk = clk_get(dev, "ick");
64 if (otg_clk && clk_enable(otg_clk)) {
65 printk(KERN_WARNING
66 "%s: Unable to enable clocks for MUSB, "
67 "cannot reset.\n", __func__);
68 } else {
69 /* Reset OTG controller. After reset, it will be in
70 * force-idle, force-standby mode. */
71 __raw_writel(OTG_SYSC_SOFTRESET, otg_base + OTG_SYSCONFIG);
73 while (!(OTG_SYSS_RESETDONE &
74 __raw_readl(otg_base + OTG_SYSSTATUS)))
75 cpu_relax();
78 if (otg_clk) {
79 clk_disable(otg_clk);
80 clk_put(otg_clk);
83 iounmap(otg_base);
86 #ifdef CONFIG_USB_MUSB_SOC
88 static struct resource musb_resources[] = {
89 [0] = { /* start and end set dynamically */
90 .flags = IORESOURCE_MEM,
92 [1] = { /* general IRQ */
93 .start = INT_243X_HS_USB_MC,
94 .flags = IORESOURCE_IRQ,
96 [2] = { /* DMA IRQ */
97 .start = INT_243X_HS_USB_DMA,
98 .flags = IORESOURCE_IRQ,
102 static int clk_on;
104 static int musb_set_clock(struct clk *clk, int state)
106 if (state) {
107 if (clk_on > 0)
108 return -ENODEV;
110 clk_enable(clk);
111 clk_on = 1;
112 } else {
113 if (clk_on == 0)
114 return -ENODEV;
116 clk_disable(clk);
117 clk_on = 0;
120 return 0;
123 static struct musb_hdrc_eps_bits musb_eps[] = {
124 { "ep1_tx", 10, },
125 { "ep1_rx", 10, },
126 { "ep2_tx", 9, },
127 { "ep2_rx", 9, },
128 { "ep3_tx", 3, },
129 { "ep3_rx", 3, },
130 { "ep4_tx", 3, },
131 { "ep4_rx", 3, },
132 { "ep5_tx", 3, },
133 { "ep5_rx", 3, },
134 { "ep6_tx", 3, },
135 { "ep6_rx", 3, },
136 { "ep7_tx", 3, },
137 { "ep7_rx", 3, },
138 { "ep8_tx", 2, },
139 { "ep8_rx", 2, },
140 { "ep9_tx", 2, },
141 { "ep9_rx", 2, },
142 { "ep10_tx", 2, },
143 { "ep10_rx", 2, },
144 { "ep11_tx", 2, },
145 { "ep11_rx", 2, },
146 { "ep12_tx", 2, },
147 { "ep12_rx", 2, },
148 { "ep13_tx", 2, },
149 { "ep13_rx", 2, },
150 { "ep14_tx", 2, },
151 { "ep14_rx", 2, },
152 { "ep15_tx", 2, },
153 { "ep15_rx", 2, },
156 static struct musb_hdrc_config musb_config = {
157 .multipoint = 1,
158 .dyn_fifo = 1,
159 .soft_con = 1,
160 .dma = 1,
161 .num_eps = 16,
162 .dma_channels = 7,
163 .dma_req_chan = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3),
164 .ram_bits = 12,
165 .eps_bits = musb_eps,
168 static struct musb_hdrc_platform_data musb_plat = {
169 #ifdef CONFIG_USB_MUSB_OTG
170 .mode = MUSB_OTG,
171 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
172 .mode = MUSB_HOST,
173 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
174 .mode = MUSB_PERIPHERAL,
175 #endif
176 /* .clock is set dynamically */
177 .set_clock = musb_set_clock,
178 .config = &musb_config,
180 /* REVISIT charge pump on TWL4030 can supply up to
181 * 100 mA ... but this value is board-specific, like
182 * "mode", and should be passed to usb_musb_init().
184 .power = 50, /* up to 100 mA */
187 static u64 musb_dmamask = DMA_BIT_MASK(32);
189 static struct platform_device musb_device = {
190 .name = "musb_hdrc",
191 .id = -1,
192 .dev = {
193 .dma_mask = &musb_dmamask,
194 .coherent_dma_mask = DMA_BIT_MASK(32),
195 .platform_data = &musb_plat,
197 .num_resources = ARRAY_SIZE(musb_resources),
198 .resource = musb_resources,
201 void __init usb_musb_init(void)
203 if (cpu_is_omap243x()) {
204 musb_resources[0].start = OMAP243X_HS_BASE;
205 musb_resources[0].end = musb_resources[0].start + SZ_8K - 1;
206 } else if (cpu_is_omap3517()) {
207 musb_resources[0].start = AM3517_IPSS_USBOTGSS_BASE;
208 musb_plat.clock = "usbotg_ck";
209 musb_resources[1].start = INT_3517_USBOTG_IRQ;
210 /* set mux config for DRVVBUS */
211 omap_cfg_reg(E25_3517_USB0_DRVVBUS);
212 /* AM3517 can provide max of 500mA */
213 musb_plat.power = 250;
214 /* AM3517 has to map for CPPI4.1 registers also */
215 musb_resources[0].end = musb_resources[0].start
216 + (2 * SZ_16K) - 1;
217 /* AM3517 MUSB has 32K FIFO */
218 musb_config.ram_bits = 13; /* 2^(13+2) = 32K */
219 } else {
220 musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
221 musb_resources[0].end = musb_resources[0].start + SZ_8K - 1;
222 /* OMAP3EVM Rev >= E can source 500mA */
223 if (get_omap3_evm_rev() >= OMAP3EVM_BOARD_GEN_2)
224 musb_plat.power = 250;
228 * REVISIT: This line can be removed once all the platforms using
229 * musb_core.c have been converted to use use clkdev.
231 if (!cpu_is_omap3517())
232 musb_plat.clock = "ick";
234 if (platform_device_register(&musb_device) < 0) {
235 printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
236 return;
239 if (!cpu_is_omap3517())
240 usb_musb_pm_init();
243 #else
244 void __init usb_musb_init(void)
246 usb_musb_pm_init();
248 #endif /* CONFIG_USB_MUSB_SOC */