arch/arm/plat-omap/include/plat/omap-pm.h

   1 /*
   2  * omap-pm.h - OMAP power management interface
   3  *
   4  * Copyright (C) 2008-2009 Texas Instruments, Inc.
   5  * Copyright (C) 2008-2009 Nokia Corporation
   6  * Paul Walmsley
   7  *
   8  * Interface developed by (in alphabetical order): Karthik Dasu, Jouni
   9  * Högander, Tony Lindgren, Rajendra Nayak, Sakari Poussa,
  10  * Veeramanikandan Raju, Anand Sawant, Igor Stoppa, Paul Walmsley,
  11  * Richard Woodruff
  12  */
  13
  14 #ifndef ASM_ARM_ARCH_OMAP_OMAP_PM_H
  15 #define ASM_ARM_ARCH_OMAP_OMAP_PM_H
  16
  17 #include <linux/device.h>
  18 #include <linux/cpufreq.h>
  19
  20 #include "powerdomain.h"
  21
  22 /**
  23  * struct omap_opp - clock frequency-to-OPP ID table for DSP, MPU
  24  * @rate: target clock rate
  25  * @opp_id: OPP ID
  26  * @min_vdd: minimum VDD1 voltage (in millivolts) for this OPP
  27  *
  28  * Operating performance point data.  Can vary by OMAP chip and board.
  29  */
  30 struct omap_opp {
  31         unsigned long rate;
  32         u8 opp_id;
  33         u16 vsel;
  34 };
  35
  36 extern struct omap_opp *mpu_opps;
  37 extern struct omap_opp *dsp_opps;
  38 extern struct omap_opp *l3_opps;
  39
  40 /*
  41  * agent_id values for use with omap_pm_set_min_bus_tput():
  42  *
  43  * OCP_INITIATOR_AGENT is only valid for devices that can act as
  44  * initiators -- it represents the device's L3 interconnect
  45  * connection.  OCP_TARGET_AGENT represents the device's L4
  46  * interconnect connection.
  47  */
  48 #define OCP_TARGET_AGENT                1
  49 #define OCP_INITIATOR_AGENT             2
  50
  51 /**
  52  * omap_pm_if_early_init - OMAP PM init code called before clock fw init
  53  * @mpu_opp_table: array ptr to struct omap_opp for MPU
  54  * @dsp_opp_table: array ptr to struct omap_opp for DSP
  55  * @l3_opp_table : array ptr to struct omap_opp for CORE
  56  *
  57  * Initialize anything that must be configured before the clock
  58  * framework starts.  The "_if_" is to avoid name collisions with the
  59  * PM idle-loop code.
  60  */
  61 #ifdef CONFIG_OMAP_PM_NONE
  62 #define omap_pm_if_early_init(a, b, c) 0
  63 #else
  64 int __init omap_pm_if_early_init(struct omap_opp *mpu_opp_table,
  65                                  struct omap_opp *dsp_opp_table,
  66                                  struct omap_opp *l3_opp_table);
  67 #endif
  68
  69 /**
  70  * omap_pm_if_init - OMAP PM init code called after clock fw init
  71  *
  72  * The main initialization code.  OPP tables are passed in here.  The
  73  * "_if_" is to avoid name collisions with the PM idle-loop code.
  74  */
  75 #ifdef CONFIG_OMAP_PM_NONE
  76 #define omap_pm_if_init() 0
  77 #else
  78 int __init omap_pm_if_init(void);
  79 #endif
  80
  81 /**
  82  * omap_pm_if_exit - OMAP PM exit code
  83  *
  84  * Exit code; currently unused.  The "_if_" is to avoid name
  85  * collisions with the PM idle-loop code.
  86  */
  87 void omap_pm_if_exit(void);
  88
  89 /*
  90  * Device-driver-originated constraints (via board-*.c files, platform_data)
  91  */
  92
  93
  94 /**
  95  * omap_pm_set_max_mpu_wakeup_lat - set the maximum MPU wakeup latency
  96  * @dev: struct device * requesting the constraint
  97  * @t: maximum MPU wakeup latency in microseconds
  98  *
  99  * Request that the maximum interrupt latency for the MPU to be no
 100  * greater than 't' microseconds. "Interrupt latency" in this case is
 101  * defined as the elapsed time from the occurrence of a hardware or
 102  * timer interrupt to the time when the device driver's interrupt
 103  * service routine has been entered by the MPU.
 104  *
 105  * It is intended that underlying PM code will use this information to
 106  * determine what power state to put the MPU powerdomain into, and
 107  * possibly the CORE powerdomain as well, since interrupt handling
 108  * code currently runs from SDRAM.  Advanced PM or board*.c code may
 109  * also configure interrupt controller priorities, OCP bus priorities,
 110  * CPU speed(s), etc.
 111  *
 112  * This function will not affect device wakeup latency, e.g., time
 113  * elapsed from when a device driver enables a hardware device with
 114  * clk_enable(), to when the device is ready for register access or
 115  * other use.  To control this device wakeup latency, use
 116  * set_max_dev_wakeup_lat()
 117  *
 118  * Multiple calls to set_max_mpu_wakeup_lat() will replace the
 119  * previous t value.  To remove the latency target for the MPU, call
 120  * with t = -1.
 121  *
 122  * No return value.
 123  */
 124 void omap_pm_set_max_mpu_wakeup_lat(struct device *dev, long t);
 125
 126
 127 /**
 128  * omap_pm_set_min_bus_tput - set minimum bus throughput needed by device
 129  * @dev: struct device * requesting the constraint
 130  * @tbus_id: interconnect to operate on (OCP_{INITIATOR,TARGET}_AGENT)
 131  * @r: minimum throughput (in KiB/s)
 132  *
 133  * Request that the minimum data throughput on the OCP interconnect
 134  * attached to device 'dev' interconnect agent 'tbus_id' be no less
 135  * than 'r' KiB/s.
 136  *
 137  * It is expected that the OMAP PM or bus code will use this
 138  * information to set the interconnect clock to run at the lowest
 139  * possible speed that satisfies all current system users.  The PM or
 140  * bus code will adjust the estimate based on its model of the bus, so
 141  * device driver authors should attempt to specify an accurate
 142  * quantity for their device use case, and let the PM or bus code
 143  * overestimate the numbers as necessary to handle request/response
 144  * latency, other competing users on the system, etc.  On OMAP2/3, if
 145  * a driver requests a minimum L4 interconnect speed constraint, the
 146  * code will also need to add an minimum L3 interconnect speed
 147  * constraint,
 148  *
 149  * Multiple calls to set_min_bus_tput() will replace the previous rate
 150  * value for this device.  To remove the interconnect throughput
 151  * restriction for this device, call with r = 0.
 152  *
 153  * No return value.
 154  */
 155 void omap_pm_set_min_bus_tput(struct device *dev, u8 agent_id, unsigned long r);
 156
 157
 158 /**
 159  * omap_pm_set_max_dev_wakeup_lat - set the maximum device enable latency
 160  * @dev: struct device *
 161  * @t: maximum device wakeup latency in microseconds
 162  *
 163  * Request that the maximum amount of time necessary for a device to
 164  * become accessible after its clocks are enabled should be no greater
 165  * than 't' microseconds.  Specifically, this represents the time from
 166  * when a device driver enables device clocks with clk_enable(), to
 167  * when the register reads and writes on the device will succeed.
 168  * This function should be called before clk_disable() is called,
 169  * since the power state transition decision may be made during
 170  * clk_disable().
 171  *
 172  * It is intended that underlying PM code will use this information to
 173  * determine what power state to put the powerdomain enclosing this
 174  * device into.
 175  *
 176  * Multiple calls to set_max_dev_wakeup_lat() will replace the
 177  * previous wakeup latency values for this device.  To remove the wakeup
 178  * latency restriction for this device, call with t = -1.
 179  *
 180  * No return value.
 181  */
 182 void omap_pm_set_max_dev_wakeup_lat(struct device *dev, long t);
 183
 184
 185 /**
 186  * omap_pm_set_max_sdma_lat - set the maximum system DMA transfer start latency
 187  * @dev: struct device *
 188  * @t: maximum DMA transfer start latency in microseconds
 189  *
 190  * Request that the maximum system DMA transfer start latency for this
 191  * device 'dev' should be no greater than 't' microseconds.  "DMA
 192  * transfer start latency" here is defined as the elapsed time from
 193  * when a device (e.g., McBSP) requests that a system DMA transfer
 194  * start or continue, to the time at which data starts to flow into
 195  * that device from the system DMA controller.
 196  *
 197  * It is intended that underlying PM code will use this information to
 198  * determine what power state to put the CORE powerdomain into.
 199  *
 200  * Since system DMA transfers may not involve the MPU, this function
 201  * will not affect MPU wakeup latency.  Use set_max_cpu_lat() to do
 202  * so.  Similarly, this function will not affect device wakeup latency
 203  * -- use set_max_dev_wakeup_lat() to affect that.
 204  *
 205  * Multiple calls to set_max_sdma_lat() will replace the previous t
 206  * value for this device.  To remove the maximum DMA latency for this
 207  * device, call with t = -1.
 208  *
 209  * No return value.
 210  */
 211 void omap_pm_set_max_sdma_lat(struct device *dev, long t);
 212
 213
 214 /*
 215  * DSP Bridge-specific constraints
 216  */
 217
 218 /**
 219  * omap_pm_dsp_get_opp_table - get OPP->DSP clock frequency table
 220  *
 221  * Intended for use by DSPBridge.  Returns an array of OPP->DSP clock
 222  * frequency entries.  The final item in the array should have .rate =
 223  * .opp_id = 0.
 224  */
 225 const struct omap_opp *omap_pm_dsp_get_opp_table(void);
 226
 227 /**
 228  * omap_pm_dsp_set_min_opp - receive desired OPP target ID from DSP Bridge
 229  * @opp_id: target DSP OPP ID
 230  *
 231  * Set a minimum OPP ID for the DSP.  This is intended to be called
 232  * only from the DSP Bridge MPU-side driver.  Unfortunately, the only
 233  * information that code receives from the DSP/BIOS load estimator is the
 234  * target OPP ID; hence, this interface.  No return value.
 235  */
 236 void omap_pm_dsp_set_min_opp(u8 opp_id);
 237
 238 /**
 239  * omap_pm_dsp_get_opp - report the current DSP OPP ID
 240  *
 241  * Report the current OPP for the DSP.  Since on OMAP3, the DSP and
 242  * MPU share a single voltage domain, the OPP ID returned back may
 243  * represent a higher DSP speed than the OPP requested via
 244  * omap_pm_dsp_set_min_opp().
 245  *
 246  * Returns the current VDD1 OPP ID, or 0 upon error.
 247  */
 248 u8 omap_pm_dsp_get_opp(void);
 249
 250 /**
 251  * omap_pm_vdd1_get_opp - report the current VDD1 OPP
 252  *
 253  * Report the current VDD1 OPP number.
 254  *
 255  * Returns the current VDD1 OPP ID, or 0 upon error.
 256  */
 257 u8 omap_pm_vdd1_get_opp(void);
 258
 259 /**
 260  * omap_pm_vdd2_get_opp - report the current VDD2 OPP
 261  *
 262  * Report the current VDD2 OPP number.
 263  *
 264  * Returns the current VDD2 OPP ID, or 0 upon error.
 265  */
 266 u8 omap_pm_vdd2_get_opp(void);
 267
 268 /*
 269  * CPUFreq-originated constraint
 270  *
 271  * In the future, this should be handled by custom OPP clocktype
 272  * functions.
 273  */
 274
 275 /**
 276  * omap_pm_cpu_get_freq_table - return a cpufreq_frequency_table array ptr
 277  *
 278  * Provide a frequency table usable by CPUFreq for the current chip/board.
 279  * Returns a pointer to a struct cpufreq_frequency_table array or NULL
 280  * upon error.
 281  */
 282 struct cpufreq_frequency_table **omap_pm_cpu_get_freq_table(void);
 283
 284 /**
 285  * omap_pm_cpu_set_freq - set the current minimum MPU frequency
 286  * @f: MPU frequency in Hz
 287  *
 288  * Set the current minimum CPU frequency.  The actual CPU frequency
 289  * used could end up higher if the DSP requested a higher OPP.
 290  * Intended to be called by plat-omap/cpu_omap.c:omap_target().  No
 291  * return value.
 292  */
 293 void omap_pm_cpu_set_freq(unsigned long f);
 294
 295 /**
 296  * omap_pm_cpu_get_freq - report the current CPU frequency
 297  *
 298  * Returns the current MPU frequency, or 0 upon error.
 299  */
 300 unsigned long omap_pm_cpu_get_freq(void);
 301
 302
 303 /*
 304  * Device context loss tracking
 305  */
 306
 307 /**
 308  * omap_pm_get_dev_context_loss_count - return count of times dev has lost ctx
 309  * @dev: struct device *
 310  *
 311  * This function returns the number of times that the device @dev has
 312  * lost its internal context.  This generally occurs on a powerdomain
 313  * transition to OFF.  Drivers use this as an optimization to avoid restoring
 314  * context if the device hasn't lost it.  To use, drivers should initially
 315  * call this in their context save functions and store the result.  Early in
 316  * the driver's context restore function, the driver should call this function
 317  * again, and compare the result to the stored counter.  If they differ, the
 318  * driver must restore device context.   If the number of context losses
 319  * exceeds the maximum positive integer, the function will wrap to 0 and
 320  * continue counting.  Returns the number of context losses for this device,
 321  * or -EINVAL upon error.
 322  */
 323 int omap_pm_get_dev_context_loss_count(struct device *dev);
 324
 325
 326 #endif