arch/arm/plat-omap/include/plat/omap7xx.h

   1 /* arch/arm/plat-omap/include/mach/omap7xx.h
   2  *
   3  * Hardware definitions for TI OMAP7XX processor.
   4  *
   5  * Cleanup for Linux-2.6 by Dirk Behme <dirk.behme@de.bosch.com>
   6  * Adapted for omap850 by Zebediah C. McClure <zmc@lurian.net>
   7  * Adapted for omap7xx by Alistair Buxton <a.j.buxton@gmail.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify it
  10  * under the terms of the GNU General Public License as published by the
  11  * Free Software Foundation; either version 2 of the License, or (at your
  12  * option) any later version.
  13  *
  14  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  15  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  16  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  17  * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  19  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  20  * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  21  * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  22  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  23  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  24  *
  25  * You should have received a copy of the  GNU General Public License along
  26  * with this program; if not, write  to the Free Software Foundation, Inc.,
  27  * 675 Mass Ave, Cambridge, MA 02139, USA.
  28  */
  29
  30 #ifndef __ASM_ARCH_OMAP7XX_H
  31 #define __ASM_ARCH_OMAP7XX_H
  32
  33 /*
  34  * ----------------------------------------------------------------------------
  35  * Base addresses
  36  * ----------------------------------------------------------------------------
  37  */
  38
  39 /* Syntax: XX_BASE = Virtual base address, XX_START = Physical base address */
  40
  41 #define OMAP7XX_DSP_BASE        0xE0000000
  42 #define OMAP7XX_DSP_SIZE        0x50000
  43 #define OMAP7XX_DSP_START       0xE0000000
  44
  45 #define OMAP7XX_DSPREG_BASE     0xE1000000
  46 #define OMAP7XX_DSPREG_SIZE     SZ_128K
  47 #define OMAP7XX_DSPREG_START    0xE1000000
  48
  49 /*
  50  * ----------------------------------------------------------------------------
  51  * OMAP7XX specific configuration registers
  52  * ----------------------------------------------------------------------------
  53  */
  54 #define OMAP7XX_CONFIG_BASE     0xfffe1000
  55 #define OMAP7XX_IO_CONF_0       0xfffe1070
  56 #define OMAP7XX_IO_CONF_1       0xfffe1074
  57 #define OMAP7XX_IO_CONF_2       0xfffe1078
  58 #define OMAP7XX_IO_CONF_3       0xfffe107c
  59 #define OMAP7XX_IO_CONF_4       0xfffe1080
  60 #define OMAP7XX_IO_CONF_5       0xfffe1084
  61 #define OMAP7XX_IO_CONF_6       0xfffe1088
  62 #define OMAP7XX_IO_CONF_7       0xfffe108c
  63 #define OMAP7XX_IO_CONF_8       0xfffe1090
  64 #define OMAP7XX_IO_CONF_9       0xfffe1094
  65 #define OMAP7XX_IO_CONF_10      0xfffe1098
  66 #define OMAP7XX_IO_CONF_11      0xfffe109c
  67 #define OMAP7XX_IO_CONF_12      0xfffe10a0
  68 #define OMAP7XX_IO_CONF_13      0xfffe10a4
  69
  70 #define OMAP7XX_MODE_1          0xfffe1010
  71 #define OMAP7XX_MODE_2          0xfffe1014
  72
  73 /* CSMI specials: in terms of base + offset */
  74 #define OMAP7XX_MODE2_OFFSET    0x14
  75
  76 /*
  77  * ----------------------------------------------------------------------------
  78  * OMAP7XX traffic controller configuration registers
  79  * ----------------------------------------------------------------------------
  80  */
  81 #define OMAP7XX_FLASH_CFG_0     0xfffecc10
  82 #define OMAP7XX_FLASH_ACFG_0    0xfffecc50
  83 #define OMAP7XX_FLASH_CFG_1     0xfffecc14
  84 #define OMAP7XX_FLASH_ACFG_1    0xfffecc54
  85
  86 /*
  87  * ----------------------------------------------------------------------------
  88  * OMAP7XX DSP control registers
  89  * ----------------------------------------------------------------------------
  90  */
  91 #define OMAP7XX_ICR_BASE        0xfffbb800
  92 #define OMAP7XX_DSP_M_CTL       0xfffbb804
  93 #define OMAP7XX_DSP_MMU_BASE    0xfffed200
  94
  95 /*
  96  * ----------------------------------------------------------------------------
  97  * OMAP7XX PCC_UPLD configuration registers
  98  * ----------------------------------------------------------------------------
  99  */
 100 #define OMAP7XX_PCC_UPLD_CTRL_BASE      (0xfffe0900)
 101 #define OMAP7XX_PCC_UPLD_CTRL           (OMAP7XX_PCC_UPLD_CTRL_BASE + 0x00)
 102
 103 #endif /*  __ASM_ARCH_OMAP7XX_H */
 104