arch/arm/mach-pxa/include/mach/irqs.h

   1 /*
   2  *  arch/arm/mach-pxa/include/mach/irqs.h
   3  *
   4  *  Author:     Nicolas Pitre
   5  *  Created:    Jun 15, 2001
   6  *  Copyright:  MontaVista Software Inc.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  */
  12 #ifndef __ASM_MACH_IRQS_H
  13 #define __ASM_MACH_IRQS_H
  14
  15 #ifdef CONFIG_PXA_HAVE_ISA_IRQS
  16 #define PXA_ISA_IRQ(x)  (x)
  17 #define PXA_ISA_IRQ_NUM (16)
  18 #else
  19 #define PXA_ISA_IRQ_NUM (0)
  20 #endif
  21
  22 #define PXA_IRQ(x)      (PXA_ISA_IRQ_NUM + (x))
  23
  24 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  25 #define IRQ_SSP3        PXA_IRQ(0)      /* SSP3 service request */
  26 #define IRQ_MSL         PXA_IRQ(1)      /* MSL Interface interrupt */
  27 #define IRQ_USBH2       PXA_IRQ(2)      /* USB Host interrupt 1 (OHCI) */
  28 #define IRQ_USBH1       PXA_IRQ(3)      /* USB Host interrupt 2 (non-OHCI) */
  29 #define IRQ_KEYPAD      PXA_IRQ(4)      /* Key pad controller */
  30 #define IRQ_MEMSTK      PXA_IRQ(5)      /* Memory Stick interrupt */
  31 #define IRQ_PWRI2C      PXA_IRQ(6)      /* Power I2C interrupt */
  32 #endif
  33
  34 #define IRQ_HWUART      PXA_IRQ(7)      /* HWUART Transmit/Receive/Error (PXA26x) */
  35 #define IRQ_OST_4_11    PXA_IRQ(7)      /* OS timer 4-11 matches (PXA27x) */
  36 #define IRQ_GPIO0       PXA_IRQ(8)      /* GPIO0 Edge Detect */
  37 #define IRQ_GPIO1       PXA_IRQ(9)      /* GPIO1 Edge Detect */
  38 #define IRQ_GPIO_2_x    PXA_IRQ(10)     /* GPIO[2-x] Edge Detect */
  39 #define IRQ_USB         PXA_IRQ(11)     /* USB Service */
  40 #define IRQ_PMU         PXA_IRQ(12)     /* Performance Monitoring Unit */
  41 #define IRQ_I2S         PXA_IRQ(13)     /* I2S Interrupt */
  42 #define IRQ_AC97        PXA_IRQ(14)     /* AC97 Interrupt */
  43 #define IRQ_ASSP        PXA_IRQ(15)     /* Audio SSP Service Request (PXA25x) */
  44 #define IRQ_USIM        PXA_IRQ(15)     /* Smart Card interface interrupt (PXA27x) */
  45 #define IRQ_NSSP        PXA_IRQ(16)     /* Network SSP Service Request (PXA25x) */
  46 #define IRQ_SSP2        PXA_IRQ(16)     /* SSP2 interrupt (PXA27x) */
  47 #define IRQ_LCD         PXA_IRQ(17)     /* LCD Controller Service Request */
  48 #define IRQ_I2C         PXA_IRQ(18)     /* I2C Service Request */
  49 #define IRQ_ICP         PXA_IRQ(19)     /* ICP Transmit/Receive/Error */
  50 #define IRQ_STUART      PXA_IRQ(20)     /* STUART Transmit/Receive/Error */
  51 #define IRQ_BTUART      PXA_IRQ(21)     /* BTUART Transmit/Receive/Error */
  52 #define IRQ_FFUART      PXA_IRQ(22)     /* FFUART Transmit/Receive/Error*/
  53 #define IRQ_MMC         PXA_IRQ(23)     /* MMC Status/Error Detection */
  54 #define IRQ_SSP         PXA_IRQ(24)     /* SSP Service Request */
  55 #define IRQ_DMA         PXA_IRQ(25)     /* DMA Channel Service Request */
  56 #define IRQ_OST0        PXA_IRQ(26)     /* OS Timer match 0 */
  57 #define IRQ_OST1        PXA_IRQ(27)     /* OS Timer match 1 */
  58 #define IRQ_OST2        PXA_IRQ(28)     /* OS Timer match 2 */
  59 #define IRQ_OST3        PXA_IRQ(29)     /* OS Timer match 3 */
  60 #define IRQ_RTC1Hz      PXA_IRQ(30)     /* RTC HZ Clock Tick */
  61 #define IRQ_RTCAlrm     PXA_IRQ(31)     /* RTC Alarm */
  62
  63 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
  64 #define IRQ_TPM         PXA_IRQ(32)     /* TPM interrupt */
  65 #define IRQ_CAMERA      PXA_IRQ(33)     /* Camera Interface */
  66 #endif
  67
  68 #ifdef CONFIG_PXA3xx
  69 #define IRQ_SSP4        PXA_IRQ(13)     /* SSP4 service request */
  70 #define IRQ_CIR         PXA_IRQ(34)     /* Consumer IR */
  71 #define IRQ_COMM_WDT    PXA_IRQ(35)     /* Comm WDT interrupt */
  72 #define IRQ_TSI         PXA_IRQ(36)     /* Touch Screen Interface (PXA320) */
  73 #define IRQ_USIM2       PXA_IRQ(38)     /* USIM2 Controller */
  74 #define IRQ_GCU         PXA_IRQ(39)     /* Graphics Controller */
  75 #define IRQ_MMC2        PXA_IRQ(41)     /* MMC2 Controller */
  76 #define IRQ_1WIRE       PXA_IRQ(44)     /* 1-Wire Controller */
  77 #define IRQ_NAND        PXA_IRQ(45)     /* NAND Controller */
  78 #define IRQ_USB2        PXA_IRQ(46)     /* USB 2.0 Device Controller */
  79 #define IRQ_WAKEUP0     PXA_IRQ(49)     /* EXT_WAKEUP0 */
  80 #define IRQ_WAKEUP1     PXA_IRQ(50)     /* EXT_WAKEUP1 */
  81 #define IRQ_DMEMC       PXA_IRQ(51)     /* Dynamic Memory Controller */
  82 #define IRQ_MMC3        PXA_IRQ(55)     /* MMC3 Controller (PXA310) */
  83 #endif
  84
  85 #ifdef CONFIG_CPU_PXA935
  86 #define IRQ_U2O         PXA_IRQ(64)     /* USB OTG 2.0 Controller (PXA935) */
  87 #define IRQ_U2H         PXA_IRQ(65)     /* USB Host 2.0 Controller (PXA935) */
  88
  89 #define IRQ_MMC3_PXA935 PXA_IRQ(72)     /* MMC3 Controller (PXA935) */
  90 #define IRQ_MMC4_PXA935 PXA_IRQ(73)     /* MMC4 Controller (PXA935) */
  91 #define IRQ_MMC5_PXA935 PXA_IRQ(74)     /* MMC5 Controller (PXA935) */
  92
  93 #define IRQ_U2P         PXA_IRQ(93)     /* USB PHY D+/D- Lines (PXA935) */
  94 #endif
  95
  96 #ifdef CONFIG_CPU_PXA930
  97 #define IRQ_ENHROT      PXA_IRQ(37)     /* Enhanced Rotary (PXA930) */
  98 #define IRQ_ACIPC0      PXA_IRQ(5)
  99 #define IRQ_ACIPC1      PXA_IRQ(40)
 100 #define IRQ_ACIPC2      PXA_IRQ(19)
 101 #define IRQ_TRKBALL     PXA_IRQ(43)     /* Track Ball */
 102 #endif
 103
 104 #ifdef CONFIG_CPU_PXA950
 105 #define IRQ_GC500       PXA_IRQ(70)     /* Graphics Controller (PXA950) */
 106 #endif
 107
 108 #define PXA_GPIO_IRQ_BASE       PXA_IRQ(96)
 109 #define PXA_GPIO_IRQ_NUM        (192)
 110
 111 #define GPIO_2_x_TO_IRQ(x)      (PXA_GPIO_IRQ_BASE + (x))
 112 #define IRQ_GPIO(x)     (((x) < 2) ? (IRQ_GPIO0 + (x)) : GPIO_2_x_TO_IRQ(x))
 113
 114 #define IRQ_TO_GPIO_2_x(i)      ((i) - PXA_GPIO_IRQ_BASE)
 115 #define IRQ_TO_GPIO(i)  (((i) < IRQ_GPIO(2)) ? ((i) - IRQ_GPIO0) : IRQ_TO_GPIO_2_x(i))
 116
 117 /*
 118  * The following interrupts are for board specific purposes. Since
 119  * the kernel can only run on one machine at a time, we can re-use
 120  * these.  There will be 16 IRQs by default.  If it is not enough,
 121  * IRQ_BOARD_END is allowed be customized for each board, but keep
 122  * the numbers within sensible limits and in descending order, so
 123  * when multiple config options are selected, the maximum will be
 124  * used.
 125  */
 126 #define IRQ_BOARD_START         (PXA_GPIO_IRQ_BASE + PXA_GPIO_IRQ_NUM)
 127
 128 #if defined(CONFIG_MACH_H4700)
 129 #define IRQ_BOARD_END           (IRQ_BOARD_START + 70)
 130 #elif defined(CONFIG_MACH_ZYLONITE)
 131 #define IRQ_BOARD_END           (IRQ_BOARD_START + 32)
 132 #elif defined(CONFIG_PXA_EZX)
 133 #define IRQ_BOARD_END           (IRQ_BOARD_START + 23)
 134 #else
 135 #define IRQ_BOARD_END           (IRQ_BOARD_START + 16)
 136 #endif
 137
 138 #define IRQ_SA1111_START        (IRQ_BOARD_END)
 139 #define IRQ_GPAIN0              (IRQ_BOARD_END + 0)
 140 #define IRQ_GPAIN1              (IRQ_BOARD_END + 1)
 141 #define IRQ_GPAIN2              (IRQ_BOARD_END + 2)
 142 #define IRQ_GPAIN3              (IRQ_BOARD_END + 3)
 143 #define IRQ_GPBIN0              (IRQ_BOARD_END + 4)
 144 #define IRQ_GPBIN1              (IRQ_BOARD_END + 5)
 145 #define IRQ_GPBIN2              (IRQ_BOARD_END + 6)
 146 #define IRQ_GPBIN3              (IRQ_BOARD_END + 7)
 147 #define IRQ_GPBIN4              (IRQ_BOARD_END + 8)
 148 #define IRQ_GPBIN5              (IRQ_BOARD_END + 9)
 149 #define IRQ_GPCIN0              (IRQ_BOARD_END + 10)
 150 #define IRQ_GPCIN1              (IRQ_BOARD_END + 11)
 151 #define IRQ_GPCIN2              (IRQ_BOARD_END + 12)
 152 #define IRQ_GPCIN3              (IRQ_BOARD_END + 13)
 153 #define IRQ_GPCIN4              (IRQ_BOARD_END + 14)
 154 #define IRQ_GPCIN5              (IRQ_BOARD_END + 15)
 155 #define IRQ_GPCIN6              (IRQ_BOARD_END + 16)
 156 #define IRQ_GPCIN7              (IRQ_BOARD_END + 17)
 157 #define IRQ_MSTXINT             (IRQ_BOARD_END + 18)
 158 #define IRQ_MSRXINT             (IRQ_BOARD_END + 19)
 159 #define IRQ_MSSTOPERRINT        (IRQ_BOARD_END + 20)
 160 #define IRQ_TPTXINT             (IRQ_BOARD_END + 21)
 161 #define IRQ_TPRXINT             (IRQ_BOARD_END + 22)
 162 #define IRQ_TPSTOPERRINT        (IRQ_BOARD_END + 23)
 163 #define SSPXMTINT               (IRQ_BOARD_END + 24)
 164 #define SSPRCVINT               (IRQ_BOARD_END + 25)
 165 #define SSPROR                  (IRQ_BOARD_END + 26)
 166 #define AUDXMTDMADONEA          (IRQ_BOARD_END + 32)
 167 #define AUDRCVDMADONEA          (IRQ_BOARD_END + 33)
 168 #define AUDXMTDMADONEB          (IRQ_BOARD_END + 34)
 169 #define AUDRCVDMADONEB          (IRQ_BOARD_END + 35)
 170 #define AUDTFSR                 (IRQ_BOARD_END + 36)
 171 #define AUDRFSR                 (IRQ_BOARD_END + 37)
 172 #define AUDTUR                  (IRQ_BOARD_END + 38)
 173 #define AUDROR                  (IRQ_BOARD_END + 39)
 174 #define AUDDTS                  (IRQ_BOARD_END + 40)
 175 #define AUDRDD                  (IRQ_BOARD_END + 41)
 176 #define AUDSTO                  (IRQ_BOARD_END + 42)
 177 #define IRQ_USBPWR              (IRQ_BOARD_END + 43)
 178 #define IRQ_HCIM                (IRQ_BOARD_END + 44)
 179 #define IRQ_HCIBUFFACC          (IRQ_BOARD_END + 45)
 180 #define IRQ_HCIRMTWKP           (IRQ_BOARD_END + 46)
 181 #define IRQ_NHCIMFCIR           (IRQ_BOARD_END + 47)
 182 #define IRQ_USB_PORT_RESUME     (IRQ_BOARD_END + 48)
 183 #define IRQ_S0_READY_NINT       (IRQ_BOARD_END + 49)
 184 #define IRQ_S1_READY_NINT       (IRQ_BOARD_END + 50)
 185 #define IRQ_S0_CD_VALID         (IRQ_BOARD_END + 51)
 186 #define IRQ_S1_CD_VALID         (IRQ_BOARD_END + 52)
 187 #define IRQ_S0_BVD1_STSCHG      (IRQ_BOARD_END + 53)
 188 #define IRQ_S1_BVD1_STSCHG      (IRQ_BOARD_END + 54)
 189
 190 #define IRQ_LOCOMO_START        (IRQ_BOARD_END)
 191 #define IRQ_LOCOMO_KEY          (IRQ_BOARD_END + 0)
 192 #define IRQ_LOCOMO_GPIO0        (IRQ_BOARD_END + 1)
 193 #define IRQ_LOCOMO_GPIO1        (IRQ_BOARD_END + 2)
 194 #define IRQ_LOCOMO_GPIO2        (IRQ_BOARD_END + 3)
 195 #define IRQ_LOCOMO_GPIO3        (IRQ_BOARD_END + 4)
 196 #define IRQ_LOCOMO_GPIO4        (IRQ_BOARD_END + 5)
 197 #define IRQ_LOCOMO_GPIO5        (IRQ_BOARD_END + 6)
 198 #define IRQ_LOCOMO_GPIO6        (IRQ_BOARD_END + 7)
 199 #define IRQ_LOCOMO_GPIO7        (IRQ_BOARD_END + 8)
 200 #define IRQ_LOCOMO_GPIO8        (IRQ_BOARD_END + 9)
 201 #define IRQ_LOCOMO_GPIO9        (IRQ_BOARD_END + 10)
 202 #define IRQ_LOCOMO_GPIO10       (IRQ_BOARD_END + 11)
 203 #define IRQ_LOCOMO_GPIO11       (IRQ_BOARD_END + 12)
 204 #define IRQ_LOCOMO_GPIO12       (IRQ_BOARD_END + 13)
 205 #define IRQ_LOCOMO_GPIO13       (IRQ_BOARD_END + 14)
 206 #define IRQ_LOCOMO_GPIO14       (IRQ_BOARD_END + 15)
 207 #define IRQ_LOCOMO_GPIO15       (IRQ_BOARD_END + 16)
 208 #define IRQ_LOCOMO_LT           (IRQ_BOARD_END + 17)
 209 #define IRQ_LOCOMO_SPI_RFR      (IRQ_BOARD_END + 18)
 210 #define IRQ_LOCOMO_SPI_RFW      (IRQ_BOARD_END + 19)
 211 #define IRQ_LOCOMO_SPI_OVRN     (IRQ_BOARD_END + 20)
 212 #define IRQ_LOCOMO_SPI_TEND     (IRQ_BOARD_END + 21)
 213
 214 /*
 215  * Figure out the MAX IRQ number.
 216  *
 217  * If we have an SA1111, the max IRQ is S1_BVD1_STSCHG+1.
 218  * If we have an LoCoMo, the max IRQ is IRQ_LOCOMO_SPI_TEND+1
 219  * Otherwise, we have the standard IRQs only.
 220  */
 221 #ifdef CONFIG_SA1111
 222 #define NR_IRQS                 (IRQ_S1_BVD1_STSCHG + 1)
 223 #elif defined(CONFIG_SHARP_LOCOMO)
 224 #define NR_IRQS                 (IRQ_LOCOMO_SPI_TEND + 1)
 225 #elif defined(CONFIG_PXA_HAVE_BOARD_IRQS)
 226 #define NR_IRQS                 (IRQ_BOARD_END)
 227 #else
 228 #define NR_IRQS                 (IRQ_BOARD_START)
 229 #endif
 230
 231 /*
 232  * Board specific IRQs.  Define them here.
 233  * Do not surround them with ifdefs.
 234  */
 235 #define LUBBOCK_IRQ(x)          (IRQ_BOARD_START + (x))
 236 #define LUBBOCK_SD_IRQ          LUBBOCK_IRQ(0)
 237 #define LUBBOCK_SA1111_IRQ      LUBBOCK_IRQ(1)
 238 #define LUBBOCK_USB_IRQ         LUBBOCK_IRQ(2)  /* usb connect */
 239 #define LUBBOCK_ETH_IRQ         LUBBOCK_IRQ(3)
 240 #define LUBBOCK_UCB1400_IRQ     LUBBOCK_IRQ(4)
 241 #define LUBBOCK_BB_IRQ          LUBBOCK_IRQ(5)
 242 #define LUBBOCK_USB_DISC_IRQ    LUBBOCK_IRQ(6)  /* usb disconnect */
 243 #define LUBBOCK_LAST_IRQ        LUBBOCK_IRQ(6)
 244
 245 #define LPD270_IRQ(x)           (IRQ_BOARD_START + (x))
 246 #define LPD270_USBC_IRQ         LPD270_IRQ(2)
 247 #define LPD270_ETHERNET_IRQ     LPD270_IRQ(3)
 248 #define LPD270_AC97_IRQ         LPD270_IRQ(4)
 249
 250 #define MAINSTONE_IRQ(x)        (IRQ_BOARD_START + (x))
 251 #define MAINSTONE_MMC_IRQ       MAINSTONE_IRQ(0)
 252 #define MAINSTONE_USIM_IRQ      MAINSTONE_IRQ(1)
 253 #define MAINSTONE_USBC_IRQ      MAINSTONE_IRQ(2)
 254 #define MAINSTONE_ETHERNET_IRQ  MAINSTONE_IRQ(3)
 255 #define MAINSTONE_AC97_IRQ      MAINSTONE_IRQ(4)
 256 #define MAINSTONE_PEN_IRQ       MAINSTONE_IRQ(5)
 257 #define MAINSTONE_MSINS_IRQ     MAINSTONE_IRQ(6)
 258 #define MAINSTONE_EXBRD_IRQ     MAINSTONE_IRQ(7)
 259 #define MAINSTONE_S0_CD_IRQ     MAINSTONE_IRQ(9)
 260 #define MAINSTONE_S0_STSCHG_IRQ MAINSTONE_IRQ(10)
 261 #define MAINSTONE_S0_IRQ        MAINSTONE_IRQ(11)
 262 #define MAINSTONE_S1_CD_IRQ     MAINSTONE_IRQ(13)
 263 #define MAINSTONE_S1_STSCHG_IRQ MAINSTONE_IRQ(14)
 264 #define MAINSTONE_S1_IRQ        MAINSTONE_IRQ(15)
 265
 266 /* Balloon3 Interrupts */
 267 #define BALLOON3_IRQ(x)         (IRQ_BOARD_START + (x))
 268
 269 #define BALLOON3_BP_CF_NRDY_IRQ BALLOON3_IRQ(0)
 270 #define BALLOON3_BP_NSTSCHG_IRQ BALLOON3_IRQ(1)
 271
 272 #define BALLOON3_AUX_NIRQ       IRQ_GPIO(BALLOON3_GPIO_AUX_NIRQ)
 273 #define BALLOON3_CODEC_IRQ      IRQ_GPIO(BALLOON3_GPIO_CODEC_IRQ)
 274 #define BALLOON3_S0_CD_IRQ      IRQ_GPIO(BALLOON3_GPIO_S0_CD)
 275
 276 /* LoCoMo Interrupts (CONFIG_SHARP_LOCOMO) */
 277 #define IRQ_LOCOMO_KEY_BASE     (IRQ_BOARD_START + 0)
 278 #define IRQ_LOCOMO_GPIO_BASE    (IRQ_BOARD_START + 1)
 279 #define IRQ_LOCOMO_LT_BASE      (IRQ_BOARD_START + 2)
 280 #define IRQ_LOCOMO_SPI_BASE     (IRQ_BOARD_START + 3)
 281
 282 /* phyCORE-PXA270 (PCM027) Interrupts */
 283 #define PCM027_IRQ(x)          (IRQ_BOARD_START + (x))
 284 #define PCM027_BTDET_IRQ       PCM027_IRQ(0)
 285 #define PCM027_FF_RI_IRQ       PCM027_IRQ(1)
 286 #define PCM027_MMCDET_IRQ      PCM027_IRQ(2)
 287 #define PCM027_PM_5V_IRQ       PCM027_IRQ(3)
 288
 289 /* ITE8152 irqs */
 290 /* add IT8152 IRQs beyond BOARD_END */
 291 #ifdef CONFIG_PCI_HOST_ITE8152
 292 #define IT8152_IRQ(x)   (IRQ_BOARD_END + (x))
 293
 294 /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */
 295 #define IT8152_LD_IRQ_COUNT     9
 296 #define IT8152_LP_IRQ_COUNT     16
 297 #define IT8152_PD_IRQ_COUNT     15
 298
 299 /* Priorities: */
 300 #define IT8152_PD_IRQ(i)        IT8152_IRQ(i)
 301 #define IT8152_LP_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT)
 302 #define IT8152_LD_IRQ(i)        (IT8152_IRQ(i) + IT8152_PD_IRQ_COUNT + IT8152_LP_IRQ_COUNT)
 303
 304 #define IT8152_LAST_IRQ         IT8152_LD_IRQ(IT8152_LD_IRQ_COUNT - 1)
 305
 306 #if NR_IRQS < (IT8152_LAST_IRQ+1)
 307 #undef NR_IRQS
 308 #define NR_IRQS (IT8152_LAST_IRQ+1)
 309 #endif
 310
 311 #endif /* CONFIG_PCI_HOST_ITE8152 */
 312
 313 #endif /* __ASM_MACH_IRQS_H */