arch/arm/mach-stmp37xx/include/mach/irqs.h

   1 /*
   2  * Freescale STMP37XX interrupts
   3  *
   4  * Copyright (C) 2005 Sigmatel Inc
   5  *
   6  * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
   7  * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
   8  */
   9
  10 /*
  11  * The code contained herein is licensed under the GNU General Public
  12  * License. You may obtain a copy of the GNU General Public License
  13  * Version 2 or later at the following locations:
  14  *
  15  * http://www.opensource.org/licenses/gpl-license.html
  16  * http://www.gnu.org/copyleft/gpl.html
  17  */
  18 #ifndef _ASM_ARCH_IRQS_H
  19 #define _ASM_ARCH_IRQS_H
  20
  21 #define IRQ_DEBUG_UART           0
  22 #define IRQ_COMMS_RX               1
  23 #define IRQ_COMMS_TX               1
  24 #define IRQ_SSP2_ERROR           2
  25 #define IRQ_VDD5V                     3
  26 #define IRQ_HEADPHONE_SHORT         4
  27 #define IRQ_DAC_DMA                 5
  28 #define IRQ_DAC_ERROR             6
  29 #define IRQ_ADC_DMA                 7
  30 #define IRQ_ADC_ERROR             8
  31 #define IRQ_SPDIF_DMA             9
  32 #define IRQ_SAIF2_DMA             9
  33 #define IRQ_SPDIF_ERROR         10
  34 #define IRQ_SAIF1_IRQ             10
  35 #define IRQ_SAIF2_IRQ             10
  36 #define IRQ_USB_CTRL               11
  37 #define IRQ_USB_WAKEUP           12
  38 #define IRQ_GPMI_DMA               13
  39 #define IRQ_SSP1_DMA               14
  40 #define IRQ_SSP_ERROR             15
  41 #define IRQ_GPIO0                     16
  42 #define IRQ_GPIO1                     17
  43 #define IRQ_GPIO2                     18
  44 #define IRQ_SAIF1_DMA             19
  45 #define IRQ_SSP2_DMA               20
  46 #define IRQ_ECC8_IRQ               21
  47 #define IRQ_RTC_ALARM             22
  48 #define IRQ_UARTAPP_TX_DMA           23
  49 #define IRQ_UARTAPP_INTERNAL       24
  50 #define IRQ_UARTAPP_RX_DMA           25
  51 #define IRQ_I2C_DMA                 26
  52 #define IRQ_I2C_ERROR             27
  53 #define IRQ_TIMER0                   28
  54 #define IRQ_TIMER1                   29
  55 #define IRQ_TIMER2                   30
  56 #define IRQ_TIMER3                   31
  57 #define IRQ_BATT_BRNOUT         32
  58 #define IRQ_VDDD_BRNOUT         33
  59 #define IRQ_VDDIO_BRNOUT               34
  60 #define IRQ_VDD18_BRNOUT               35
  61 #define IRQ_TOUCH_DETECT               36
  62 #define IRQ_LRADC_CH0             37
  63 #define IRQ_LRADC_CH1             38
  64 #define IRQ_LRADC_CH2             39
  65 #define IRQ_LRADC_CH3             40
  66 #define IRQ_LRADC_CH4             41
  67 #define IRQ_LRADC_CH5             42
  68 #define IRQ_LRADC_CH6             43
  69 #define IRQ_LRADC_CH7             44
  70 #define IRQ_LCDIF_DMA             45
  71 #define IRQ_LCDIF_ERROR         46
  72 #define IRQ_DIGCTL_DEBUG_TRAP     47
  73 #define IRQ_RTC_1MSEC             48
  74 #define IRQ_DRI_DMA                 49
  75 #define IRQ_DRI_ATTENTION             50
  76 #define IRQ_GPMI_ATTENTION           51
  77 #define IRQ_IR                   52
  78 #define IRQ_DCP_VMI                 53
  79 #define IRQ_DCP                 54
  80 #define IRQ_RESERVED_55         55
  81 #define IRQ_RESERVED_56         56
  82 #define IRQ_RESERVED_57         57
  83 #define IRQ_RESERVED_58         58
  84 #define IRQ_RESERVED_59         59
  85 #define SW_IRQ_60                     60
  86 #define SW_IRQ_61                     61
  87 #define SW_IRQ_62                     62
  88 #define SW_IRQ_63                     63
  89
  90 #define NR_REAL_IRQS            64
  91 #define NR_IRQS                 (NR_REAL_IRQS + 32 * 3)
  92
  93 /* TIMER and BRNOUT are FIQ capable */
  94 #define FIQ_START                       IRQ_TIMER0
  95
  96 /* Hard disk IRQ is a GPMI attention IRQ */
  97 #define IRQ_HARDDISK            IRQ_GPMI_ATTENTION
  98
  99 #endif /* _ASM_ARCH_IRQS_H */