1 # arch/arm/plat-s3c/Kconfig
3 # Copyright 2007 Simtec Electronics
9 depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX
13 Base platform code for any Samsung S3C device
15 # low-level serial option nodes
19 config CPU_LLSERIAL_S3C2410_ONLY
21 default y if CPU_LLSERIAL_S3C2410 && !CPU_LLSERIAL_S3C2440
23 config CPU_LLSERIAL_S3C2440_ONLY
25 default y if CPU_LLSERIAL_S3C2440 && !CPU_LLSERIAL_S3C2410
27 config CPU_LLSERIAL_S3C2410
30 Selected if there is an S3C2410 (or register compatible) serial
31 low-level implementation needed
33 config CPU_LLSERIAL_S3C2440
36 Selected if there is an S3C2440 (or register compatible) serial
37 low-level implementation needed
41 comment "Boot options"
43 config S3C_BOOT_WATCHDOG
44 bool "S3C Initialisation watchdog"
45 depends on S3C2410_WATCHDOG
47 Say y to enable the watchdog during the kernel decompression
48 stage. If the kernel fails to uncompress, then the watchdog
49 will trigger a reset and the system should restart.
51 config S3C_BOOT_ERROR_RESET
52 bool "S3C Reboot on decompression error"
54 Say y here to use the watchdog to reset the system if the
55 kernel decompressor detects an error during decompression.
57 config S3C_BOOT_UART_FORCE_FIFO
58 bool "Force UART FIFO on during boot process"
61 Say Y here to force the UART FIFOs on during the kernel
64 comment "Power management"
66 config S3C2410_PM_DEBUG
67 bool "S3C2410 PM Suspend debug"
70 Say Y here if you want verbose debugging from the PM Suspend and
71 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
74 config S3C_PM_DEBUG_LED_SMDK
75 bool "SMDK LED suspend/resume debugging"
76 depends on PM && (MACH_SMDK6410)
78 Say Y here to enable the use of the SMDK LEDs on the baseboard
79 for debugging of the state of the suspend and resume process.
81 Note, this currently only works for S3C64XX based SMDK boards.
83 config S3C2410_PM_CHECK
84 bool "S3C2410 PM Suspend Memory CRC"
85 depends on PM && CRC32
87 Enable the PM code's memory area checksum over sleep. This option
88 will generate CRCs of all blocks of memory, and store them before
89 going to sleep. The blocks are then checked on resume for any
92 Note, this can take several seconds depending on memory size
95 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
97 config S3C2410_PM_CHECK_CHUNKSIZE
98 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
99 depends on PM && S3C2410_PM_CHECK
102 Set the chunksize in Kilobytes of the CRC for checking memory
103 corruption over suspend and resume. A smaller value will mean that
104 the CRC data block will take more memory, but wil identify any
105 faults with better precision.
107 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
109 config S3C_LOWLEVEL_UART_PORT
110 int "S3C UART to use for low-level messages"
113 Choice of which UART port to use for the low-level messages,
114 such as the `Uncompressing...` at start time. The value of
115 this configuration should be between zero and two. The port
116 must have been initialised by the boot-loader before use.
118 # options for gpiolib support
120 config S3C_GPIO_SPACE
121 int "Space between gpio banks"
124 Add a number of spare GPIO entries between each bank for debugging
125 purposes. This allows any problems where an counter overflows from
126 one bank to another to be caught, at the expense of using a little
129 config S3C_GPIO_TRACK
132 Internal configuration option to enable the s3c specific gpio
133 chip tracking if the platform requires it.
135 config S3C_GPIO_PULL_UPDOWN
138 Internal configuration to enable the correct GPIO pull helper
140 config S3C_GPIO_PULL_DOWN
143 Internal configuration to enable the correct GPIO pull helper
145 config S3C_GPIO_PULL_UP
148 Internal configuration to enable the correct GPIO pull helper
150 config S3C_GPIO_CFG_S3C24XX
153 Internal configuration to enable S3C24XX style GPIO configuration
156 config S3C_GPIO_CFG_S3C64XX
159 Internal configuration to enable S3C64XX style GPIO configuration
167 Internal configuration for S3C DMA core
169 # device definitions to compile in
174 Compile in platform device definitions for HSMMC code
176 config S3C_DEV_HSMMC1
179 Compile in platform device definitions for HSMMC channel 1
184 Compile in platform device definitions for I2C channel 1
189 Compile in platform device definition for framebuffer
191 config S3C_DEV_USB_HOST
194 Compile in platform device definition for USB host.
196 config S3C_DEV_USB_HSOTG
199 Compile in platform device definition for USB high-speed OtG
204 Compile in platform device definition for NAND controller