2 * linux/arch/m32r/kernel/time.c
4 * Copyright (c) 2001, 2002 Hiroyuki Kondo, Hirokazu Takata,
6 * Taken from i386 version.
7 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
8 * Copyright (C) 1996, 1997, 1998 Ralf Baechle
10 * This file contains the time handling details for PC-style clocks as
11 * found in some MIPS systems.
13 * Some code taken from sh version.
14 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
15 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
20 #include <linux/errno.h>
21 #include <linux/init.h>
22 #include <linux/module.h>
23 #include <linux/sched.h>
24 #include <linux/kernel.h>
25 #include <linux/param.h>
26 #include <linux/string.h>
28 #include <linux/interrupt.h>
29 #include <linux/profile.h>
34 #include <asm/hw_irq.h>
36 #if defined(CONFIG_RTC_DRV_CMOS) || defined(CONFIG_RTC_DRV_CMOS_MODULE)
37 /* this needs a better home */
38 DEFINE_SPINLOCK(rtc_lock
);
40 #ifdef CONFIG_RTC_DRV_CMOS_MODULE
41 EXPORT_SYMBOL(rtc_lock
);
43 #endif /* pc-style 'CMOS' RTC support */
46 extern void smp_local_timer_interrupt(void);
49 #define TICK_SIZE (tick_nsec / 1000)
52 * Change this if you have some constant time drift
55 /* This is for machines which generate the exact clock. */
56 #define USECS_PER_JIFFY (1000000/HZ)
58 static unsigned long latch
;
60 u32
arch_gettimeoffset(void)
62 unsigned long elapsed_time
= 0; /* [us] */
64 #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
65 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
66 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
71 /* timer count may underflow right here */
72 count
= inl(M32R_MFT2CUT_PORTL
);
74 if (inl(M32R_ICU_CR18_PORTL
) & 0x00000100) /* underflow check */
77 count
= (latch
- count
) * TICK_SIZE
;
78 elapsed_time
= (count
+ latch
/ 2) / latch
;
79 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
81 #else /* CONFIG_SMP */
83 static unsigned long p_jiffies
= -1;
84 static unsigned long p_count
= 0;
86 /* timer count may underflow right here */
87 count
= inl(M32R_MFT2CUT_PORTL
);
89 if (jiffies
== p_jiffies
&& count
> p_count
)
95 count
= (latch
- count
) * TICK_SIZE
;
96 elapsed_time
= (count
+ latch
/ 2) / latch
;
97 /* NOTE: LATCH is equal to the "interval" value (= reload count). */
98 #endif /* CONFIG_SMP */
99 #elif defined(CONFIG_CHIP_M32310)
100 #warning do_gettimeoffse not implemented
102 #error no chip configuration
105 return elapsed_time
* 1000;
109 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
110 * called 500 ms after the second nowtime has started, because when
111 * nowtime is written into the registers of the CMOS clock, it will
112 * jump to the next second precisely 500 ms later. Check the Motorola
113 * MC146818A or Dallas DS12887 data sheet for details.
115 * BUG: This routine does not handle hour overflow properly; it just
116 * sets the minutes. Usually you won't notice until after reboot!
118 static inline int set_rtc_mmss(unsigned long nowtime
)
123 /* last time the cmos clock got updated */
124 static long last_rtc_update
= 0;
127 * timer_interrupt() needs to keep up the real-time clock,
128 * as well as call the "do_timer()" routine every clocktick
130 static irqreturn_t
timer_interrupt(int irq
, void *dev_id
)
133 profile_tick(CPU_PROFILING
);
135 /* XXX FIXME. Uh, the xtime_lock should be held here, no? */
139 update_process_times(user_mode(get_irq_regs()));
142 * If we have an externally synchronized Linux clock, then update
143 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
144 * called as close as possible to 500 ms before the new second starts.
146 write_seqlock(&xtime_lock
);
148 && xtime
.tv_sec
> last_rtc_update
+ 660
149 && (xtime
.tv_nsec
/ 1000) >= 500000 - ((unsigned)TICK_SIZE
) / 2
150 && (xtime
.tv_nsec
/ 1000) <= 500000 + ((unsigned)TICK_SIZE
) / 2)
152 if (set_rtc_mmss(xtime
.tv_sec
) == 0)
153 last_rtc_update
= xtime
.tv_sec
;
154 else /* do it again in 60 s */
155 last_rtc_update
= xtime
.tv_sec
- 600;
157 write_sequnlock(&xtime_lock
);
158 /* As we return to user mode fire off the other CPU schedulers..
159 this is basically because we don't yet share IRQ's around.
160 This message is rigged to be safe on the 386 - basically it's
161 a hack, so don't look closely for now.. */
164 smp_local_timer_interrupt();
171 static struct irqaction irq0
= {
172 .handler
= timer_interrupt
,
173 .flags
= IRQF_DISABLED
,
177 void __init
time_init(void)
179 unsigned int epoch
, year
, mon
, day
, hour
, min
, sec
;
181 sec
= min
= hour
= day
= mon
= year
= 0;
188 /* Attempt to guess the epoch. This is the same heuristic as in rtc.c
189 so no stupid things will happen to timekeeping. Who knows, maybe
190 Ultrix also uses 1952 as epoch ... */
191 if (year
> 10 && year
< 44)
197 xtime
.tv_sec
= mktime(year
, mon
, day
, hour
, min
, sec
);
198 xtime
.tv_nsec
= (INITIAL_JIFFIES
% HZ
) * (NSEC_PER_SEC
/ HZ
);
199 set_normalized_timespec(&wall_to_monotonic
,
200 -xtime
.tv_sec
, -xtime
.tv_nsec
);
202 #if defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_XNUX2) \
203 || defined(CONFIG_CHIP_VDEC2) || defined(CONFIG_CHIP_M32700) \
204 || defined(CONFIG_CHIP_OPSP) || defined(CONFIG_CHIP_M32104)
206 /* M32102 MFT setup */
207 setup_irq(M32R_IRQ_MFT2
, &irq0
);
209 unsigned long bus_clock
;
210 unsigned short divide
;
212 bus_clock
= boot_cpu_data
.bus_clock
;
213 divide
= boot_cpu_data
.timer_divide
;
214 latch
= (bus_clock
/divide
+ HZ
/ 2) / HZ
;
216 printk("Timer start : latch = %ld\n", latch
);
218 outl((M32R_MFTMOD_CC_MASK
| M32R_MFTMOD_TCCR \
219 |M32R_MFTMOD_CSSEL011
), M32R_MFT2MOD_PORTL
);
220 outl(latch
, M32R_MFT2RLD_PORTL
);
221 outl(latch
, M32R_MFT2CUT_PORTL
);
222 outl(0, M32R_MFT2CMPRLD_PORTL
);
223 outl((M32R_MFTCR_MFT2MSK
|M32R_MFTCR_MFT2EN
), M32R_MFTCR_PORTL
);
226 #elif defined(CONFIG_CHIP_M32310)
227 #warning time_init not implemented
229 #error no chip configuration