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[linux-ginger.git] / arch / m68k / include / asm / system_no.h
blob3c0718d74398b3b7ce0b29bfb66b3f1895474db8
1 #ifndef _M68KNOMMU_SYSTEM_H
2 #define _M68KNOMMU_SYSTEM_H
4 #include <linux/linkage.h>
5 #include <asm/segment.h>
6 #include <asm/entry.h>
8 /*
9 * switch_to(n) should switch tasks to task ptr, first checking that
10 * ptr isn't the current task, in which case it does nothing. This
11 * also clears the TS-flag if the task we switched to has used the
12 * math co-processor latest.
15 * switch_to() saves the extra registers, that are not saved
16 * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
17 * a0-a1. Some of these are used by schedule() and its predecessors
18 * and so we might get see unexpected behaviors when a task returns
19 * with unexpected register values.
21 * syscall stores these registers itself and none of them are used
22 * by syscall after the function in the syscall has been called.
24 * Beware that resume now expects *next to be in d1 and the offset of
25 * tss to be in a1. This saves a few instructions as we no longer have
26 * to push them onto the stack and read them back right after.
28 * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
30 * Changed 96/09/19 by Andreas Schwab
31 * pass prev in a0, next in a1, offset of tss in d1, and whether
32 * the mm structures are shared in d2 (to avoid atc flushing).
34 asmlinkage void resume(void);
35 #define switch_to(prev,next,last) \
36 { \
37 void *_last; \
38 __asm__ __volatile__( \
39 "movel %1, %%a0\n\t" \
40 "movel %2, %%a1\n\t" \
41 "jbsr resume\n\t" \
42 "movel %%d1, %0\n\t" \
43 : "=d" (_last) \
44 : "d" (prev), "d" (next) \
45 : "cc", "d0", "d1", "d2", "d3", "d4", "d5", "a0", "a1"); \
46 (last) = _last; \
49 #ifdef CONFIG_COLDFIRE
50 #define local_irq_enable() __asm__ __volatile__ ( \
51 "move %/sr,%%d0\n\t" \
52 "andi.l #0xf8ff,%%d0\n\t" \
53 "move %%d0,%/sr\n" \
54 : /* no outputs */ \
55 : \
56 : "cc", "%d0", "memory")
57 #define local_irq_disable() __asm__ __volatile__ ( \
58 "move %/sr,%%d0\n\t" \
59 "ori.l #0x0700,%%d0\n\t" \
60 "move %%d0,%/sr\n" \
61 : /* no outputs */ \
62 : \
63 : "cc", "%d0", "memory")
64 /* For spinlocks etc */
65 #define local_irq_save(x) __asm__ __volatile__ ( \
66 "movew %%sr,%0\n\t" \
67 "movew #0x0700,%%d0\n\t" \
68 "or.l %0,%%d0\n\t" \
69 "movew %%d0,%/sr" \
70 : "=d" (x) \
71 : \
72 : "cc", "%d0", "memory")
73 #else
75 /* portable version */ /* FIXME - see entry.h*/
76 #define ALLOWINT 0xf8ff
78 #define local_irq_enable() asm volatile ("andiw %0,%%sr": : "i" (ALLOWINT) : "memory")
79 #define local_irq_disable() asm volatile ("oriw #0x0700,%%sr": : : "memory")
80 #endif
82 #define local_save_flags(x) asm volatile ("movew %%sr,%0":"=d" (x) : : "memory")
83 #define local_irq_restore(x) asm volatile ("movew %0,%%sr": :"d" (x) : "memory")
85 /* For spinlocks etc */
86 #ifndef local_irq_save
87 #define local_irq_save(x) do { local_save_flags(x); local_irq_disable(); } while (0)
88 #endif
90 #define irqs_disabled() \
91 ({ \
92 unsigned long flags; \
93 local_save_flags(flags); \
94 ((flags & 0x0700) == 0x0700); \
97 #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
100 * Force strict CPU ordering.
101 * Not really required on m68k...
103 #define nop() asm volatile ("nop"::)
104 #define mb() asm volatile ("" : : :"memory")
105 #define rmb() asm volatile ("" : : :"memory")
106 #define wmb() asm volatile ("" : : :"memory")
107 #define set_mb(var, value) ({ (var) = (value); wmb(); })
109 #ifdef CONFIG_SMP
110 #define smp_mb() mb()
111 #define smp_rmb() rmb()
112 #define smp_wmb() wmb()
113 #define smp_read_barrier_depends() read_barrier_depends()
114 #else
115 #define smp_mb() barrier()
116 #define smp_rmb() barrier()
117 #define smp_wmb() barrier()
118 #define smp_read_barrier_depends() do { } while(0)
119 #endif
121 #define read_barrier_depends() ((void)0)
123 #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
125 struct __xchg_dummy { unsigned long a[100]; };
126 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
128 #ifndef CONFIG_RMW_INSNS
129 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
131 unsigned long tmp, flags;
133 local_irq_save(flags);
135 switch (size) {
136 case 1:
137 __asm__ __volatile__
138 ("moveb %2,%0\n\t"
139 "moveb %1,%2"
140 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
141 break;
142 case 2:
143 __asm__ __volatile__
144 ("movew %2,%0\n\t"
145 "movew %1,%2"
146 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
147 break;
148 case 4:
149 __asm__ __volatile__
150 ("movel %2,%0\n\t"
151 "movel %1,%2"
152 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
153 break;
155 local_irq_restore(flags);
156 return tmp;
158 #else
159 static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
161 switch (size) {
162 case 1:
163 __asm__ __volatile__
164 ("moveb %2,%0\n\t"
165 "1:\n\t"
166 "casb %0,%1,%2\n\t"
167 "jne 1b"
168 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
169 break;
170 case 2:
171 __asm__ __volatile__
172 ("movew %2,%0\n\t"
173 "1:\n\t"
174 "casw %0,%1,%2\n\t"
175 "jne 1b"
176 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
177 break;
178 case 4:
179 __asm__ __volatile__
180 ("movel %2,%0\n\t"
181 "1:\n\t"
182 "casl %0,%1,%2\n\t"
183 "jne 1b"
184 : "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
185 break;
187 return x;
189 #endif
191 #include <asm-generic/cmpxchg-local.h>
194 * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
195 * them available.
197 #define cmpxchg_local(ptr, o, n) \
198 ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
199 (unsigned long)(n), sizeof(*(ptr))))
200 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
202 #ifndef CONFIG_SMP
203 #include <asm-generic/cmpxchg.h>
204 #endif
206 #define arch_align_stack(x) (x)
209 static inline int irqs_disabled_flags(unsigned long flags)
211 if (flags & 0x0700)
212 return 0;
213 else
214 return 1;
217 #endif /* _M68KNOMMU_SYSTEM_H */