arch/m68knommu/platform/coldfire/intc-simr.c

   1 /*
   2  * intc-simr.c
   3  *
   4  * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
   5  *
   6  * This file is subject to the terms and conditions of the GNU General Public
   7  * License.  See the file COPYING in the main directory of this archive
   8  * for more details.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/init.h>
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/io.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19 #include <asm/traps.h>
  20
  21 static void intc_irq_mask(unsigned int irq)
  22 {
  23         if (irq >= MCFINT_VECBASE) {
  24                 if (irq < MCFINT_VECBASE + 64)
  25                         __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_SIMR);
  26                 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_SIMR)
  27                         __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_SIMR);
  28         }
  29 }
  30
  31 static void intc_irq_unmask(unsigned int irq)
  32 {
  33         if (irq >= MCFINT_VECBASE) {
  34                 if (irq < MCFINT_VECBASE + 64)
  35                         __raw_writeb(irq - MCFINT_VECBASE, MCFINTC0_CIMR);
  36                 else if ((irq < MCFINT_VECBASE + 128) && MCFINTC1_CIMR)
  37                         __raw_writeb(irq - MCFINT_VECBASE - 64, MCFINTC1_CIMR);
  38         }
  39 }
  40
  41 static int intc_irq_set_type(unsigned int irq, unsigned int type)
  42 {
  43         if (irq >= MCFINT_VECBASE) {
  44                 if (irq < MCFINT_VECBASE + 64)
  45                         __raw_writeb(5, MCFINTC0_ICR0 + irq - MCFINT_VECBASE);
  46                 else if ((irq < MCFINT_VECBASE) && MCFINTC1_ICR0)
  47                         __raw_writeb(5, MCFINTC1_ICR0 + irq - MCFINT_VECBASE - 64);
  48         }
  49         return 0;
  50 }
  51
  52 static struct irq_chip intc_irq_chip = {
  53         .name           = "CF-INTC",
  54         .mask           = intc_irq_mask,
  55         .unmask         = intc_irq_unmask,
  56         .set_type       = intc_irq_set_type,
  57 };
  58
  59 void __init init_IRQ(void)
  60 {
  61         int irq;
  62
  63         init_vectors();
  64
  65         /* Mask all interrupt sources */
  66         __raw_writeb(0xff, MCFINTC0_SIMR);
  67         if (MCFINTC1_SIMR)
  68                 __raw_writeb(0xff, MCFINTC1_SIMR);
  69
  70         for (irq = 0; (irq < NR_IRQS); irq++) {
  71                 irq_desc[irq].status = IRQ_DISABLED;
  72                 irq_desc[irq].action = NULL;
  73                 irq_desc[irq].depth = 1;
  74                 irq_desc[irq].chip = &intc_irq_chip;
  75                 intc_irq_set_type(irq, 0);
  76         }
  77 }
  78