arch/mips/alchemy/devboards/pb1500/board_setup.c

   1 /*
   2  * Copyright 2000, 2008 MontaVista Software Inc.
   3  * Author: MontaVista Software, Inc. <source@mvista.com>
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  11  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  12  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  13  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  14  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  16  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  18  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20  *
  21  *  You should have received a copy of the  GNU General Public License along
  22  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  23  *  675 Mass Ave, Cambridge, MA 02139, USA.
  24  */
  25
  26 #include <linux/delay.h>
  27 #include <linux/gpio.h>
  28 #include <linux/init.h>
  29 #include <linux/interrupt.h>
  30
  31 #include <asm/mach-au1x00/au1000.h>
  32 #include <asm/mach-pb1x00/pb1500.h>
  33
  34 #include <prom.h>
  35
  36
  37 char irq_tab_alchemy[][5] __initdata = {
  38         [12] = { -1, INTA, INTX, INTX, INTX },   /* IDSEL 12 - HPT370   */
  39         [13] = { -1, INTA, INTB, INTC, INTD },   /* IDSEL 13 - PCI slot */
  40 };
  41
  42 struct au1xxx_irqmap __initdata au1xxx_irq_map[] = {
  43         { AU1500_GPIO_204, IRQF_TRIGGER_HIGH, 0 },
  44         { AU1500_GPIO_201, IRQF_TRIGGER_LOW, 0 },
  45         { AU1500_GPIO_202, IRQF_TRIGGER_LOW, 0 },
  46         { AU1500_GPIO_203, IRQF_TRIGGER_LOW, 0 },
  47         { AU1500_GPIO_205, IRQF_TRIGGER_LOW, 0 },
  48 };
  49
  50
  51 const char *get_system_type(void)
  52 {
  53         return "Alchemy Pb1500";
  54 }
  55
  56 void board_reset(void)
  57 {
  58         /* Hit BCSR.RST_VDDI[SOFT_RESET] */
  59         au_writel(0x00000000, PB1500_RST_VDDI);
  60 }
  61
  62 void __init board_init_irq(void)
  63 {
  64         au1xxx_setup_irqmap(au1xxx_irq_map, ARRAY_SIZE(au1xxx_irq_map));
  65 }
  66
  67 void __init board_setup(void)
  68 {
  69         u32 pin_func;
  70         u32 sys_freqctrl, sys_clksrc;
  71         char *argptr;
  72
  73         argptr = prom_getcmdline();
  74 #ifdef CONFIG_SERIAL_8250_CONSOLE
  75         argptr = strstr(argptr, "console=");
  76         if (argptr == NULL) {
  77                 argptr = prom_getcmdline();
  78                 strcat(argptr, " console=ttyS0,115200");
  79         }
  80 #endif
  81
  82 #if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
  83         /* au1000 does not support vra, au1500 and au1100 do */
  84         strcat(argptr, " au1000_audio=vra");
  85         argptr = prom_getcmdline();
  86 #endif
  87
  88         sys_clksrc = sys_freqctrl = pin_func = 0;
  89         /* Set AUX clock to 12 MHz * 8 = 96 MHz */
  90         au_writel(8, SYS_AUXPLL);
  91         au_writel(0, SYS_PINSTATERD);
  92         udelay(100);
  93
  94         /* GPIO201 is input for PCMCIA card detect */
  95         /* GPIO203 is input for PCMCIA interrupt request */
  96         alchemy_gpio_direction_input(201);
  97         alchemy_gpio_direction_input(203);
  98
  99 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 100
 101         /* Zero and disable FREQ2 */
 102         sys_freqctrl = au_readl(SYS_FREQCTRL0);
 103         sys_freqctrl &= ~0xFFF00000;
 104         au_writel(sys_freqctrl, SYS_FREQCTRL0);
 105
 106         /* zero and disable USBH/USBD clocks */
 107         sys_clksrc = au_readl(SYS_CLKSRC);
 108         sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
 109                         SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
 110         au_writel(sys_clksrc, SYS_CLKSRC);
 111
 112         sys_freqctrl = au_readl(SYS_FREQCTRL0);
 113         sys_freqctrl &= ~0xFFF00000;
 114
 115         sys_clksrc = au_readl(SYS_CLKSRC);
 116         sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
 117                         SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
 118
 119         /* FREQ2 = aux/2 = 48 MHz */
 120         sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
 121         au_writel(sys_freqctrl, SYS_FREQCTRL0);
 122
 123         /*
 124          * Route 48MHz FREQ2 into USB Host and/or Device
 125          */
 126         sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
 127         au_writel(sys_clksrc, SYS_CLKSRC);
 128
 129         pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
 130         /* 2nd USB port is USB host */
 131         pin_func |= SYS_PF_USB;
 132         au_writel(pin_func, SYS_PINFUNC);
 133 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
 134
 135 #ifdef CONFIG_PCI
 136         /* Setup PCI bus controller */
 137         au_writel(0, Au1500_PCI_CMEM);
 138         au_writel(0x00003fff, Au1500_CFG_BASE);
 139 #if defined(__MIPSEB__)
 140         au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
 141 #else
 142         au_writel(0xf, Au1500_PCI_CFG);
 143 #endif
 144         au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
 145         au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
 146         au_writel(0x02a00356, Au1500_PCI_STATCMD);
 147         au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
 148         au_writel(0x00000008, Au1500_PCI_MBAR);
 149         au_sync();
 150 #endif
 151
 152         /* Enable sys bus clock divider when IDLE state or no bus activity. */
 153         au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
 154
 155         /* Enable the RTC if not already enabled */
 156         if (!(au_readl(0xac000028) & 0x20)) {
 157                 printk(KERN_INFO "enabling clock ...\n");
 158                 au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
 159         }
 160         /* Put the clock in BCD mode */
 161         if (au_readl(0xac00002c) & 0x4) { /* reg B */
 162                 au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
 163                 au_sync();
 164         }
 165 }