Full support for Ginger Console
[linux-ginger.git] / arch / mips / kernel / smp.c
blobe72e6844d134759218227bee63faac5f2d9bbea8
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
16 * Copyright (C) 2000, 2001 Kanoj Sarcar
17 * Copyright (C) 2000, 2001 Ralf Baechle
18 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
19 * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
21 #include <linux/cache.h>
22 #include <linux/delay.h>
23 #include <linux/init.h>
24 #include <linux/interrupt.h>
25 #include <linux/smp.h>
26 #include <linux/spinlock.h>
27 #include <linux/threads.h>
28 #include <linux/module.h>
29 #include <linux/time.h>
30 #include <linux/timex.h>
31 #include <linux/sched.h>
32 #include <linux/cpumask.h>
33 #include <linux/cpu.h>
34 #include <linux/err.h>
36 #include <asm/atomic.h>
37 #include <asm/cpu.h>
38 #include <asm/processor.h>
39 #include <asm/r4k-timer.h>
40 #include <asm/system.h>
41 #include <asm/mmu_context.h>
42 #include <asm/time.h>
44 #ifdef CONFIG_MIPS_MT_SMTC
45 #include <asm/mipsmtregs.h>
46 #endif /* CONFIG_MIPS_MT_SMTC */
48 volatile cpumask_t cpu_callin_map; /* Bitmask of started secondaries */
49 int __cpu_number_map[NR_CPUS]; /* Map physical to logical */
50 int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */
52 /* Number of TCs (or siblings in Intel speak) per CPU core */
53 int smp_num_siblings = 1;
54 EXPORT_SYMBOL(smp_num_siblings);
56 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
57 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
58 EXPORT_SYMBOL(cpu_sibling_map);
60 /* representing cpus for which sibling maps can be computed */
61 static cpumask_t cpu_sibling_setup_map;
63 static inline void set_cpu_sibling_map(int cpu)
65 int i;
67 cpu_set(cpu, cpu_sibling_setup_map);
69 if (smp_num_siblings > 1) {
70 for_each_cpu_mask(i, cpu_sibling_setup_map) {
71 if (cpu_data[cpu].core == cpu_data[i].core) {
72 cpu_set(i, cpu_sibling_map[cpu]);
73 cpu_set(cpu, cpu_sibling_map[i]);
76 } else
77 cpu_set(cpu, cpu_sibling_map[cpu]);
80 struct plat_smp_ops *mp_ops;
82 __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
84 if (mp_ops)
85 printk(KERN_WARNING "Overriding previously set SMP ops\n");
87 mp_ops = ops;
91 * First C code run on the secondary CPUs after being started up by
92 * the master.
94 asmlinkage __cpuinit void start_secondary(void)
96 unsigned int cpu;
98 #ifdef CONFIG_MIPS_MT_SMTC
99 /* Only do cpu_probe for first TC of CPU */
100 if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
101 #endif /* CONFIG_MIPS_MT_SMTC */
102 cpu_probe();
103 cpu_report();
104 per_cpu_trap_init();
105 mips_clockevent_init();
106 mp_ops->init_secondary();
109 * XXX parity protection should be folded in here when it's converted
110 * to an option instead of something based on .cputype
113 calibrate_delay();
114 preempt_disable();
115 cpu = smp_processor_id();
116 cpu_data[cpu].udelay_val = loops_per_jiffy;
118 notify_cpu_starting(cpu);
120 mp_ops->smp_finish();
121 set_cpu_sibling_map(cpu);
123 cpu_set(cpu, cpu_callin_map);
125 synchronise_count_slave();
127 cpu_idle();
131 * Call into both interrupt handlers, as we share the IPI for them
133 void smp_call_function_interrupt(void)
135 irq_enter();
136 generic_smp_call_function_single_interrupt();
137 generic_smp_call_function_interrupt();
138 irq_exit();
141 static void stop_this_cpu(void *dummy)
144 * Remove this CPU:
146 cpu_clear(smp_processor_id(), cpu_online_map);
147 for (;;) {
148 if (cpu_wait)
149 (*cpu_wait)(); /* Wait if available. */
153 void smp_send_stop(void)
155 smp_call_function(stop_this_cpu, NULL, 0);
158 void __init smp_cpus_done(unsigned int max_cpus)
160 mp_ops->cpus_done();
161 synchronise_count_master();
164 /* called from main before smp_init() */
165 void __init smp_prepare_cpus(unsigned int max_cpus)
167 init_new_context(current, &init_mm);
168 current_thread_info()->cpu = 0;
169 mp_ops->prepare_cpus(max_cpus);
170 set_cpu_sibling_map(0);
171 #ifndef CONFIG_HOTPLUG_CPU
172 init_cpu_present(&cpu_possible_map);
173 #endif
176 /* preload SMP state for boot cpu */
177 void __devinit smp_prepare_boot_cpu(void)
179 set_cpu_possible(0, true);
180 set_cpu_online(0, true);
181 cpu_set(0, cpu_callin_map);
185 * Called once for each "cpu_possible(cpu)". Needs to spin up the cpu
186 * and keep control until "cpu_online(cpu)" is set. Note: cpu is
187 * physical, not logical.
189 static struct task_struct *cpu_idle_thread[NR_CPUS];
191 int __cpuinit __cpu_up(unsigned int cpu)
193 struct task_struct *idle;
196 * Processor goes to start_secondary(), sets online flag
197 * The following code is purely to make sure
198 * Linux can schedule processes on this slave.
200 if (!cpu_idle_thread[cpu]) {
201 idle = fork_idle(cpu);
202 cpu_idle_thread[cpu] = idle;
204 if (IS_ERR(idle))
205 panic(KERN_ERR "Fork failed for CPU %d", cpu);
206 } else {
207 idle = cpu_idle_thread[cpu];
208 init_idle(idle, cpu);
211 mp_ops->boot_secondary(cpu, idle);
214 * Trust is futile. We should really have timeouts ...
216 while (!cpu_isset(cpu, cpu_callin_map))
217 udelay(100);
219 cpu_set(cpu, cpu_online_map);
221 return 0;
224 /* Not really SMP stuff ... */
225 int setup_profiling_timer(unsigned int multiplier)
227 return 0;
230 static void flush_tlb_all_ipi(void *info)
232 local_flush_tlb_all();
235 void flush_tlb_all(void)
237 on_each_cpu(flush_tlb_all_ipi, NULL, 1);
240 static void flush_tlb_mm_ipi(void *mm)
242 local_flush_tlb_mm((struct mm_struct *)mm);
246 * Special Variant of smp_call_function for use by TLB functions:
248 * o No return value
249 * o collapses to normal function call on UP kernels
250 * o collapses to normal function call on systems with a single shared
251 * primary cache.
252 * o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
254 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
256 #ifndef CONFIG_MIPS_MT_SMTC
257 smp_call_function(func, info, 1);
258 #endif
261 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
263 preempt_disable();
265 smp_on_other_tlbs(func, info);
266 func(info);
268 preempt_enable();
272 * The following tlb flush calls are invoked when old translations are
273 * being torn down, or pte attributes are changing. For single threaded
274 * address spaces, a new context is obtained on the current cpu, and tlb
275 * context on other cpus are invalidated to force a new context allocation
276 * at switch_mm time, should the mm ever be used on other cpus. For
277 * multithreaded address spaces, intercpu interrupts have to be sent.
278 * Another case where intercpu interrupts are required is when the target
279 * mm might be active on another cpu (eg debuggers doing the flushes on
280 * behalf of debugees, kswapd stealing pages from another process etc).
281 * Kanoj 07/00.
284 void flush_tlb_mm(struct mm_struct *mm)
286 preempt_disable();
288 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
289 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
290 } else {
291 cpumask_t mask = cpu_online_map;
292 unsigned int cpu;
294 cpu_clear(smp_processor_id(), mask);
295 for_each_cpu_mask(cpu, mask)
296 if (cpu_context(cpu, mm))
297 cpu_context(cpu, mm) = 0;
299 local_flush_tlb_mm(mm);
301 preempt_enable();
304 struct flush_tlb_data {
305 struct vm_area_struct *vma;
306 unsigned long addr1;
307 unsigned long addr2;
310 static void flush_tlb_range_ipi(void *info)
312 struct flush_tlb_data *fd = info;
314 local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
317 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
319 struct mm_struct *mm = vma->vm_mm;
321 preempt_disable();
322 if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
323 struct flush_tlb_data fd = {
324 .vma = vma,
325 .addr1 = start,
326 .addr2 = end,
329 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
330 } else {
331 cpumask_t mask = cpu_online_map;
332 unsigned int cpu;
334 cpu_clear(smp_processor_id(), mask);
335 for_each_cpu_mask(cpu, mask)
336 if (cpu_context(cpu, mm))
337 cpu_context(cpu, mm) = 0;
339 local_flush_tlb_range(vma, start, end);
340 preempt_enable();
343 static void flush_tlb_kernel_range_ipi(void *info)
345 struct flush_tlb_data *fd = info;
347 local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
350 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
352 struct flush_tlb_data fd = {
353 .addr1 = start,
354 .addr2 = end,
357 on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
360 static void flush_tlb_page_ipi(void *info)
362 struct flush_tlb_data *fd = info;
364 local_flush_tlb_page(fd->vma, fd->addr1);
367 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
369 preempt_disable();
370 if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
371 struct flush_tlb_data fd = {
372 .vma = vma,
373 .addr1 = page,
376 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
377 } else {
378 cpumask_t mask = cpu_online_map;
379 unsigned int cpu;
381 cpu_clear(smp_processor_id(), mask);
382 for_each_cpu_mask(cpu, mask)
383 if (cpu_context(cpu, vma->vm_mm))
384 cpu_context(cpu, vma->vm_mm) = 0;
386 local_flush_tlb_page(vma, page);
387 preempt_enable();
390 static void flush_tlb_one_ipi(void *info)
392 unsigned long vaddr = (unsigned long) info;
394 local_flush_tlb_one(vaddr);
397 void flush_tlb_one(unsigned long vaddr)
399 smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
402 EXPORT_SYMBOL(flush_tlb_page);
403 EXPORT_SYMBOL(flush_tlb_one);