2 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the Free
6 * Software Foundation; either version 2 of the License, or (at your option)
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59
16 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 * The full GNU General Public License is included in this distribution in the
19 * file called COPYING.
23 * This code implements the DMA subsystem. It provides a HW-neutral interface
24 * for other kernel code to use asynchronous memory copy capabilities,
25 * if present, and allows different HW DMA drivers to register as providing
28 * Due to the fact we are accelerating what is already a relatively fast
29 * operation, the code goes to great lengths to avoid additional overhead,
34 * The subsystem keeps a global list of dma_device structs it is protected by a
35 * mutex, dma_list_mutex.
37 * A subsystem can get access to a channel by calling dmaengine_get() followed
38 * by dma_find_channel(), or if it has need for an exclusive channel it can call
39 * dma_request_channel(). Once a channel is allocated a reference is taken
40 * against its corresponding driver to disable removal.
42 * Each device has a channels list, which runs unlocked but is never modified
43 * once the device is registered, it's just setup by the driver.
45 * See Documentation/dmaengine.txt for more details
48 #include <linux/init.h>
49 #include <linux/module.h>
51 #include <linux/device.h>
52 #include <linux/dmaengine.h>
53 #include <linux/hardirq.h>
54 #include <linux/spinlock.h>
55 #include <linux/percpu.h>
56 #include <linux/rcupdate.h>
57 #include <linux/mutex.h>
58 #include <linux/jiffies.h>
59 #include <linux/rculist.h>
60 #include <linux/idr.h>
62 static DEFINE_MUTEX(dma_list_mutex
);
63 static LIST_HEAD(dma_device_list
);
64 static long dmaengine_ref_count
;
65 static struct idr dma_idr
;
67 /* --- sysfs implementation --- */
70 * dev_to_dma_chan - convert a device pointer to the its sysfs container object
73 * Must be called under dma_list_mutex
75 static struct dma_chan
*dev_to_dma_chan(struct device
*dev
)
77 struct dma_chan_dev
*chan_dev
;
79 chan_dev
= container_of(dev
, typeof(*chan_dev
), device
);
80 return chan_dev
->chan
;
83 static ssize_t
show_memcpy_count(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
85 struct dma_chan
*chan
;
86 unsigned long count
= 0;
90 mutex_lock(&dma_list_mutex
);
91 chan
= dev_to_dma_chan(dev
);
93 for_each_possible_cpu(i
)
94 count
+= per_cpu_ptr(chan
->local
, i
)->memcpy_count
;
95 err
= sprintf(buf
, "%lu\n", count
);
98 mutex_unlock(&dma_list_mutex
);
103 static ssize_t
show_bytes_transferred(struct device
*dev
, struct device_attribute
*attr
,
106 struct dma_chan
*chan
;
107 unsigned long count
= 0;
111 mutex_lock(&dma_list_mutex
);
112 chan
= dev_to_dma_chan(dev
);
114 for_each_possible_cpu(i
)
115 count
+= per_cpu_ptr(chan
->local
, i
)->bytes_transferred
;
116 err
= sprintf(buf
, "%lu\n", count
);
119 mutex_unlock(&dma_list_mutex
);
124 static ssize_t
show_in_use(struct device
*dev
, struct device_attribute
*attr
, char *buf
)
126 struct dma_chan
*chan
;
129 mutex_lock(&dma_list_mutex
);
130 chan
= dev_to_dma_chan(dev
);
132 err
= sprintf(buf
, "%d\n", chan
->client_count
);
135 mutex_unlock(&dma_list_mutex
);
140 static struct device_attribute dma_attrs
[] = {
141 __ATTR(memcpy_count
, S_IRUGO
, show_memcpy_count
, NULL
),
142 __ATTR(bytes_transferred
, S_IRUGO
, show_bytes_transferred
, NULL
),
143 __ATTR(in_use
, S_IRUGO
, show_in_use
, NULL
),
147 static void chan_dev_release(struct device
*dev
)
149 struct dma_chan_dev
*chan_dev
;
151 chan_dev
= container_of(dev
, typeof(*chan_dev
), device
);
152 if (atomic_dec_and_test(chan_dev
->idr_ref
)) {
153 mutex_lock(&dma_list_mutex
);
154 idr_remove(&dma_idr
, chan_dev
->dev_id
);
155 mutex_unlock(&dma_list_mutex
);
156 kfree(chan_dev
->idr_ref
);
161 static struct class dma_devclass
= {
163 .dev_attrs
= dma_attrs
,
164 .dev_release
= chan_dev_release
,
167 /* --- client and device registration --- */
169 #define dma_device_satisfies_mask(device, mask) \
170 __dma_device_satisfies_mask((device), &(mask))
172 __dma_device_satisfies_mask(struct dma_device
*device
, dma_cap_mask_t
*want
)
176 bitmap_and(has
.bits
, want
->bits
, device
->cap_mask
.bits
,
178 return bitmap_equal(want
->bits
, has
.bits
, DMA_TX_TYPE_END
);
181 static struct module
*dma_chan_to_owner(struct dma_chan
*chan
)
183 return chan
->device
->dev
->driver
->owner
;
187 * balance_ref_count - catch up the channel reference count
188 * @chan - channel to balance ->client_count versus dmaengine_ref_count
190 * balance_ref_count must be called under dma_list_mutex
192 static void balance_ref_count(struct dma_chan
*chan
)
194 struct module
*owner
= dma_chan_to_owner(chan
);
196 while (chan
->client_count
< dmaengine_ref_count
) {
198 chan
->client_count
++;
203 * dma_chan_get - try to grab a dma channel's parent driver module
204 * @chan - channel to grab
206 * Must be called under dma_list_mutex
208 static int dma_chan_get(struct dma_chan
*chan
)
211 struct module
*owner
= dma_chan_to_owner(chan
);
213 if (chan
->client_count
) {
216 } else if (try_module_get(owner
))
220 chan
->client_count
++;
222 /* allocate upon first client reference */
223 if (chan
->client_count
== 1 && err
== 0) {
224 int desc_cnt
= chan
->device
->device_alloc_chan_resources(chan
);
228 chan
->client_count
= 0;
230 } else if (!dma_has_cap(DMA_PRIVATE
, chan
->device
->cap_mask
))
231 balance_ref_count(chan
);
238 * dma_chan_put - drop a reference to a dma channel's parent driver module
239 * @chan - channel to release
241 * Must be called under dma_list_mutex
243 static void dma_chan_put(struct dma_chan
*chan
)
245 if (!chan
->client_count
)
246 return; /* this channel failed alloc_chan_resources */
247 chan
->client_count
--;
248 module_put(dma_chan_to_owner(chan
));
249 if (chan
->client_count
== 0)
250 chan
->device
->device_free_chan_resources(chan
);
253 enum dma_status
dma_sync_wait(struct dma_chan
*chan
, dma_cookie_t cookie
)
255 enum dma_status status
;
256 unsigned long dma_sync_wait_timeout
= jiffies
+ msecs_to_jiffies(5000);
258 dma_async_issue_pending(chan
);
260 status
= dma_async_is_tx_complete(chan
, cookie
, NULL
, NULL
);
261 if (time_after_eq(jiffies
, dma_sync_wait_timeout
)) {
262 printk(KERN_ERR
"dma_sync_wait_timeout!\n");
265 } while (status
== DMA_IN_PROGRESS
);
269 EXPORT_SYMBOL(dma_sync_wait
);
272 * dma_cap_mask_all - enable iteration over all operation types
274 static dma_cap_mask_t dma_cap_mask_all
;
277 * dma_chan_tbl_ent - tracks channel allocations per core/operation
278 * @chan - associated channel for this entry
280 struct dma_chan_tbl_ent
{
281 struct dma_chan
*chan
;
285 * channel_table - percpu lookup table for memory-to-memory offload providers
287 static struct dma_chan_tbl_ent
*channel_table
[DMA_TX_TYPE_END
];
289 static int __init
dma_channel_table_init(void)
291 enum dma_transaction_type cap
;
294 bitmap_fill(dma_cap_mask_all
.bits
, DMA_TX_TYPE_END
);
296 /* 'interrupt', 'private', and 'slave' are channel capabilities,
297 * but are not associated with an operation so they do not need
298 * an entry in the channel_table
300 clear_bit(DMA_INTERRUPT
, dma_cap_mask_all
.bits
);
301 clear_bit(DMA_PRIVATE
, dma_cap_mask_all
.bits
);
302 clear_bit(DMA_SLAVE
, dma_cap_mask_all
.bits
);
304 for_each_dma_cap_mask(cap
, dma_cap_mask_all
) {
305 channel_table
[cap
] = alloc_percpu(struct dma_chan_tbl_ent
);
306 if (!channel_table
[cap
]) {
313 pr_err("dmaengine: initialization failure\n");
314 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
315 if (channel_table
[cap
])
316 free_percpu(channel_table
[cap
]);
321 arch_initcall(dma_channel_table_init
);
324 * dma_find_channel - find a channel to carry out the operation
325 * @tx_type: transaction type
327 struct dma_chan
*dma_find_channel(enum dma_transaction_type tx_type
)
329 struct dma_chan
*chan
;
333 chan
= per_cpu_ptr(channel_table
[tx_type
], cpu
)->chan
;
338 EXPORT_SYMBOL(dma_find_channel
);
341 * dma_issue_pending_all - flush all pending operations across all channels
343 void dma_issue_pending_all(void)
345 struct dma_device
*device
;
346 struct dma_chan
*chan
;
349 list_for_each_entry_rcu(device
, &dma_device_list
, global_node
) {
350 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
352 list_for_each_entry(chan
, &device
->channels
, device_node
)
353 if (chan
->client_count
)
354 device
->device_issue_pending(chan
);
358 EXPORT_SYMBOL(dma_issue_pending_all
);
361 * nth_chan - returns the nth channel of the given capability
362 * @cap: capability to match
363 * @n: nth channel desired
365 * Defaults to returning the channel with the desired capability and the
366 * lowest reference count when 'n' cannot be satisfied. Must be called
367 * under dma_list_mutex.
369 static struct dma_chan
*nth_chan(enum dma_transaction_type cap
, int n
)
371 struct dma_device
*device
;
372 struct dma_chan
*chan
;
373 struct dma_chan
*ret
= NULL
;
374 struct dma_chan
*min
= NULL
;
376 list_for_each_entry(device
, &dma_device_list
, global_node
) {
377 if (!dma_has_cap(cap
, device
->cap_mask
) ||
378 dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
380 list_for_each_entry(chan
, &device
->channels
, device_node
) {
381 if (!chan
->client_count
)
385 else if (chan
->table_count
< min
->table_count
)
407 * dma_channel_rebalance - redistribute the available channels
409 * Optimize for cpu isolation (each cpu gets a dedicated channel for an
410 * operation type) in the SMP case, and operation isolation (avoid
411 * multi-tasking channels) in the non-SMP case. Must be called under
414 static void dma_channel_rebalance(void)
416 struct dma_chan
*chan
;
417 struct dma_device
*device
;
422 /* undo the last distribution */
423 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
424 for_each_possible_cpu(cpu
)
425 per_cpu_ptr(channel_table
[cap
], cpu
)->chan
= NULL
;
427 list_for_each_entry(device
, &dma_device_list
, global_node
) {
428 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
430 list_for_each_entry(chan
, &device
->channels
, device_node
)
431 chan
->table_count
= 0;
434 /* don't populate the channel_table if no clients are available */
435 if (!dmaengine_ref_count
)
438 /* redistribute available channels */
440 for_each_dma_cap_mask(cap
, dma_cap_mask_all
)
441 for_each_online_cpu(cpu
) {
442 if (num_possible_cpus() > 1)
443 chan
= nth_chan(cap
, n
++);
445 chan
= nth_chan(cap
, -1);
447 per_cpu_ptr(channel_table
[cap
], cpu
)->chan
= chan
;
451 static struct dma_chan
*private_candidate(dma_cap_mask_t
*mask
, struct dma_device
*dev
,
452 dma_filter_fn fn
, void *fn_param
)
454 struct dma_chan
*chan
;
456 if (!__dma_device_satisfies_mask(dev
, mask
)) {
457 pr_debug("%s: wrong capabilities\n", __func__
);
460 /* devices with multiple channels need special handling as we need to
461 * ensure that all channels are either private or public.
463 if (dev
->chancnt
> 1 && !dma_has_cap(DMA_PRIVATE
, dev
->cap_mask
))
464 list_for_each_entry(chan
, &dev
->channels
, device_node
) {
465 /* some channels are already publicly allocated */
466 if (chan
->client_count
)
470 list_for_each_entry(chan
, &dev
->channels
, device_node
) {
471 if (chan
->client_count
) {
472 pr_debug("%s: %s busy\n",
473 __func__
, dma_chan_name(chan
));
476 if (fn
&& !fn(chan
, fn_param
)) {
477 pr_debug("%s: %s filter said false\n",
478 __func__
, dma_chan_name(chan
));
488 * dma_request_channel - try to allocate an exclusive channel
489 * @mask: capabilities that the channel must satisfy
490 * @fn: optional callback to disposition available channels
491 * @fn_param: opaque parameter to pass to dma_filter_fn
493 struct dma_chan
*__dma_request_channel(dma_cap_mask_t
*mask
, dma_filter_fn fn
, void *fn_param
)
495 struct dma_device
*device
, *_d
;
496 struct dma_chan
*chan
= NULL
;
500 mutex_lock(&dma_list_mutex
);
501 list_for_each_entry_safe(device
, _d
, &dma_device_list
, global_node
) {
502 chan
= private_candidate(mask
, device
, fn
, fn_param
);
504 /* Found a suitable channel, try to grab, prep, and
505 * return it. We first set DMA_PRIVATE to disable
506 * balance_ref_count as this channel will not be
507 * published in the general-purpose allocator
509 dma_cap_set(DMA_PRIVATE
, device
->cap_mask
);
510 device
->privatecnt
++;
511 err
= dma_chan_get(chan
);
513 if (err
== -ENODEV
) {
514 pr_debug("%s: %s module removed\n", __func__
,
515 dma_chan_name(chan
));
516 list_del_rcu(&device
->global_node
);
518 pr_err("dmaengine: failed to get %s: (%d)\n",
519 dma_chan_name(chan
), err
);
522 if (--device
->privatecnt
== 0)
523 dma_cap_clear(DMA_PRIVATE
, device
->cap_mask
);
524 chan
->private = NULL
;
528 mutex_unlock(&dma_list_mutex
);
530 pr_debug("%s: %s (%s)\n", __func__
, chan
? "success" : "fail",
531 chan
? dma_chan_name(chan
) : NULL
);
535 EXPORT_SYMBOL_GPL(__dma_request_channel
);
537 void dma_release_channel(struct dma_chan
*chan
)
539 mutex_lock(&dma_list_mutex
);
540 WARN_ONCE(chan
->client_count
!= 1,
541 "chan reference count %d != 1\n", chan
->client_count
);
543 /* drop PRIVATE cap enabled by __dma_request_channel() */
544 if (--chan
->device
->privatecnt
== 0)
545 dma_cap_clear(DMA_PRIVATE
, chan
->device
->cap_mask
);
546 chan
->private = NULL
;
547 mutex_unlock(&dma_list_mutex
);
549 EXPORT_SYMBOL_GPL(dma_release_channel
);
552 * dmaengine_get - register interest in dma_channels
554 void dmaengine_get(void)
556 struct dma_device
*device
, *_d
;
557 struct dma_chan
*chan
;
560 mutex_lock(&dma_list_mutex
);
561 dmaengine_ref_count
++;
563 /* try to grab channels */
564 list_for_each_entry_safe(device
, _d
, &dma_device_list
, global_node
) {
565 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
567 list_for_each_entry(chan
, &device
->channels
, device_node
) {
568 err
= dma_chan_get(chan
);
569 if (err
== -ENODEV
) {
570 /* module removed before we could use it */
571 list_del_rcu(&device
->global_node
);
574 pr_err("dmaengine: failed to get %s: (%d)\n",
575 dma_chan_name(chan
), err
);
579 /* if this is the first reference and there were channels
580 * waiting we need to rebalance to get those channels
581 * incorporated into the channel table
583 if (dmaengine_ref_count
== 1)
584 dma_channel_rebalance();
585 mutex_unlock(&dma_list_mutex
);
587 EXPORT_SYMBOL(dmaengine_get
);
590 * dmaengine_put - let dma drivers be removed when ref_count == 0
592 void dmaengine_put(void)
594 struct dma_device
*device
;
595 struct dma_chan
*chan
;
597 mutex_lock(&dma_list_mutex
);
598 dmaengine_ref_count
--;
599 BUG_ON(dmaengine_ref_count
< 0);
600 /* drop channel references */
601 list_for_each_entry(device
, &dma_device_list
, global_node
) {
602 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
604 list_for_each_entry(chan
, &device
->channels
, device_node
)
607 mutex_unlock(&dma_list_mutex
);
609 EXPORT_SYMBOL(dmaengine_put
);
611 static bool device_has_all_tx_types(struct dma_device
*device
)
613 /* A device that satisfies this test has channels that will never cause
614 * an async_tx channel switch event as all possible operation types can
617 #ifdef CONFIG_ASYNC_TX_DMA
618 if (!dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
))
622 #if defined(CONFIG_ASYNC_MEMCPY) || defined(CONFIG_ASYNC_MEMCPY_MODULE)
623 if (!dma_has_cap(DMA_MEMCPY
, device
->cap_mask
))
627 #if defined(CONFIG_ASYNC_MEMSET) || defined(CONFIG_ASYNC_MEMSET_MODULE)
628 if (!dma_has_cap(DMA_MEMSET
, device
->cap_mask
))
632 #if defined(CONFIG_ASYNC_XOR) || defined(CONFIG_ASYNC_XOR_MODULE)
633 if (!dma_has_cap(DMA_XOR
, device
->cap_mask
))
637 #if defined(CONFIG_ASYNC_PQ) || defined(CONFIG_ASYNC_PQ_MODULE)
638 if (!dma_has_cap(DMA_PQ
, device
->cap_mask
))
645 static int get_dma_id(struct dma_device
*device
)
650 if (!idr_pre_get(&dma_idr
, GFP_KERNEL
))
652 mutex_lock(&dma_list_mutex
);
653 rc
= idr_get_new(&dma_idr
, NULL
, &device
->dev_id
);
654 mutex_unlock(&dma_list_mutex
);
664 * dma_async_device_register - registers DMA devices found
665 * @device: &dma_device
667 int dma_async_device_register(struct dma_device
*device
)
670 struct dma_chan
* chan
;
676 /* validate device routines */
677 BUG_ON(dma_has_cap(DMA_MEMCPY
, device
->cap_mask
) &&
678 !device
->device_prep_dma_memcpy
);
679 BUG_ON(dma_has_cap(DMA_XOR
, device
->cap_mask
) &&
680 !device
->device_prep_dma_xor
);
681 BUG_ON(dma_has_cap(DMA_XOR_VAL
, device
->cap_mask
) &&
682 !device
->device_prep_dma_xor_val
);
683 BUG_ON(dma_has_cap(DMA_PQ
, device
->cap_mask
) &&
684 !device
->device_prep_dma_pq
);
685 BUG_ON(dma_has_cap(DMA_PQ_VAL
, device
->cap_mask
) &&
686 !device
->device_prep_dma_pq_val
);
687 BUG_ON(dma_has_cap(DMA_MEMSET
, device
->cap_mask
) &&
688 !device
->device_prep_dma_memset
);
689 BUG_ON(dma_has_cap(DMA_INTERRUPT
, device
->cap_mask
) &&
690 !device
->device_prep_dma_interrupt
);
691 BUG_ON(dma_has_cap(DMA_SLAVE
, device
->cap_mask
) &&
692 !device
->device_prep_slave_sg
);
693 BUG_ON(dma_has_cap(DMA_SLAVE
, device
->cap_mask
) &&
694 !device
->device_terminate_all
);
696 BUG_ON(!device
->device_alloc_chan_resources
);
697 BUG_ON(!device
->device_free_chan_resources
);
698 BUG_ON(!device
->device_is_tx_complete
);
699 BUG_ON(!device
->device_issue_pending
);
700 BUG_ON(!device
->dev
);
702 /* note: this only matters in the
703 * CONFIG_ASYNC_TX_DISABLE_CHANNEL_SWITCH=y case
705 if (device_has_all_tx_types(device
))
706 dma_cap_set(DMA_ASYNC_TX
, device
->cap_mask
);
708 idr_ref
= kmalloc(sizeof(*idr_ref
), GFP_KERNEL
);
711 rc
= get_dma_id(device
);
717 atomic_set(idr_ref
, 0);
719 /* represent channels in sysfs. Probably want devs too */
720 list_for_each_entry(chan
, &device
->channels
, device_node
) {
722 chan
->local
= alloc_percpu(typeof(*chan
->local
));
723 if (chan
->local
== NULL
)
725 chan
->dev
= kzalloc(sizeof(*chan
->dev
), GFP_KERNEL
);
726 if (chan
->dev
== NULL
) {
727 free_percpu(chan
->local
);
732 chan
->chan_id
= chancnt
++;
733 chan
->dev
->device
.class = &dma_devclass
;
734 chan
->dev
->device
.parent
= device
->dev
;
735 chan
->dev
->chan
= chan
;
736 chan
->dev
->idr_ref
= idr_ref
;
737 chan
->dev
->dev_id
= device
->dev_id
;
739 dev_set_name(&chan
->dev
->device
, "dma%dchan%d",
740 device
->dev_id
, chan
->chan_id
);
742 rc
= device_register(&chan
->dev
->device
);
744 free_percpu(chan
->local
);
750 chan
->client_count
= 0;
752 device
->chancnt
= chancnt
;
754 mutex_lock(&dma_list_mutex
);
755 /* take references on public channels */
756 if (dmaengine_ref_count
&& !dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
757 list_for_each_entry(chan
, &device
->channels
, device_node
) {
758 /* if clients are already waiting for channels we need
759 * to take references on their behalf
761 if (dma_chan_get(chan
) == -ENODEV
) {
762 /* note we can only get here for the first
763 * channel as the remaining channels are
764 * guaranteed to get a reference
767 mutex_unlock(&dma_list_mutex
);
771 list_add_tail_rcu(&device
->global_node
, &dma_device_list
);
772 if (dma_has_cap(DMA_PRIVATE
, device
->cap_mask
))
773 device
->privatecnt
++; /* Always private */
774 dma_channel_rebalance();
775 mutex_unlock(&dma_list_mutex
);
780 /* if we never registered a channel just release the idr */
781 if (atomic_read(idr_ref
) == 0) {
782 mutex_lock(&dma_list_mutex
);
783 idr_remove(&dma_idr
, device
->dev_id
);
784 mutex_unlock(&dma_list_mutex
);
789 list_for_each_entry(chan
, &device
->channels
, device_node
) {
790 if (chan
->local
== NULL
)
792 mutex_lock(&dma_list_mutex
);
793 chan
->dev
->chan
= NULL
;
794 mutex_unlock(&dma_list_mutex
);
795 device_unregister(&chan
->dev
->device
);
796 free_percpu(chan
->local
);
800 EXPORT_SYMBOL(dma_async_device_register
);
803 * dma_async_device_unregister - unregister a DMA device
804 * @device: &dma_device
806 * This routine is called by dma driver exit routines, dmaengine holds module
807 * references to prevent it being called while channels are in use.
809 void dma_async_device_unregister(struct dma_device
*device
)
811 struct dma_chan
*chan
;
813 mutex_lock(&dma_list_mutex
);
814 list_del_rcu(&device
->global_node
);
815 dma_channel_rebalance();
816 mutex_unlock(&dma_list_mutex
);
818 list_for_each_entry(chan
, &device
->channels
, device_node
) {
819 WARN_ONCE(chan
->client_count
,
820 "%s called while %d clients hold a reference\n",
821 __func__
, chan
->client_count
);
822 mutex_lock(&dma_list_mutex
);
823 chan
->dev
->chan
= NULL
;
824 mutex_unlock(&dma_list_mutex
);
825 device_unregister(&chan
->dev
->device
);
828 EXPORT_SYMBOL(dma_async_device_unregister
);
831 * dma_async_memcpy_buf_to_buf - offloaded copy between virtual addresses
832 * @chan: DMA channel to offload copy to
833 * @dest: destination address (virtual)
834 * @src: source address (virtual)
837 * Both @dest and @src must be mappable to a bus address according to the
838 * DMA mapping API rules for streaming mappings.
839 * Both @dest and @src must stay memory resident (kernel memory or locked
843 dma_async_memcpy_buf_to_buf(struct dma_chan
*chan
, void *dest
,
844 void *src
, size_t len
)
846 struct dma_device
*dev
= chan
->device
;
847 struct dma_async_tx_descriptor
*tx
;
848 dma_addr_t dma_dest
, dma_src
;
853 dma_src
= dma_map_single(dev
->dev
, src
, len
, DMA_TO_DEVICE
);
854 dma_dest
= dma_map_single(dev
->dev
, dest
, len
, DMA_FROM_DEVICE
);
855 flags
= DMA_CTRL_ACK
|
856 DMA_COMPL_SRC_UNMAP_SINGLE
|
857 DMA_COMPL_DEST_UNMAP_SINGLE
;
858 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
861 dma_unmap_single(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
862 dma_unmap_single(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
867 cookie
= tx
->tx_submit(tx
);
870 per_cpu_ptr(chan
->local
, cpu
)->bytes_transferred
+= len
;
871 per_cpu_ptr(chan
->local
, cpu
)->memcpy_count
++;
876 EXPORT_SYMBOL(dma_async_memcpy_buf_to_buf
);
879 * dma_async_memcpy_buf_to_pg - offloaded copy from address to page
880 * @chan: DMA channel to offload copy to
881 * @page: destination page
882 * @offset: offset in page to copy to
883 * @kdata: source address (virtual)
886 * Both @page/@offset and @kdata must be mappable to a bus address according
887 * to the DMA mapping API rules for streaming mappings.
888 * Both @page/@offset and @kdata must stay memory resident (kernel memory or
889 * locked user space pages)
892 dma_async_memcpy_buf_to_pg(struct dma_chan
*chan
, struct page
*page
,
893 unsigned int offset
, void *kdata
, size_t len
)
895 struct dma_device
*dev
= chan
->device
;
896 struct dma_async_tx_descriptor
*tx
;
897 dma_addr_t dma_dest
, dma_src
;
902 dma_src
= dma_map_single(dev
->dev
, kdata
, len
, DMA_TO_DEVICE
);
903 dma_dest
= dma_map_page(dev
->dev
, page
, offset
, len
, DMA_FROM_DEVICE
);
904 flags
= DMA_CTRL_ACK
| DMA_COMPL_SRC_UNMAP_SINGLE
;
905 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
908 dma_unmap_single(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
909 dma_unmap_page(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
914 cookie
= tx
->tx_submit(tx
);
917 per_cpu_ptr(chan
->local
, cpu
)->bytes_transferred
+= len
;
918 per_cpu_ptr(chan
->local
, cpu
)->memcpy_count
++;
923 EXPORT_SYMBOL(dma_async_memcpy_buf_to_pg
);
926 * dma_async_memcpy_pg_to_pg - offloaded copy from page to page
927 * @chan: DMA channel to offload copy to
928 * @dest_pg: destination page
929 * @dest_off: offset in page to copy to
930 * @src_pg: source page
931 * @src_off: offset in page to copy from
934 * Both @dest_page/@dest_off and @src_page/@src_off must be mappable to a bus
935 * address according to the DMA mapping API rules for streaming mappings.
936 * Both @dest_page/@dest_off and @src_page/@src_off must stay memory resident
937 * (kernel memory or locked user space pages).
940 dma_async_memcpy_pg_to_pg(struct dma_chan
*chan
, struct page
*dest_pg
,
941 unsigned int dest_off
, struct page
*src_pg
, unsigned int src_off
,
944 struct dma_device
*dev
= chan
->device
;
945 struct dma_async_tx_descriptor
*tx
;
946 dma_addr_t dma_dest
, dma_src
;
951 dma_src
= dma_map_page(dev
->dev
, src_pg
, src_off
, len
, DMA_TO_DEVICE
);
952 dma_dest
= dma_map_page(dev
->dev
, dest_pg
, dest_off
, len
,
954 flags
= DMA_CTRL_ACK
;
955 tx
= dev
->device_prep_dma_memcpy(chan
, dma_dest
, dma_src
, len
, flags
);
958 dma_unmap_page(dev
->dev
, dma_src
, len
, DMA_TO_DEVICE
);
959 dma_unmap_page(dev
->dev
, dma_dest
, len
, DMA_FROM_DEVICE
);
964 cookie
= tx
->tx_submit(tx
);
967 per_cpu_ptr(chan
->local
, cpu
)->bytes_transferred
+= len
;
968 per_cpu_ptr(chan
->local
, cpu
)->memcpy_count
++;
973 EXPORT_SYMBOL(dma_async_memcpy_pg_to_pg
);
975 void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor
*tx
,
976 struct dma_chan
*chan
)
979 spin_lock_init(&tx
->lock
);
981 EXPORT_SYMBOL(dma_async_tx_descriptor_init
);
983 /* dma_wait_for_async_tx - spin wait for a transaction to complete
984 * @tx: in-flight transaction to wait on
987 dma_wait_for_async_tx(struct dma_async_tx_descriptor
*tx
)
989 unsigned long dma_sync_wait_timeout
= jiffies
+ msecs_to_jiffies(5000);
994 while (tx
->cookie
== -EBUSY
) {
995 if (time_after_eq(jiffies
, dma_sync_wait_timeout
)) {
996 pr_err("%s timeout waiting for descriptor submission\n",
1002 return dma_sync_wait(tx
->chan
, tx
->cookie
);
1004 EXPORT_SYMBOL_GPL(dma_wait_for_async_tx
);
1006 /* dma_run_dependencies - helper routine for dma drivers to process
1007 * (start) dependent operations on their target channel
1008 * @tx: transaction with dependencies
1010 void dma_run_dependencies(struct dma_async_tx_descriptor
*tx
)
1012 struct dma_async_tx_descriptor
*dep
= tx
->next
;
1013 struct dma_async_tx_descriptor
*dep_next
;
1014 struct dma_chan
*chan
;
1019 /* we'll submit tx->next now, so clear the link */
1023 /* keep submitting up until a channel switch is detected
1024 * in that case we will be called again as a result of
1025 * processing the interrupt from async_tx_channel_switch
1027 for (; dep
; dep
= dep_next
) {
1028 spin_lock_bh(&dep
->lock
);
1030 dep_next
= dep
->next
;
1031 if (dep_next
&& dep_next
->chan
== chan
)
1032 dep
->next
= NULL
; /* ->next will be submitted */
1034 dep_next
= NULL
; /* submit current dep and terminate */
1035 spin_unlock_bh(&dep
->lock
);
1037 dep
->tx_submit(dep
);
1040 chan
->device
->device_issue_pending(chan
);
1042 EXPORT_SYMBOL_GPL(dma_run_dependencies
);
1044 static int __init
dma_bus_init(void)
1047 mutex_init(&dma_list_mutex
);
1048 return class_register(&dma_devclass
);
1050 arch_initcall(dma_bus_init
);