Full support for Ginger Console
[linux-ginger.git] / drivers / gpu / drm / radeon / radeon_mode.h
blobe61226817ccf1812a00fe442532d7e567db3e203
1 /*
2 * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
3 * VA Linux Systems Inc., Fremont, California.
4 * Copyright 2008 Red Hat Inc.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Original Authors:
25 * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
27 * Kernel port Author: Dave Airlie
30 #ifndef RADEON_MODE_H
31 #define RADEON_MODE_H
33 #include <drm_crtc.h>
34 #include <drm_mode.h>
35 #include <drm_edid.h>
36 #include <linux/i2c.h>
37 #include <linux/i2c-id.h>
38 #include <linux/i2c-algo-bit.h>
39 #include "radeon_fixed.h"
41 struct radeon_device;
43 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
44 #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
45 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
46 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
48 enum radeon_connector_type {
49 CONNECTOR_NONE,
50 CONNECTOR_VGA,
51 CONNECTOR_DVI_I,
52 CONNECTOR_DVI_D,
53 CONNECTOR_DVI_A,
54 CONNECTOR_STV,
55 CONNECTOR_CTV,
56 CONNECTOR_LVDS,
57 CONNECTOR_DIGITAL,
58 CONNECTOR_SCART,
59 CONNECTOR_HDMI_TYPE_A,
60 CONNECTOR_HDMI_TYPE_B,
61 CONNECTOR_0XC,
62 CONNECTOR_0XD,
63 CONNECTOR_DIN,
64 CONNECTOR_DISPLAY_PORT,
65 CONNECTOR_UNSUPPORTED
68 enum radeon_dvi_type {
69 DVI_AUTO,
70 DVI_DIGITAL,
71 DVI_ANALOG
74 enum radeon_rmx_type {
75 RMX_OFF,
76 RMX_FULL,
77 RMX_CENTER,
78 RMX_ASPECT
81 enum radeon_tv_std {
82 TV_STD_NTSC,
83 TV_STD_PAL,
84 TV_STD_PAL_M,
85 TV_STD_PAL_60,
86 TV_STD_NTSC_J,
87 TV_STD_SCART_PAL,
88 TV_STD_SECAM,
89 TV_STD_PAL_CN,
92 struct radeon_i2c_bus_rec {
93 bool valid;
94 uint32_t mask_clk_reg;
95 uint32_t mask_data_reg;
96 uint32_t a_clk_reg;
97 uint32_t a_data_reg;
98 uint32_t put_clk_reg;
99 uint32_t put_data_reg;
100 uint32_t get_clk_reg;
101 uint32_t get_data_reg;
102 uint32_t mask_clk_mask;
103 uint32_t mask_data_mask;
104 uint32_t put_clk_mask;
105 uint32_t put_data_mask;
106 uint32_t get_clk_mask;
107 uint32_t get_data_mask;
108 uint32_t a_clk_mask;
109 uint32_t a_data_mask;
112 struct radeon_tmds_pll {
113 uint32_t freq;
114 uint32_t value;
117 #define RADEON_MAX_BIOS_CONNECTOR 16
119 #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
120 #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
121 #define RADEON_PLL_USE_REF_DIV (1 << 2)
122 #define RADEON_PLL_LEGACY (1 << 3)
123 #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
124 #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
125 #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
126 #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
127 #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
128 #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
129 #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
130 #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
132 struct radeon_pll {
133 uint16_t reference_freq;
134 uint16_t reference_div;
135 uint32_t pll_in_min;
136 uint32_t pll_in_max;
137 uint32_t pll_out_min;
138 uint32_t pll_out_max;
139 uint16_t xclk;
141 uint32_t min_ref_div;
142 uint32_t max_ref_div;
143 uint32_t min_post_div;
144 uint32_t max_post_div;
145 uint32_t min_feedback_div;
146 uint32_t max_feedback_div;
147 uint32_t min_frac_feedback_div;
148 uint32_t max_frac_feedback_div;
149 uint32_t best_vco;
152 struct radeon_i2c_chan {
153 struct drm_device *dev;
154 struct i2c_adapter adapter;
155 struct i2c_algo_bit_data algo;
156 struct radeon_i2c_bus_rec rec;
159 /* mostly for macs, but really any system without connector tables */
160 enum radeon_connector_table {
161 CT_NONE,
162 CT_GENERIC,
163 CT_IBOOK,
164 CT_POWERBOOK_EXTERNAL,
165 CT_POWERBOOK_INTERNAL,
166 CT_POWERBOOK_VGA,
167 CT_MINI_EXTERNAL,
168 CT_MINI_INTERNAL,
169 CT_IMAC_G5_ISIGHT,
170 CT_EMAC,
173 struct radeon_mode_info {
174 struct atom_context *atom_context;
175 enum radeon_connector_table connector_table;
176 bool mode_config_initialized;
177 struct radeon_crtc *crtcs[2];
178 /* DVI-I properties */
179 struct drm_property *coherent_mode_property;
180 /* DAC enable load detect */
181 struct drm_property *load_detect_property;
182 /* TV standard load detect */
183 struct drm_property *tv_std_property;
184 /* legacy TMDS PLL detect */
185 struct drm_property *tmds_pll_property;
189 struct radeon_native_mode {
190 /* preferred mode */
191 uint32_t panel_xres, panel_yres;
192 uint32_t hoverplus, hsync_width;
193 uint32_t hblank;
194 uint32_t voverplus, vsync_width;
195 uint32_t vblank;
196 uint32_t dotclock;
197 uint32_t flags;
200 #define MAX_H_CODE_TIMING_LEN 32
201 #define MAX_V_CODE_TIMING_LEN 32
203 /* need to store these as reading
204 back code tables is excessive */
205 struct radeon_tv_regs {
206 uint32_t tv_uv_adr;
207 uint32_t timing_cntl;
208 uint32_t hrestart;
209 uint32_t vrestart;
210 uint32_t frestart;
211 uint16_t h_code_timing[MAX_H_CODE_TIMING_LEN];
212 uint16_t v_code_timing[MAX_V_CODE_TIMING_LEN];
215 struct radeon_crtc {
216 struct drm_crtc base;
217 int crtc_id;
218 u16 lut_r[256], lut_g[256], lut_b[256];
219 bool enabled;
220 bool can_tile;
221 uint32_t crtc_offset;
222 struct drm_gem_object *cursor_bo;
223 uint64_t cursor_addr;
224 int cursor_width;
225 int cursor_height;
226 uint32_t legacy_display_base_addr;
227 uint32_t legacy_cursor_offset;
228 enum radeon_rmx_type rmx_type;
229 fixed20_12 vsc;
230 fixed20_12 hsc;
231 struct radeon_native_mode native_mode;
234 struct radeon_encoder_primary_dac {
235 /* legacy primary dac */
236 uint32_t ps2_pdac_adj;
239 struct radeon_encoder_lvds {
240 /* legacy lvds */
241 uint16_t panel_vcc_delay;
242 uint8_t panel_pwr_delay;
243 uint8_t panel_digon_delay;
244 uint8_t panel_blon_delay;
245 uint16_t panel_ref_divider;
246 uint8_t panel_post_divider;
247 uint16_t panel_fb_divider;
248 bool use_bios_dividers;
249 uint32_t lvds_gen_cntl;
250 /* panel mode */
251 struct radeon_native_mode native_mode;
254 struct radeon_encoder_tv_dac {
255 /* legacy tv dac */
256 uint32_t ps2_tvdac_adj;
257 uint32_t ntsc_tvdac_adj;
258 uint32_t pal_tvdac_adj;
260 int h_pos;
261 int v_pos;
262 int h_size;
263 int supported_tv_stds;
264 bool tv_on;
265 enum radeon_tv_std tv_std;
266 struct radeon_tv_regs tv;
269 struct radeon_encoder_int_tmds {
270 /* legacy int tmds */
271 struct radeon_tmds_pll tmds_pll[4];
274 struct radeon_encoder_atom_dig {
275 /* atom dig */
276 bool coherent_mode;
277 int dig_block;
278 /* atom lvds */
279 uint32_t lvds_misc;
280 uint16_t panel_pwr_delay;
281 /* panel mode */
282 struct radeon_native_mode native_mode;
285 struct radeon_encoder_atom_dac {
286 enum radeon_tv_std tv_std;
289 struct radeon_encoder {
290 struct drm_encoder base;
291 uint32_t encoder_id;
292 uint32_t devices;
293 uint32_t active_device;
294 uint32_t flags;
295 uint32_t pixel_clock;
296 enum radeon_rmx_type rmx_type;
297 struct radeon_native_mode native_mode;
298 void *enc_priv;
301 struct radeon_connector_atom_dig {
302 uint32_t igp_lane_info;
303 bool linkb;
306 struct radeon_connector {
307 struct drm_connector base;
308 uint32_t connector_id;
309 uint32_t devices;
310 struct radeon_i2c_chan *ddc_bus;
311 bool use_digital;
312 /* we need to mind the EDID between detect
313 and get modes due to analog/digital/tvencoder */
314 struct edid *edid;
315 void *con_priv;
316 bool dac_load_detect;
319 struct radeon_framebuffer {
320 struct drm_framebuffer base;
321 struct drm_gem_object *obj;
324 extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
325 struct radeon_i2c_bus_rec *rec,
326 const char *name);
327 extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
328 extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
329 extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
331 extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
333 extern void radeon_compute_pll(struct radeon_pll *pll,
334 uint64_t freq,
335 uint32_t *dot_clock_p,
336 uint32_t *fb_div_p,
337 uint32_t *frac_fb_div_p,
338 uint32_t *ref_div_p,
339 uint32_t *post_div_p,
340 int flags);
342 struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
343 struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
344 struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
345 struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
346 struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
347 extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
348 extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
349 extern void radeon_encoder_set_active_device(struct drm_encoder *encoder);
351 extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
352 extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
353 struct drm_framebuffer *old_fb);
354 extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
355 struct drm_display_mode *mode,
356 struct drm_display_mode *adjusted_mode,
357 int x, int y,
358 struct drm_framebuffer *old_fb);
359 extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
361 extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
362 struct drm_framebuffer *old_fb);
363 extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
365 extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
366 struct drm_file *file_priv,
367 uint32_t handle,
368 uint32_t width,
369 uint32_t height);
370 extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
371 int x, int y);
373 extern bool radeon_atom_get_clock_info(struct drm_device *dev);
374 extern bool radeon_combios_get_clock_info(struct drm_device *dev);
375 extern struct radeon_encoder_atom_dig *
376 radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
377 bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
378 struct radeon_encoder_int_tmds *tmds);
379 bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder,
380 struct radeon_encoder_int_tmds *tmds);
381 bool radeon_legacy_get_tmds_info_from_table(struct radeon_encoder *encoder,
382 struct radeon_encoder_int_tmds *tmds);
383 extern struct radeon_encoder_primary_dac *
384 radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
385 extern struct radeon_encoder_tv_dac *
386 radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
387 extern struct radeon_encoder_lvds *
388 radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
389 extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
390 extern struct radeon_encoder_tv_dac *
391 radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
392 extern struct radeon_encoder_primary_dac *
393 radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
394 extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
395 extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
396 extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
397 extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
398 extern void radeon_save_bios_scratch_regs(struct radeon_device *rdev);
399 extern void radeon_restore_bios_scratch_regs(struct radeon_device *rdev);
400 extern void
401 radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
402 extern void
403 radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
404 extern void
405 radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
406 extern void
407 radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
408 extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
409 u16 blue, int regno);
410 extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
411 u16 *blue, int regno);
412 struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
413 struct drm_mode_fb_cmd *mode_cmd,
414 struct drm_gem_object *obj);
416 int radeonfb_probe(struct drm_device *dev);
418 int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
419 bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
420 bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
421 void radeon_atombios_init_crtc(struct drm_device *dev,
422 struct radeon_crtc *radeon_crtc);
423 void radeon_legacy_init_crtc(struct drm_device *dev,
424 struct radeon_crtc *radeon_crtc);
425 void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
427 void radeon_get_clock_info(struct drm_device *dev);
429 extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
430 extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
432 void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
433 struct drm_display_mode *mode,
434 struct drm_display_mode *adjusted_mode);
435 void radeon_enc_destroy(struct drm_encoder *encoder);
436 void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
437 void radeon_combios_asic_init(struct drm_device *dev);
438 extern int radeon_static_clocks_init(struct drm_device *dev);
439 bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
440 struct drm_display_mode *mode,
441 struct drm_display_mode *adjusted_mode);
442 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
444 /* legacy tv */
445 void radeon_legacy_tv_adjust_crtc_reg(struct drm_encoder *encoder,
446 uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
447 uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
448 void radeon_legacy_tv_adjust_pll1(struct drm_encoder *encoder,
449 uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
450 uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
451 void radeon_legacy_tv_adjust_pll2(struct drm_encoder *encoder,
452 uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
453 uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);
454 void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
455 struct drm_display_mode *mode,
456 struct drm_display_mode *adjusted_mode);
457 #endif