Full support for Ginger Console
[linux-ginger.git] / drivers / gpu / drm / radeon / radeon_ttm.c
blob765bd184b6fc15382fc10b2dfaadd91414709054
1 /*
2 * Copyright 2009 Jerome Glisse.
3 * All Rights Reserved.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
23 * of the Software.
27 * Authors:
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
30 * Dave Airlie
32 #include <ttm/ttm_bo_api.h>
33 #include <ttm/ttm_bo_driver.h>
34 #include <ttm/ttm_placement.h>
35 #include <ttm/ttm_module.h>
36 #include <drm/drmP.h>
37 #include <drm/radeon_drm.h>
38 #include <linux/seq_file.h>
39 #include "radeon_reg.h"
40 #include "radeon.h"
42 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
44 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
46 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
48 struct radeon_mman *mman;
49 struct radeon_device *rdev;
51 mman = container_of(bdev, struct radeon_mman, bdev);
52 rdev = container_of(mman, struct radeon_device, mman);
53 return rdev;
58 * Global memory.
60 static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
62 return ttm_mem_global_init(ref->object);
65 static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
67 ttm_mem_global_release(ref->object);
70 static int radeon_ttm_global_init(struct radeon_device *rdev)
72 struct ttm_global_reference *global_ref;
73 int r;
75 rdev->mman.mem_global_referenced = false;
76 global_ref = &rdev->mman.mem_global_ref;
77 global_ref->global_type = TTM_GLOBAL_TTM_MEM;
78 global_ref->size = sizeof(struct ttm_mem_global);
79 global_ref->init = &radeon_ttm_mem_global_init;
80 global_ref->release = &radeon_ttm_mem_global_release;
81 r = ttm_global_item_ref(global_ref);
82 if (r != 0) {
83 DRM_ERROR("Failed setting up TTM memory accounting "
84 "subsystem.\n");
85 return r;
88 rdev->mman.bo_global_ref.mem_glob =
89 rdev->mman.mem_global_ref.object;
90 global_ref = &rdev->mman.bo_global_ref.ref;
91 global_ref->global_type = TTM_GLOBAL_TTM_BO;
92 global_ref->size = sizeof(struct ttm_bo_global);
93 global_ref->init = &ttm_bo_global_init;
94 global_ref->release = &ttm_bo_global_release;
95 r = ttm_global_item_ref(global_ref);
96 if (r != 0) {
97 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
98 ttm_global_item_unref(&rdev->mman.mem_global_ref);
99 return r;
102 rdev->mman.mem_global_referenced = true;
103 return 0;
106 static void radeon_ttm_global_fini(struct radeon_device *rdev)
108 if (rdev->mman.mem_global_referenced) {
109 ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
110 ttm_global_item_unref(&rdev->mman.mem_global_ref);
111 rdev->mman.mem_global_referenced = false;
115 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
117 static struct ttm_backend*
118 radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
120 struct radeon_device *rdev;
122 rdev = radeon_get_rdev(bdev);
123 #if __OS_HAS_AGP
124 if (rdev->flags & RADEON_IS_AGP) {
125 return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
126 } else
127 #endif
129 return radeon_ttm_backend_create(rdev);
133 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
135 return 0;
138 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
139 struct ttm_mem_type_manager *man)
141 struct radeon_device *rdev;
143 rdev = radeon_get_rdev(bdev);
145 switch (type) {
146 case TTM_PL_SYSTEM:
147 /* System memory */
148 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
149 man->available_caching = TTM_PL_MASK_CACHING;
150 man->default_caching = TTM_PL_FLAG_CACHED;
151 break;
152 case TTM_PL_TT:
153 man->gpu_offset = 0;
154 man->available_caching = TTM_PL_MASK_CACHING;
155 man->default_caching = TTM_PL_FLAG_CACHED;
156 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
157 #if __OS_HAS_AGP
158 if (rdev->flags & RADEON_IS_AGP) {
159 if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
160 DRM_ERROR("AGP is not enabled for memory type %u\n",
161 (unsigned)type);
162 return -EINVAL;
164 man->io_offset = rdev->mc.agp_base;
165 man->io_size = rdev->mc.gtt_size;
166 man->io_addr = NULL;
167 if (!rdev->ddev->agp->cant_use_aperture)
168 man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
169 TTM_MEMTYPE_FLAG_MAPPABLE;
170 man->available_caching = TTM_PL_FLAG_UNCACHED |
171 TTM_PL_FLAG_WC;
172 man->default_caching = TTM_PL_FLAG_WC;
173 } else
174 #endif
176 man->io_offset = 0;
177 man->io_size = 0;
178 man->io_addr = NULL;
180 break;
181 case TTM_PL_VRAM:
182 /* "On-card" video ram */
183 man->gpu_offset = 0;
184 man->flags = TTM_MEMTYPE_FLAG_FIXED |
185 TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
186 TTM_MEMTYPE_FLAG_MAPPABLE;
187 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
188 man->default_caching = TTM_PL_FLAG_WC;
189 man->io_addr = NULL;
190 man->io_offset = rdev->mc.aper_base;
191 man->io_size = rdev->mc.aper_size;
192 break;
193 default:
194 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
195 return -EINVAL;
197 return 0;
200 static uint32_t radeon_evict_flags(struct ttm_buffer_object *bo)
202 uint32_t cur_placement = bo->mem.placement & ~TTM_PL_MASK_MEMTYPE;
204 switch (bo->mem.mem_type) {
205 default:
206 return (cur_placement & ~TTM_PL_MASK_CACHING) |
207 TTM_PL_FLAG_SYSTEM |
208 TTM_PL_FLAG_CACHED;
212 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
214 return 0;
217 static void radeon_move_null(struct ttm_buffer_object *bo,
218 struct ttm_mem_reg *new_mem)
220 struct ttm_mem_reg *old_mem = &bo->mem;
222 BUG_ON(old_mem->mm_node != NULL);
223 *old_mem = *new_mem;
224 new_mem->mm_node = NULL;
227 static int radeon_move_blit(struct ttm_buffer_object *bo,
228 bool evict, int no_wait,
229 struct ttm_mem_reg *new_mem,
230 struct ttm_mem_reg *old_mem)
232 struct radeon_device *rdev;
233 uint64_t old_start, new_start;
234 struct radeon_fence *fence;
235 int r;
237 rdev = radeon_get_rdev(bo->bdev);
238 r = radeon_fence_create(rdev, &fence);
239 if (unlikely(r)) {
240 return r;
242 old_start = old_mem->mm_node->start << PAGE_SHIFT;
243 new_start = new_mem->mm_node->start << PAGE_SHIFT;
245 switch (old_mem->mem_type) {
246 case TTM_PL_VRAM:
247 old_start += rdev->mc.vram_location;
248 break;
249 case TTM_PL_TT:
250 old_start += rdev->mc.gtt_location;
251 break;
252 default:
253 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
254 return -EINVAL;
256 switch (new_mem->mem_type) {
257 case TTM_PL_VRAM:
258 new_start += rdev->mc.vram_location;
259 break;
260 case TTM_PL_TT:
261 new_start += rdev->mc.gtt_location;
262 break;
263 default:
264 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
265 return -EINVAL;
267 if (!rdev->cp.ready) {
268 DRM_ERROR("Trying to move memory with CP turned off.\n");
269 return -EINVAL;
271 r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
272 /* FIXME: handle copy error */
273 r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
274 evict, no_wait, new_mem);
275 radeon_fence_unref(&fence);
276 return r;
279 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
280 bool evict, bool interruptible, bool no_wait,
281 struct ttm_mem_reg *new_mem)
283 struct radeon_device *rdev;
284 struct ttm_mem_reg *old_mem = &bo->mem;
285 struct ttm_mem_reg tmp_mem;
286 uint32_t proposed_placement;
287 int r;
289 rdev = radeon_get_rdev(bo->bdev);
290 tmp_mem = *new_mem;
291 tmp_mem.mm_node = NULL;
292 proposed_placement = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
293 r = ttm_bo_mem_space(bo, proposed_placement, &tmp_mem,
294 interruptible, no_wait);
295 if (unlikely(r)) {
296 return r;
298 r = ttm_tt_bind(bo->ttm, &tmp_mem);
299 if (unlikely(r)) {
300 goto out_cleanup;
302 r = radeon_move_blit(bo, true, no_wait, &tmp_mem, old_mem);
303 if (unlikely(r)) {
304 goto out_cleanup;
306 r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
307 out_cleanup:
308 if (tmp_mem.mm_node) {
309 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
311 spin_lock(&glob->lru_lock);
312 drm_mm_put_block(tmp_mem.mm_node);
313 spin_unlock(&glob->lru_lock);
314 return r;
316 return r;
319 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
320 bool evict, bool interruptible, bool no_wait,
321 struct ttm_mem_reg *new_mem)
323 struct radeon_device *rdev;
324 struct ttm_mem_reg *old_mem = &bo->mem;
325 struct ttm_mem_reg tmp_mem;
326 uint32_t proposed_flags;
327 int r;
329 rdev = radeon_get_rdev(bo->bdev);
330 tmp_mem = *new_mem;
331 tmp_mem.mm_node = NULL;
332 proposed_flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
333 r = ttm_bo_mem_space(bo, proposed_flags, &tmp_mem,
334 interruptible, no_wait);
335 if (unlikely(r)) {
336 return r;
338 r = ttm_bo_move_ttm(bo, true, no_wait, &tmp_mem);
339 if (unlikely(r)) {
340 goto out_cleanup;
342 r = radeon_move_blit(bo, true, no_wait, new_mem, old_mem);
343 if (unlikely(r)) {
344 goto out_cleanup;
346 out_cleanup:
347 if (tmp_mem.mm_node) {
348 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
350 spin_lock(&glob->lru_lock);
351 drm_mm_put_block(tmp_mem.mm_node);
352 spin_unlock(&glob->lru_lock);
353 return r;
355 return r;
358 static int radeon_bo_move(struct ttm_buffer_object *bo,
359 bool evict, bool interruptible, bool no_wait,
360 struct ttm_mem_reg *new_mem)
362 struct radeon_device *rdev;
363 struct ttm_mem_reg *old_mem = &bo->mem;
364 int r;
366 rdev = radeon_get_rdev(bo->bdev);
367 if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
368 radeon_move_null(bo, new_mem);
369 return 0;
371 if ((old_mem->mem_type == TTM_PL_TT &&
372 new_mem->mem_type == TTM_PL_SYSTEM) ||
373 (old_mem->mem_type == TTM_PL_SYSTEM &&
374 new_mem->mem_type == TTM_PL_TT)) {
375 /* bind is enought */
376 radeon_move_null(bo, new_mem);
377 return 0;
379 if (!rdev->cp.ready || rdev->asic->copy == NULL) {
380 /* use memcpy */
381 goto memcpy;
384 if (old_mem->mem_type == TTM_PL_VRAM &&
385 new_mem->mem_type == TTM_PL_SYSTEM) {
386 r = radeon_move_vram_ram(bo, evict, interruptible,
387 no_wait, new_mem);
388 } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
389 new_mem->mem_type == TTM_PL_VRAM) {
390 r = radeon_move_ram_vram(bo, evict, interruptible,
391 no_wait, new_mem);
392 } else {
393 r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
396 if (r) {
397 memcpy:
398 r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
401 return r;
404 const uint32_t radeon_mem_prios[] = {
405 TTM_PL_VRAM,
406 TTM_PL_TT,
407 TTM_PL_SYSTEM,
410 const uint32_t radeon_busy_prios[] = {
411 TTM_PL_TT,
412 TTM_PL_VRAM,
413 TTM_PL_SYSTEM,
416 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
417 bool lazy, bool interruptible)
419 return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
422 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
424 return 0;
427 static void radeon_sync_obj_unref(void **sync_obj)
429 radeon_fence_unref((struct radeon_fence **)sync_obj);
432 static void *radeon_sync_obj_ref(void *sync_obj)
434 return radeon_fence_ref((struct radeon_fence *)sync_obj);
437 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
439 return radeon_fence_signaled((struct radeon_fence *)sync_obj);
442 static struct ttm_bo_driver radeon_bo_driver = {
443 .mem_type_prio = radeon_mem_prios,
444 .mem_busy_prio = radeon_busy_prios,
445 .num_mem_type_prio = ARRAY_SIZE(radeon_mem_prios),
446 .num_mem_busy_prio = ARRAY_SIZE(radeon_busy_prios),
447 .create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
448 .invalidate_caches = &radeon_invalidate_caches,
449 .init_mem_type = &radeon_init_mem_type,
450 .evict_flags = &radeon_evict_flags,
451 .move = &radeon_bo_move,
452 .verify_access = &radeon_verify_access,
453 .sync_obj_signaled = &radeon_sync_obj_signaled,
454 .sync_obj_wait = &radeon_sync_obj_wait,
455 .sync_obj_flush = &radeon_sync_obj_flush,
456 .sync_obj_unref = &radeon_sync_obj_unref,
457 .sync_obj_ref = &radeon_sync_obj_ref,
458 .move_notify = &radeon_bo_move_notify,
459 .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
462 int radeon_ttm_init(struct radeon_device *rdev)
464 int r;
466 r = radeon_ttm_global_init(rdev);
467 if (r) {
468 return r;
470 /* No others user of address space so set it to 0 */
471 r = ttm_bo_device_init(&rdev->mman.bdev,
472 rdev->mman.bo_global_ref.ref.object,
473 &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
474 rdev->need_dma32);
475 if (r) {
476 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
477 return r;
479 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, 0,
480 ((rdev->mc.real_vram_size) >> PAGE_SHIFT));
481 if (r) {
482 DRM_ERROR("Failed initializing VRAM heap.\n");
483 return r;
485 r = radeon_object_create(rdev, NULL, 256 * 1024, true,
486 RADEON_GEM_DOMAIN_VRAM, false,
487 &rdev->stollen_vga_memory);
488 if (r) {
489 return r;
491 r = radeon_object_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
492 if (r) {
493 radeon_object_unref(&rdev->stollen_vga_memory);
494 return r;
496 DRM_INFO("radeon: %uM of VRAM memory ready\n",
497 (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
498 r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, 0,
499 ((rdev->mc.gtt_size) >> PAGE_SHIFT));
500 if (r) {
501 DRM_ERROR("Failed initializing GTT heap.\n");
502 return r;
504 DRM_INFO("radeon: %uM of GTT memory ready.\n",
505 (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
506 if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
507 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
510 r = radeon_ttm_debugfs_init(rdev);
511 if (r) {
512 DRM_ERROR("Failed to init debugfs\n");
513 return r;
515 return 0;
518 void radeon_ttm_fini(struct radeon_device *rdev)
520 if (rdev->stollen_vga_memory) {
521 radeon_object_unpin(rdev->stollen_vga_memory);
522 radeon_object_unref(&rdev->stollen_vga_memory);
524 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
525 ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
526 ttm_bo_device_release(&rdev->mman.bdev);
527 radeon_gart_fini(rdev);
528 radeon_ttm_global_fini(rdev);
529 DRM_INFO("radeon: ttm finalized\n");
532 static struct vm_operations_struct radeon_ttm_vm_ops;
533 static const struct vm_operations_struct *ttm_vm_ops = NULL;
535 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
537 struct ttm_buffer_object *bo;
538 int r;
540 bo = (struct ttm_buffer_object *)vma->vm_private_data;
541 if (bo == NULL) {
542 return VM_FAULT_NOPAGE;
544 r = ttm_vm_ops->fault(vma, vmf);
545 return r;
548 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
550 struct drm_file *file_priv;
551 struct radeon_device *rdev;
552 int r;
554 if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
555 return drm_mmap(filp, vma);
558 file_priv = (struct drm_file *)filp->private_data;
559 rdev = file_priv->minor->dev->dev_private;
560 if (rdev == NULL) {
561 return -EINVAL;
563 r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
564 if (unlikely(r != 0)) {
565 return r;
567 if (unlikely(ttm_vm_ops == NULL)) {
568 ttm_vm_ops = vma->vm_ops;
569 radeon_ttm_vm_ops = *ttm_vm_ops;
570 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
572 vma->vm_ops = &radeon_ttm_vm_ops;
573 return 0;
578 * TTM backend functions.
580 struct radeon_ttm_backend {
581 struct ttm_backend backend;
582 struct radeon_device *rdev;
583 unsigned long num_pages;
584 struct page **pages;
585 struct page *dummy_read_page;
586 bool populated;
587 bool bound;
588 unsigned offset;
591 static int radeon_ttm_backend_populate(struct ttm_backend *backend,
592 unsigned long num_pages,
593 struct page **pages,
594 struct page *dummy_read_page)
596 struct radeon_ttm_backend *gtt;
598 gtt = container_of(backend, struct radeon_ttm_backend, backend);
599 gtt->pages = pages;
600 gtt->num_pages = num_pages;
601 gtt->dummy_read_page = dummy_read_page;
602 gtt->populated = true;
603 return 0;
606 static void radeon_ttm_backend_clear(struct ttm_backend *backend)
608 struct radeon_ttm_backend *gtt;
610 gtt = container_of(backend, struct radeon_ttm_backend, backend);
611 gtt->pages = NULL;
612 gtt->num_pages = 0;
613 gtt->dummy_read_page = NULL;
614 gtt->populated = false;
615 gtt->bound = false;
619 static int radeon_ttm_backend_bind(struct ttm_backend *backend,
620 struct ttm_mem_reg *bo_mem)
622 struct radeon_ttm_backend *gtt;
623 int r;
625 gtt = container_of(backend, struct radeon_ttm_backend, backend);
626 gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
627 if (!gtt->num_pages) {
628 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
630 r = radeon_gart_bind(gtt->rdev, gtt->offset,
631 gtt->num_pages, gtt->pages);
632 if (r) {
633 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
634 gtt->num_pages, gtt->offset);
635 return r;
637 gtt->bound = true;
638 return 0;
641 static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
643 struct radeon_ttm_backend *gtt;
645 gtt = container_of(backend, struct radeon_ttm_backend, backend);
646 radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
647 gtt->bound = false;
648 return 0;
651 static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
653 struct radeon_ttm_backend *gtt;
655 gtt = container_of(backend, struct radeon_ttm_backend, backend);
656 if (gtt->bound) {
657 radeon_ttm_backend_unbind(backend);
659 kfree(gtt);
662 static struct ttm_backend_func radeon_backend_func = {
663 .populate = &radeon_ttm_backend_populate,
664 .clear = &radeon_ttm_backend_clear,
665 .bind = &radeon_ttm_backend_bind,
666 .unbind = &radeon_ttm_backend_unbind,
667 .destroy = &radeon_ttm_backend_destroy,
670 struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
672 struct radeon_ttm_backend *gtt;
674 gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
675 if (gtt == NULL) {
676 return NULL;
678 gtt->backend.bdev = &rdev->mman.bdev;
679 gtt->backend.flags = 0;
680 gtt->backend.func = &radeon_backend_func;
681 gtt->rdev = rdev;
682 gtt->pages = NULL;
683 gtt->num_pages = 0;
684 gtt->dummy_read_page = NULL;
685 gtt->populated = false;
686 gtt->bound = false;
687 return &gtt->backend;
690 #define RADEON_DEBUGFS_MEM_TYPES 2
692 #if defined(CONFIG_DEBUG_FS)
693 static int radeon_mm_dump_table(struct seq_file *m, void *data)
695 struct drm_info_node *node = (struct drm_info_node *)m->private;
696 struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
697 struct drm_device *dev = node->minor->dev;
698 struct radeon_device *rdev = dev->dev_private;
699 int ret;
700 struct ttm_bo_global *glob = rdev->mman.bdev.glob;
702 spin_lock(&glob->lru_lock);
703 ret = drm_mm_dump_table(m, mm);
704 spin_unlock(&glob->lru_lock);
705 return ret;
707 #endif
709 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
711 #if defined(CONFIG_DEBUG_FS)
712 static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
713 static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
714 unsigned i;
716 for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
717 if (i == 0)
718 sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
719 else
720 sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
721 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
722 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
723 radeon_mem_types_list[i].driver_features = 0;
724 if (i == 0)
725 radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
726 else
727 radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
730 return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);
732 #endif
733 return 0;