4 * Copyright (C) 2009 Texas Instruments.
7 * Sergio Aguirre <saaguirre@ti.com>
8 * Dominic Curran <dcurran@ti.com>
10 * This package is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
16 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
19 #ifndef OMAP_ISP_CSI2_API_H
20 #define OMAP_ISP_CSI2_API_H
21 #include <linux/videodev2.h>
23 #define ISP_CSI2_LANE_OFF 0
24 #define ISP_CSI2_LANE_ON 1
26 enum isp_csi2_irqevents
{
28 SHORT_PACKET_IRQ
= 0x2000,
29 ECC_CORRECTION_IRQ
= 0x1000,
30 ECC_NO_CORRECTION_IRQ
= 0x800,
31 COMPLEXIO2_ERR_IRQ
= 0x400,
32 COMPLEXIO1_ERR_IRQ
= 0x200,
44 enum isp_csi2_ctx_irqevents
{
45 CTX_ECC_CORRECTION
= 0x100,
46 CTX_LINE_NUMBER
= 0x80,
47 CTX_FRAME_NUMBER
= 0x40,
55 enum isp_csi2_power_cmds
{
61 enum isp_csi2_frame_mode
{
62 ISP_CSI2_FRAME_IMMEDIATE
,
63 ISP_CSI2_FRAME_AFTERFEC
,
69 u8 state
; /*Current state - 1-Used 0-Unused */
72 struct isp_csi2_lanes_cfg
{
73 struct csi2_lanecfg data
[4];
74 struct csi2_lanecfg clk
;
77 struct isp_csi2_lanes_cfg_update
{
82 struct isp_csi2_phy_cfg
{
90 struct isp_csi2_phy_cfg_update
{
98 struct isp_csi2_ctx_cfg
{
101 struct v4l2_pix_format format
;
108 bool checksum_enabled
;
112 struct isp_csi2_ctx_cfg_update
{
122 bool checksum_enabled
;
126 struct isp_csi2_timings_cfg
{
130 u16 stop_state_counter
;
133 struct isp_csi2_timings_cfg_update
{
137 bool stop_state_counter
;
140 struct isp_csi2_ctrl_cfg
{
146 enum isp_csi2_frame_mode frame_mode
;
152 struct isp_csi2_ctrl_cfg_update
{
164 struct isp_csi2_cfg
{
165 struct isp_csi2_lanes_cfg lanes
;
166 struct isp_csi2_phy_cfg phy
;
167 struct isp_csi2_ctx_cfg contexts
[8];
168 struct isp_csi2_timings_cfg timings
[2];
169 struct isp_csi2_ctrl_cfg ctrl
;
173 struct isp_csi2_cfg_update
{
174 struct isp_csi2_lanes_cfg_update lanes
;
175 struct isp_csi2_phy_cfg_update phy
;
176 struct isp_csi2_ctx_cfg_update contexts
[8];
177 struct isp_csi2_timings_cfg_update timings
[2];
178 struct isp_csi2_ctrl_cfg_update ctrl
;
181 int isp_csi2_complexio_lanes_config(struct isp_csi2_lanes_cfg
*reqcfg
);
182 int isp_csi2_complexio_lanes_update(bool force_update
);
183 int isp_csi2_complexio_lanes_count(int cnt
);
184 int isp_csi2_complexio_lanes_get(void);
185 int isp_csi2_complexio_power_autoswitch(bool enable
);
186 int isp_csi2_complexio_power(enum isp_csi2_power_cmds power_cmd
);
187 int isp_csi2_ctrl_config_frame_mode(enum isp_csi2_frame_mode frame_mode
);
188 int isp_csi2_ctrl_config_vp_clk_enable(bool vp_clk_enable
);
189 int isp_csi2_ctrl_config_vp_only_enable(bool vp_only_enable
);
190 int isp_csi2_ctrl_config_debug_enable(bool debug_enable
);
191 int isp_csi2_ctrl_config_burst_size(u8 burst_size
);
192 int isp_csi2_ctrl_config_ecc_enable(bool ecc_enable
);
193 int isp_csi2_ctrl_config_secure_mode(bool secure_mode
);
194 int isp_csi2_ctrl_config_if_enable(bool if_enable
);
195 int isp_csi2_ctrl_config_vp_out_ctrl(u8 vp_out_ctrl
);
196 int isp_csi2_ctrl_update(bool force_update
);
197 int isp_csi2_ctrl_get(void);
198 int isp_csi2_ctx_config_virtual_id(u8 ctxnum
, u8 virtual_id
);
199 int isp_csi2_ctx_config_frame_count(u8 ctxnum
, u8 frame_count
);
200 int isp_csi2_ctx_config_format(u8 ctxnum
, u32 pixformat
);
201 int isp_csi2_ctx_config_alpha(u8 ctxnum
, u16 alpha
);
202 int isp_csi2_ctx_config_data_offset(u8 ctxnum
, u16 data_offset
);
203 int isp_csi2_ctx_config_ping_addr(u8 ctxnum
, u32 ping_addr
);
204 int isp_csi2_ctx_config_pong_addr(u8 ctxnum
, u32 pong_addr
);
205 int isp_csi2_ctx_config_eof_enabled(u8 ctxnum
, bool eof_enabled
);
206 int isp_csi2_ctx_config_eol_enabled(u8 ctxnum
, bool eol_enabled
);
207 int isp_csi2_ctx_config_checksum_enabled(u8 ctxnum
, bool checksum_enabled
);
208 int isp_csi2_ctx_config_enabled(u8 ctxnum
, bool enabled
);
209 int isp_csi2_ctx_update(u8 ctxnum
, bool force_update
);
210 int isp_csi2_ctx_get(u8 ctxnum
);
211 int isp_csi2_ctx_update_all(bool force_update
);
212 int isp_csi2_ctx_get_all(void);
213 int isp_csi2_phy_config(struct isp_csi2_phy_cfg
*desiredphyconfig
);
214 int isp_csi2_calc_phy_cfg0(u32 mipiclk
, u32 lbound_hs_settle
,
215 u32 ubound_hs_settle
);
216 int isp_csi2_phy_update(bool force_update
);
217 int isp_csi2_phy_get(void);
218 int isp_csi2_timings_config_forcerxmode(u8 io
, bool force_rx_mode
);
219 int isp_csi2_timings_config_stopstate_16x(u8 io
, bool stop_state_16x
);
220 int isp_csi2_timings_config_stopstate_4x(u8 io
, bool stop_state_4x
);
221 int isp_csi2_timings_config_stopstate_cnt(u8 io
, u16 stop_state_counter
);
222 int isp_csi2_timings_update(u8 io
, bool force_update
);
223 int isp_csi2_timings_get(u8 io
);
224 int isp_csi2_timings_update_all(bool force_update
);
225 int isp_csi2_timings_get_all(void);
226 void isp_csi2_irq_complexio1_set(int enable
);
227 void isp_csi2_irq_ctx_set(int enable
);
228 void isp_csi2_irq_status_set(int enable
);
229 void isp_csi2_irq_all_set(int enable
);
231 int isp_csi2_isr(void);
232 int isp_csi2_reset(void);
233 void isp_csi2_enable(int enable
);
234 void isp_csi2_regdump(void);
236 void ispcsi2_save_context(struct device
*dev
);
237 void ispcsi2_restore_context(struct device
*dev
);
239 #endif /* OMAP_ISP_CSI2_H */