drivers/media/video/mt9p012_regs.h

   1 #ifndef __VIDEO_MT9P012_REGS_H
   2 #define __VIDEO_MT9P012_REGS_H
   3
   4 #define REG_MODEL_ID                    0x0000
   5 #define REG_REVISION_NUMBER             0x0002
   6 #define REG_MANUFACTURER_ID             0x0003
   7
   8 #define REG_MODE_SELECT                 0x0100
   9 #define REG_IMAGE_ORIENTATION           0x0101
  10 #define REG_SOFTWARE_RESET              0x0103
  11 #define REG_GROUPED_PAR_HOLD            0x0104
  12
  13 #define REG_FINE_INT_TIME               0x0200
  14 #define REG_COARSE_INT_TIME             0x0202
  15
  16 #define REG_ANALOG_GAIN_GLOBAL          0x0204
  17 #define REG_ANALOG_GAIN_GREENR          0x0206
  18 #define REG_ANALOG_GAIN_RED             0x0208
  19 #define REG_ANALOG_GAIN_BLUE            0x020A
  20 #define REG_ANALOG_GAIN_GREENB          0x020C
  21 #define REG_DIGITAL_GAIN_GREENR         0x020E
  22 #define REG_DIGITAL_GAIN_RED            0x0210
  23 #define REG_DIGITAL_GAIN_BLUE           0x0212
  24 #define REG_DIGITAL_GAIN_GREENB         0x0214
  25
  26 #define REG_VT_PIX_CLK_DIV              0x0300
  27 #define REG_VT_SYS_CLK_DIV              0x0302
  28 #define REG_PRE_PLL_CLK_DIV             0x0304
  29 #define REG_PLL_MULTIPLIER              0x0306
  30 #define REG_OP_PIX_CLK_DIV              0x0308
  31 #define REG_OP_SYS_CLK_DIV              0x030A
  32
  33 #define REG_FRAME_LEN_LINES             0x0340
  34 #define REG_LINE_LEN_PCK                0x0342
  35
  36 #define REG_X_ADDR_START                0x0344
  37 #define REG_Y_ADDR_START                0x0346
  38 #define REG_X_ADDR_END                  0x0348
  39 #define REG_Y_ADDR_END                  0x034A
  40 #define REG_X_OUTPUT_SIZE               0x034C
  41 #define REG_Y_OUTPUT_SIZE               0x034E
  42 #define REG_X_ODD_INC                   0x0382
  43 #define REG_Y_ODD_INC                   0x0386
  44
  45 #define REG_SCALING_MODE                0x0400
  46 #define REG_SCALE_M                     0x0404
  47 #define REG_SCALE_N                     0x0406
  48
  49 #define REG_ROW_SPEED                   0x3016
  50 #define REG_RESET_REGISTER              0x301A
  51 #define REG_PIXEL_ORDER                 0x3024
  52 #define REG_READ_MODE                   0x3040
  53
  54 #define REG_DATAPATH_STATUS             0x306A
  55 #define REG_DATAPATH_SELECT             0x306E
  56
  57 #define REG_RESERVED_MFR_3064           0x3064
  58 #define REG_TEST_PATTERN                0x3070
  59
  60 #endif /* __VIDEO_MT9P012_REGS_H */