2 * MUSB OTG driver DMA controller abstraction
4 * Copyright 2005 Mentor Graphics Corporation
5 * Copyright (C) 2005-2006 by Texas Instruments
6 * Copyright (C) 2006-2007 Nokia Corporation
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #ifndef __MUSB_DMA_H__
36 #define __MUSB_DMA_H__
41 * DMA Controller Abstraction
43 * DMA Controllers are abstracted to allow use of a variety of different
44 * implementations of DMA, as allowed by the Inventra USB cores. On the
45 * host side, usbcore sets up the DMA mappings and flushes caches; on the
46 * peripheral side, the gadget controller driver does. Responsibilities
47 * of a DMA controller driver include:
49 * - Handling the details of moving multiple USB packets
50 * in cooperation with the Inventra USB core, including especially
51 * the correct RX side treatment of short packets and buffer-full
52 * states (both of which terminate transfers).
54 * - Knowing the correlation between dma channels and the
55 * Inventra core's local endpoint resources and data direction.
57 * - Maintaining a list of allocated/available channels.
59 * - Updating channel status on interrupts,
60 * whether shared with the Inventra core or separate.
63 #define DMA_ADDR_INVALID (~(dma_addr_t)0)
65 #ifndef CONFIG_MUSB_PIO_ONLY
66 #define is_dma_capable() (1)
68 #define is_dma_capable() (0)
71 #ifdef CONFIG_USB_TI_CPPI_DMA
72 #define is_cppi_enabled() 1
74 #define is_cppi_enabled() 0
77 #ifdef CONFIG_USB_TI_CPPI41_DMA
78 #define is_cppi41_enabled() 1
80 #define is_cppi41_enabled() 0
83 #ifdef CONFIG_USB_TUSB_OMAP_DMA
84 #define tusb_dma_omap() 1
86 #define tusb_dma_omap() 0
90 * DMA channel status ... updated by the dma controller driver whenever that
91 * status changes, and protected by the overall controller spinlock.
93 enum dma_channel_status
{
95 MUSB_DMA_STATUS_UNKNOWN
,
96 /* allocated ... but not busy, no errors */
98 /* busy ... transactions are active */
100 /* transaction(s) aborted due to ... dma or memory bus error */
101 MUSB_DMA_STATUS_BUS_ABORT
,
102 /* transaction(s) aborted due to ... core error or USB fault */
103 MUSB_DMA_STATUS_CORE_ABORT
106 struct dma_controller
;
109 * struct dma_channel - A DMA channel.
110 * @private_data: channel-private data
111 * @max_len: the maximum number of bytes the channel can move in one
112 * transaction (typically representing many USB maximum-sized packets)
113 * @actual_len: how many bytes have been transferred
114 * @status: current channel status (updated e.g. on interrupt)
115 * @desired_mode: true if mode 1 is desired; false if mode 0 is desired
117 * channels are associated with an endpoint for the duration of at least
122 /* FIXME not void* private_data, but a dma_controller * */
125 enum dma_channel_status status
;
130 * dma_channel_status - return status of dma channel
133 * Returns the software's view of the channel status. If that status is BUSY
134 * then it's possible that the hardware has completed (or aborted) a transfer,
135 * so the driver needs to update that status.
137 static inline enum dma_channel_status
138 dma_channel_status(struct dma_channel
*c
)
140 return (is_dma_capable() && c
) ? c
->status
: MUSB_DMA_STATUS_UNKNOWN
;
144 * struct dma_controller - A DMA Controller.
145 * @start: call this to start a DMA controller;
146 * return 0 on success, else negative errno
147 * @stop: call this to stop a DMA controller
148 * return 0 on success, else negative errno
149 * @channel_alloc: call this to allocate a DMA channel
150 * @channel_release: call this to release a DMA channel
151 * @channel_abort: call this to abort a pending DMA transaction,
152 * returning it to FREE (but allocated) state
154 * Controllers manage dma channels.
156 struct dma_controller
{
157 int (*start
)(struct dma_controller
*);
158 int (*stop
)(struct dma_controller
*);
159 struct dma_channel
*(*channel_alloc
)(struct dma_controller
*,
160 struct musb_hw_ep
*, u8 is_tx
);
161 void (*channel_release
)(struct dma_channel
*);
162 int (*channel_program
)(struct dma_channel
*channel
,
163 u16 maxpacket
, u8 mode
,
166 int (*channel_abort
)(struct dma_channel
*);
169 /* called after channel_program(), may indicate a fault */
170 extern void musb_dma_completion(struct musb
*musb
, u8 epnum
, u8 transmit
);
173 extern struct dma_controller
*__init
174 dma_controller_create(struct musb
*, void __iomem
*);
176 extern void dma_controller_destroy(struct dma_controller
*);
178 #endif /* __MUSB_DMA_H__ */